Order this document by MCD221TS/D SEMICONDUCTOR TECHNICAL DATA Technical Summary This technical summary provides a brief description of the MCD221 CD–Interface and Audio Processor. A complete data sheet for the MCD221 is available and can be ordered from your local Motorola sales office. The order number is MCD221/D. The MCD221 has two main functions. The first is to form an interface between a CD drive unit and a CD–i or Photo–CD player. The connection to the drive is designed for both applications and can be either a Digital Out (EBU standard) interface, or an I2S plus subcode interface. The host interface can be either a 68000 interface for CD–i players, or a serial (SPI) interface for Photo–CD. The second function of the MCD221 is to decode ADPCM (CD–i base case) audio, to perform audio mixing functions as specified in the Green Book, and to be able to add external audio to the base case audio. The MCD221 can also be used for handling the ADPCM decoding for Photo–CD. The main features of the MCD221 are as follows: • Accepts Audio Inputs in I2S Format (MPEG1) for Mixing with CIAP Internal Audio • Output Can Be Either I2S or SONY Format • Data Input Rate Can Be Up to 2 Times Normal Speed • Can Connect to a Host via Either a 68K or Serial Interface • 80–Pin Quad Flat Pack (QFP) FU SUFFIX QFP PACKAGE CASE 841B–01 ORDERING INFORMATION MCD221FU QFP NOTE: Supply of this Video–CD IC does not convey an implied license under any patent right to use this IC in any Video–CD application. CD–i is a registered trademark of Philips Consumer Electronics. Motorola, Inc. 1995 MOTOROLA REV 0 2/95 MCD221 2–1 A12 D14 D15 V DD V SS DTACK R/W A1 A2 A3 A4 A5 A6 A7 A8 A9 V DD V SS A10 A11 PIN ASSIGNMENT ÎÎ Î ÎÎ Î ÎÎ Î ÎÎ Î Î Î ÎÎ Î Î ÎÎ Î ÎÎ Î ÎÎ Î Î ÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ ÎÎ Î ÎÎ Î ÎÎ Î ÎÎ Î Î Î ÎÎ Î Î ÎÎ Î ÎÎ Î ÎÎ Î Î ÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ ÎÎ ÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ ÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ ÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ ÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ ÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ ÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ ÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ ÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ ÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ ÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ ÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ ÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î ÎÎ ÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ Î Î Î ÎÎ Î Î ÎÎ ÎÎ Î Î ÎÎ Î Î Î ÎÎ Î Î ÎÎ ÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎÎ ÎÎÎ 60 41 40 61 D13 D12 D11 D10 VSS VDD D9 D8 D7 D6 D5 D4 D3 D2 VSS VDD D1 D0 TESTMODE RESET A13 TDI TDO TMS TCK VDD VSS INT IACK REQ ACK RDY DONE VDD VSS CS ISEL NC SYSCLK2 SYS_CLK_OUT 21 MCD221 2–2 DAOUT CLOUT WSOUT XDAI XWSI XCLI SUBCODE/EBU EFI CLI WSI DAI VSS V DD 1 SCLK MOSI MISO MODE_1 MODE_0 VDD VSS 80 20 MOTOROLA PIN DESCRIPTIONS SIGNAL DESCRIPTIONS Host Interface Type Name and Function A[13 … 1] Mnemonic O System Address Bus. The address must be stable before CS is asserted. Active HIGH. D[15 … 0] B System Data Bus. The data lines must be stable when CS is active during a write and before DTACK is asserted during a read. Tri–state. CS I Chip Select. Used to access the CIAP internal registers and buffers. Active LOW. R/W I Read/Write. Indicates the direction of the data transfer. When LOW, the transfer is to the CIAP. DTACK B Data Transfer Acknowledge. Active LOW. During normal host access, DTACK is an output indicating that data has been put on (read cycles) or read from (write cycles) the data bus. (Active pullup.) During DMA, DTACK is an input indicating that the memory has put data on the data bus. INT O Interrupt. Released when the interrupt status register is read. Active LOW. IACK I Interrupt Acknowledge. Active LOW. REQ O DMA Request. Active LOW. ACK I Acknowledge. DMA handshake signal indicating that the bus is available for data transfer. Active LOW. RDY O Ready. DMA handshake signal indicating that the CIAP has completed the data transfer. Tri–state. Active LOW. When released by the CIAP, the output is forced high for a few nanoseconds before it is made tri–state. DONE I Done. Indicates the last transfer of a DMA burst. Active LOW. Serial Interface ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÏÏÏÏÏÏ ÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÏÏÏÏÏÏ ÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÏÏÏÏÏÏ ÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÏÏÏÏÏÏ ÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÏÏÏÏÏÏ ÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÏÏÏÏÏÏ ÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÏÏÏÏÏÏ ÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÏÏÏÏÏÏ ÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÏÏÏÏÏÏ ÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÏÏÏÏÏÏ ÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÏÏÏÏÏÏ ÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÏÏÏÏÏÏ ÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÏÏÏÏÏÏ ÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÏÏÏÏÏÏ ÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÏÏÏÏÏÏ ÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Mnemonic Type Name and Function SCLK I Serial Clock. MOSI I Serial Data. Master out, slave in. MISO O Serial Data. Master in, slave out. MODE_0, MODE_1 I Serial Interface MODE bits. 00 = Write selected register 01 = Read selected register 10 = Write address 11 = No action Data Input Mnemonic Type Name and Function CLI I Serial Bit Clock Input. WSI I Word Clock Input. DAI I Serial Data Input. EFI I Error Flag Input. SUBCODE/EBU I Subcode (P … W) serial data input or EBU input for both main channel and subchannel. External Audio Interface Mnemonic Type Name and Function XCLI I External Audio Serial Bit Clock Input. When not used, the pin must be connected to VCC or VSS. XWSI I External Audio Word Clock Input. When not used, the pin must be connected to VCC or VSS. XDAI I External Audio Data Input. When not used, the pin must be connected to VCC or VSS. MOTOROLA MCD221 2–3 Audio Output Interface ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÏÏÏÏÏÏ ÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÏÏÏÏÏÏ ÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÏÏÏÏÏÏ ÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÏÏÏÏÏÏ ÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÏÏÏÏÏÏ ÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÏÏÏÏÏÏ ÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÏÏÏÏÏÏ ÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÏÏÏÏÏÏ ÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÏÏÏÏÏÏ ÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÏÏÏÏÏÏ ÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Mnemonic Type Name and Function CLOUT O Audio Output Serial Clock. WSOUT O Audio Output Word Clock. DAOUT O Audio Output Serial Data. General Mnemonic Type Name and Function SYS_CLK_OUT O 16.9344 MHz System Clock Output. SYSCLK2 I Double System Clock Frequency Input. Input for an oscillator with a frequency of 33.8688 MHz. RESET I Reset. Global reset for the CIAP. Active LOW. ISEL I Interface Select. 0 = Serial interface (no parallel access possible) 1 = 68000 interface (no serial access possible) TDI I Test Data Input. (Boundary scan input pin.) TDO O Test Data Output. (Boundary scan output pin.) TCK I Test Clock. (Boundary scan input pin.) TMS I Test Mode Select. (Boundary scan input pin.) TESTMODE O When 0, the CIAP is operational. When 1, the CIAP is in test mode. MCD221 2–4 MOTOROLA FUNCTIONAL DESCRIPTION DATA FLOW DIAGRAM MCD221 CIAP CD DATA IN EXTERNAL AUDIO IN AUDIO OUT DATA INPUT (DI) HOST INTERFACE (HI) AUDIO PROCESSOR (AP) CONTROLLER (MC) The MCD221 Data Flow Diagram should be used in conjunction with the following notes which outline the function of the various blocks within the device: • The data input module consists of two parts; a main channel decoder and a subchannel decoder. Both decoders can be active at the same time. The main channel decoder can be in different modes; CD–DA mode, CD–ROM mode, or CD–i mode. MOTOROLA 68xxx HOST INTERFACE • The audio processor module accepts an external audio input and, after processing, generates an audio output. • The microcode controller interface takes care of accepting commands and passing data to the different parts of the audio processing unit. • The host interface takes care of addressing the internal registers and buffers. The CIAP can interface with two possible hosts; a 68000 type host or a microcontroller that interfaces via a serial link. MCD221 2–5 REGISTER MEMORY MAP ÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÏÏÏÏÏ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÏÏÏÏÏ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÏÏÏÏÏ ÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÏÏÏÏÏ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÏÏÏÏÏ ÏÏÏÏÏ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÏÏÏÏÏ ÏÏÏÏÏ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÏÏÏÏÏ ÏÏÏÏÏ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÏÏÏÏÏ ÏÏÏÏÏ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÏÏÏÏÏ ÏÏÏÏÏ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÏÏÏÏÏ ÏÏÏÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÏÏÏÏÏ ÏÏÏÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÏÏÏÏÏ ÏÏÏÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÏÏÏÏÏ ÏÏÏÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÏÏÏÏÏ ÏÏÏÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÏÏÏÏÏ ÏÏÏÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÏÏÏÏÏ ÏÏÏÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÏÏÏÏÏ ÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÏÏÏÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÏÏÏÏÏ ÏÏÏÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ ÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÏÏÏÏÏ ÏÏÏÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ Table 1. Registers and Buffers Address (HEX) 0000 08FE 0900 11FE 1200 1B22 1B24 1B2C 1B2E 1B8C 1BC2 24E4 24E6 24EE 24F0 254E 2584 MCD221 2–6 Register Description — ADPCM buffer 0 — ADPCM buffer 1 — DATA buffer 0 — Q–buffer 0 — R … W buffer 0 — DATA buffer 1 — Q–buffer 1 — R … W buffer 1 IER Interrupt enable register 2586 ISR Interrupt status register 2588 TACS Temporal audio channel select register 258A AACS Actual audio channel select register 258C TCM1 Temporal channel mask register 258E ACM1 Actual channel mask register 1 2590 ACM2 Actual channel mask register 2 2592 FILE 2594 BMAN File selection register 2596 CCR 259A A_SHDW 25A0 AP_Left 25A2 AP_Right 25A4 AP_Vol Audio processor unit volume register 25A6 APCR Audio processor control register 25A8 ACONF Audio configuration register 25AA ASTAT Audio processor status register 25C0 ICR 25C2 DMACTL 25FE DLOAD Buffer management register CIAP control register ADPCM shadow register Audio processor unit left register Audio processor unit right register Interrupt control register DMA control register Download register MOTOROLA ELECTRICAL SPECIFICATIONS OPERATING RANGE The limits for operating the device are as follows: Ambient Temperature (TA) . . . . . . . . . . . . . . . . . . 0°C to 70°C Voltage, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 V ± 10% Voltage, VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V ÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ABSOLUTE MAXIMUM RATINGS* (Voltages Referenced to VSS, Unless Otherwise Noted) Symbol Min Max Unit Supply Voltage – 0.5 + 7.0 V VI Input Voltage – 1.5 VDD + 1.5 V VO Output Voltage – 0.5 VDD + 0.5 V IO Output Current — ± 25 mA Pd Power Dissipation — 1200 mW – 65 + 150 °C VDD Tstg Parameter Storage Temperature This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high–impedance circuit. * Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the limits in the Electrical Characteristics tables or Pin Descriptions section. ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ Î ÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎ ÎÎÎ DC ELECTRICAL CHARACTERISTICS (VDD = 5 V ± 10%, VSS = 0 V, TA = 0 to + 70°C, Unless Otherwise Noted) Parameter Symbol Conditions Min Max Unit Operating Supply Current IDD 33.8688 MHz — tba mA Input Voltage (TTL Input) VIH VIL — — 2.0 — — 0.8 V Output Voltage (8 mA) VOH VOL — — 3.5 — — 0.4 V Output Voltage (16 mA) VOH VOL — — 3.5 — — 0.4 V — — tba mW Power Dissipation MOTOROLA MCD221 2–7 APPLICATION EXAMPLES CIAP/CD–DRIVE ARCHITECTURE In conjunction with a suitable microcontroller, MC68HC05 (IKAT), the MCD221 provides the functionality to connect an MC68xxx host processor to a CD–Drive. The MCD221 de- codes both main and subchannel CD data and plays both ADPCM and CDDA audio. External I2S format audio (e.g., MPEG1) may be input and mixed with the CIAP audio. CIAP audio output can be in either I2S or Sony formats. 68xxx HOST INTERFACE CD DRIVE MC68HC05 (IKAT) BIDIRECTIONAL CONTROL INTERFACE I2S MAIN CHANNEL DATA MCD221 CIAP SUBCHANNEL DATA EXTERNAL AUDIO SOURCE (e.g., MCD270 MPEG DECODER) MCD221 2–8 (CD INTERFACE PLUS AUDIO PROCESSOR) EXTERNAL AUDIO IN I2S AUDIO OUT DAC L R MOTOROLA PACKAGE DIMENSIONS FU SUFFIX CASE 841B–01 L 60 41 61 S S D S -A,B,DDETAIL A 21 80 1 F 20 -DA 0.20 (0.008) M C A–B 0.05 (0.002) A–B 0.20 (0.008) M S H A–B S D S S D S N J D M E DETAIL C C -H- -CSEATING PLANE H A–B DETAIL A V P B M B B 0.20 (0.008) L S -B- 0.20 (0.008) M C A–B 0.05 (0.002) A–B -A- D 40 0.20 (0.008) DATUM PLANE M C A–B S D S SECTION B-B 0.01 (0.004) H M G U T DATUM PLANE -H- R K W X DETAIL C MOTOROLA Q NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DATUM PLANE -H- IS LOCATED AT BOTTOM OF LEAD AND IS COINCIDENT WITH THE LEAD WHERE THE LEAD EXITS THE PLASTIC BODY AT THE BOTTOM OF THE PARTING LINE. 4. DATUMS -A-, -B- AND -D- TO BE DETERMINED AT DATUM PLANE -H-. 5. DIMENSIONS S AND V TO BE DETERMINED AT SEATING PLANE -C-. 6. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE PROTRUSION IS 0.25 (0.010) PER SIDE. DIMENSIONS A AND B DO INCLUDE MOLD MISMATCH AND ARE DETERMINED AT DATUM PLANE -H-. 7. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. DIM A B C D E F G H J K L M N P Q R S T U V W X MILLIMETERS MIN MAX 14.10 13.90 14.10 13.90 2.45 2.15 0.38 0.22 2.40 2.00 0.33 0.22 0.65 BSC 0.25 — 0.23 0.13 0.95 0.65 12.35 BSC 10° 5° 0.13 0.17 0.325 BSC 0° 7° 0.30 0.13 16.95 17.45 — 0.13 0° — 16.95 17.45 0.35 0.45 1.6 REF INCHES MIN MAX 0.547 0.555 0.547 0.555 0.084 0.096 0.009 0.015 0.079 0.094 0.009 0.013 0.026 BSC 0.010 — 0.005 0.009 0.026 0.037 0.486 BSC 10° 5° 0.005 0.007 0.013 BSC 0° 7° 0.005 0.012 0.667 0.687 0.005 — 0° — 0.667 0.687 0.014 0.018 0.06 REF MCD221 2–9 Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different applications. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. Literature Distribution Centers: USA: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. EUROPE: Motorola Ltd.; European Literature Centre; 88 Tanners Drive, Blakelands, Milton Keynes, MK14 5BP, England. JAPAN: Nippon Motorola Ltd.; 4-32-1, Nishi-Gotanda, Shinagawa-ku, Tokyo 141, Japan. ASIA PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Center, No. 2 Dai King Street, Tai Po Industrial Estate, Tai Po, N.T., Hong Kong. MCD221 2–10 ◊ *MCD221TS/D* MCD221TS/D MOTOROLA