FSC110R Data Sheet April 1999 Radiation Hardened, SEGR Resistant N-Channel Power MOSFET Ordering Information Features 100K • 100V, 3.5A (Note), 0.600Ω • Total Dose - Meets Pre-RAD Specifications to 100K RAD (Si) • Single Event - SEE Immunity for 1E5 ions/cm2 having an LET of 36MeV/mg/cm2 and a Range of 36µm with VDS up to 80% of Rated Breakdown and VGS of 10V Off-Bias • Dose Rate - Typically Survives 3E9 RAD (Si)/s at 80% BVDSS - Typically Survives 2E12 if Current Limited to IDM RAD LEVEL File Number SCREENING LEVEL JANKC 4679 PART NUMBER/BRAND FSC110R Symbol D G S • Photo Current - 0.3nA Per-RAD(Si)/s Typically • Neutron - Maintain Pre-RAD Specifications for 3E13 Neutrons/cm2 - Usable to 3E14 Neutrons/cm2 NOTE: Current rating defined for TO-205AF package. ©2001 Fairchild Semiconductor Corporation FSC110R Rev. A FSC110R TC = 25oC, the Chip is 100% Probed to the Actual Conditions and Limits Specified Pre Radiation Electrical Specifications PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Drain to Source Breakdown Voltage BVDSS ID = 1mA, VGS = 0V 100 - - V Gate to Threshold Voltage VGS(TH) VGS = VDS, ID = 1mA 1.5 - 4.0 V Gate to Body Leakage Forward IGSSF VGS = +20V - - 100 nA Gate to Body Leakage Reverse IGSSR VGS = -20V - - 100 nA Drain Current IDSS VDS = 80V, VGS = 0V - - 0.025 mA Diode Forward Voltage VSD ID = 3.5A, VGD = 0V - 0.6 1.8 V ID = 12VA, VGS = 12V - - 0.600 Ω Drain to Source On Resistance rDS(ON) Post Radiation Electrical Specifications PARAMETER TC = 25oC, Unless Otherwise Specified. Testing Performed on TO-205AF Packaged Devices SYMBOL NOTES Drain to Source Breakdown Voltage BVDSS 3, 4 Gate to Source Threshold Voltage VGS(TH) Gate to Body Leakage Zero to Gate Voltage Drain Current TEST CONDITIONS MIN TYP MAX UNITS VGS = 0V, ID = 1mA 100 - - V 3, 4 VGS = VDS, ID = 1mA 1.5 - 4.0 V IGSS 2, 3, 4 VGS = ±20V, VDS = 0V - - 100 nA IDSS 3, 4 VGS = 0V, VDS = 80V - - 25 µA Drain to Source On Resistance rDS(ON) 1, 3, 4 VGS = 12V, ID = 2.5A - - 0.600 Ω Diode to Source On-State Voltage VDS(ON) 1, 3, 4 VGS = 12V, ID = 3.5A - - 2.21 V NOTES: 1. Pulse test, 300µs max. 2. Absolute value. 3. Gamma = 100K RAD (Si). 4. Insitu Gamma bias must be sampled for both VGS = +12V, VDS = 0V and VGS = 0V, VDS = 80% BVDSS. Single Event Effects (SEE) Note 5 ENVIRONMENT (NOTE 6) TYPICAL LET (MeV/mg/cm2) TYPICAL RANGE (µ) APPLIED VGS BIAS (V) (NOTE 7) MAXIMUM VDS BIAS (V) TEST SYMBOL ION SPECIES Single Event Effects Safe Operating Area SEESOA Ni 26 43 -20 100 Br 37 36 -10 100 Br 37 36 -15 80 Br 37 36 -20 50 NOTES: 5. Testing conducted at Brookhaven National Labs; sponsored by Naval Surface Warfare Center (NSWC), Crane, IN. 6. Fluence = 1E5 ions/cm2 (typical), T = 25oC. 7. Does not exhibit Single Event Burnout (SEB) or Single Event Gate Rupture (SEGR). ©2001 Fairchild Semiconductor Corporation FSC110R Rev. A FSC110R Harris Element Evaluation Based on “JANKC” Level of MIL-PRF-19500K, Amendment 1 MIL-STD-750 SUBGROUP TEST METHOD CONDITION 1 Wafer Probe/Electrical Test 2 Visual Inspection 2072 100% 3A Internal/Die Visual Inspection 2072 10 (0) 3B Sample Assembly All test samples assembled in the TO-205AF package. 10 Pieces Minimum (Note 8) 3C UIS/Gate Stress Pre-screen for unclamped inductive switching. Harris imposed testing. 10 Pieces Minimum (Note 8) 10 (0) 4 Per “Pre Radiation Electrical Specifications” Table in this data sheet. QUANTITY (ACCEPT NO.) Stabilization 1032 Condition C, t = 24 hours Temperature Cycling 1051 Condition C Constant Acceleration 2006 Y1 direction Electrical Test (Read and Record) High Temperature Gate Stress Group A, Subgroups 2, 3, and 4 (per FSL110 data sheet) 1042 Electrical Tests (Read and Record) High Temperature Drain Stress Condition B, t = 48 hours, VGS = 80% of rated value Group A, Subgroup 2 (per FSL110 data sheet) 1042 Electrical Test (Read and Record) Steady State Life Test 100% Condition A, t = 240 hours, VDS = 80% of rated value Group A, Subgroup 2 (per FSL110 data sheet) 1042 Electrical Test (Read and Record) Condition A, VDS = 80% of rated value at one of the following time/temperature conditions: Option A: TJ = 175oC, t = 240 hours, Option B: TJ = 150oC, t = 500 hours or Option C: TJ = 125oC, t = 1000 hours Group A, Subgroups 2 and 3 (per FSL110 data sheet) 5A Wire Bond Evaluation 2037 Condition A 10 (0) Wires or 20 (1) Wires 5B Die Shear Evaluation 2017 6 SEM 2077 Performed as part of wafer lot acceptance prior to element evaluation See Method 2077 7 Total Dose Irradiation 1019 100K RAD (Si). Performed on a wafer by wafer basis prior to element evaluation. See Method 1019 5 (0) NOTE: 8. Sample size is a minimum of 3 die per wafer and 10 die minimum per inspection lot. Sample acceptance per MIL-PRF-19500, paragraph G.5.3. ©2001 Fairchild Semiconductor Corporation FSC110R Rev. A FSC110R Die Characteristics CONTACT METALLIZATION: ATTACH AREAS: Gate and Source - Aluminum (4µ) Drain - Quad-Metal (Al-Ti-Ni-Au) [Al (3µ) - Ti (0.3µ) - Ni (1µ) - Au (0.05µ)] (S) Source - 0.028” x 0.054” (G) Gate - 0.010” x 0.029” (D) Drain- Back Side DIE THICKNESS: 14 mil ±1 mil Metallization Mask Layout FSC110R 100 mils 57 mils ©2001 Fairchild Semiconductor Corporation FSC110R Rev. A TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DenseTrench™ DOME™ EcoSPARK™ E2CMOSTM EnSignaTM FACT™ FACT Quiet Series™ FAST FASTr™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ LittleFET™ MicroFET™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ PowerTrench QFET™ QS™ QT Optoelectronics™ Quiet Series™ SILENT SWITCHER SMART START™ Star* Power™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ UHC™ UltraFET™ VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. H