Ordering number: ENN*6585 CMOS IC LC7958NC 64-Bit LED Driver for 300 dpi Printers Preliminary Overview LC7958NC is a 64-bit constant current LED driver IC designed to directly drive LED head array. The output terminals for LED drive are arranged in 2-row staggered position of 80-µm pitch at one side. It enables drive of LED Array of 300-dpi in one side disposition, 600dpi in both sides disposition Features and Functions • Logic voltage (VDD): +5 V ± 10 % • LED drive current (IOH): 5.0 mA (TYP) • Clock frequency (fc): 10 MHz • Output current control circuit built in • Mode switching function by the SEL pin • Chip size: 1.43 mm × 5.39 mm • Number of pads: 86 • 64-bit shift register circuit • 64-bit latch circuit • Output driver on/off switching function • Constant current circuit • 64-bit p-channel open drain LED driver Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications. SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein. 42800RM6585-1/11 LC7958NC The characteristics shown below are those of devices encapsulated in the SANYO standard ceramic package Specifications Absolute Maximum Ratings at Vss=0V Parameter Power supply voltage Symbol VDD1 VDD2 Input voltage Output voltage Driver output current Operating Junction temperature Storage temperature Conditions Ratings Unit -0.3 to 6.5 Ta = 25 °C V -0.3 to 6.5 VI Ta = 25 °C -0.3 to VDD1+ 0.3 V VO Ta = 25 °C -0.3 to VDD1+ 0.3 V IOUT 0 to -10 mA Tj -10 to 125 °C Tstg -35 to 125 °C Allowable Operating Ranges at Vss = 0 V, VDD1 = VDD2 = 5 V ± 10%, Ta = 0 to 100°C Parameter Symbol Ratings Conditions min Power supply voltage VDD1,VDD2 Potential difference*1 VDF High-level input voltage VIH Low-level input voltage VIL Clock frequency VDD1(pad 2), VDD2(pad 6) Between VDD1 and VDD2 All inputs typ 4.5 Unit max 5.5 V -0.3 0 0.3 2.0 VDD1 V 0 0.8 V 10 MHz 65 % fc CLOCK 1 D CLK CLOCK 1 35 tsc SI, CLOCK 1 30 ns thold SI, CLOCK 1 10 ns tSL LOAD 1, CLOCK 1 50 ns Hold time from LOAD1 to CLOCK1 tHL LOAD 1, CLOCK 1 50 ns LOAD1 pulse width tWL LOAD 1 40 ns Clock duty Setup time from SI to CLOCK1 Hold time from CLOCK1 to SI Setup time from CLOCK1 to LOAD1 CLOCK1 rise/fall time LOAD1 rise/fall time tCr tCf tLr tLf 50 CLOCK 1 35 ns LOAD 1 35 ns *1:In case potential difference occurred between VDD1 and VDD2, Driver current value changes. Therefore using it with VDD1=VDD2 is recommended. 6585-2/11 LC7958NC Electrical Characteristics at VSS = 0 V, VDD1 = VDD2 = 5 V ± 10%, Ta = 0 to 100°C Parameter Symbol Ratings Conditions min High-level output voltage VOH LOAD2, S0, CLOCK2: IO = -200µA Low-level output voltage VOL LOAD2, S0, CLOCK2: IO = 200µA Clock frequency fc High-level input current IIH Low-level input current typ Unit max VDD - V 0.5 0.5 10 V MHz All input pads: VDD1 = 5.5 V, VI = 1.0 5.5 V IIL1 LOAD1, SI, CLOCK1, STROBE, IIL2 SEL, ADJ(-), ADJ(+): VDD1 = VDD2 -8 -25 -50 IIL3 = 5.5 V, VI = 0 V -40 -100 -200 VDD1 = VDD2 = 5.0 V, VO = 1.6 V, -3.7 -5.0 -6.7 -6.0 -7.0 µA -1.0 µA DO1 to DO64: operation mode 1, High-level output current IOH1 mA VREF = 1.8 V High-level output current minus correction High-level output current plus correction High-level output current relative error between bits Output off leakage current Operating current drain (mode 1) DO1 to DO64: operation mode 2 IOH2 VDD1 = VDD2 = 5.0 V, VO = 1.6 V, -4.5 VREF = 1.8 V % DO1 to DO64: operation mode 3 IOH3 VDD1 = VDD2 = 5.0 V, VO = 1.6 V, +4.5 +6.0 +7.0 VREF = 1.8 V ∆IOH IOL DO1 to DO64: with all bits on DO1 to DO64: operation VDD1 = 5.5 V, VO = 0 V -5.0 +5.0 % 0 -50 µA 9.0 13.0 mA 2.5 4.0 mA VDD1: VDD1 = VDD2 = 5.5 V, IDD VREF = 1.8 V, fc = 10 MHz, with DO1 to DO64 off VDD1: VDD1 = VDD2 = 5.5 V, VREF Standby current IDDS = 1.8 V, with fc stopped, with DO1 to DO64 off 6585-3/11 LC7958NC Switching Characteristics at VSS = 0 V, VDD1 = VDD2 = 5 V ± 10%, Ta = 0 to 100°C Parameter Symbol Ratings Conditions min SO output rise time tor SO output fall time tof Output transmission delay tpsr STROBE, DO1 to DO64: CL = 10.8 time from STROBE to DO tpsf pF, RF = 10 kΩ Output transmission delay tpcr time from CLOCK2 to SO tpcf CLOCK1→CLOCK2 tPH CLOC1, CLOCK2, LOAD1, LOAD2: transmission delay time tPL CL=10.8 pF typ SO: CL=10.8pF CLOCK2, SO Unit max 10 50 ns 250 ns 70 ns 40 ns Equivalent Circuit Block Diagram DO1 VREF Constant current circuit DO64 VDD2 64-bit constant current driver VDD1 VSS ADJ(+) ADJ(-) STROBE SEL 64-bit latch LOAD1 LOAD2 SI 64-bit shift register SO CLOCK1 CLOCK2 6585-4/11 LC7958NC Sample Application Circuit Diagram GND (Input signal) STROBE DO1 VREF SI CL OCK1 VSS VDD1 OPEN LED VDD2 LOAD1 VREF SEL STROBE array ADJ(-) ADJ(+) VSS VDD 2 VDD 1 LOAD2 CL OCK SO DO64 DO 1 SI CL OCK1 LED LOAD1 VREF SEL STROB array ADJ(-) ADJ(+) VSS VDD 2 VDD 1 LOAD CL OCK SO DO64 (To the next input stage) Note 1: The electric potential of the IC substrate is at VDD1. Note 2: The number of cascade connection stages should be within 60. (10MHz) Note 3: All VDD2 terminals should be bonded. Note 4: Leave the SEL Terminal of the odd-numbered IC open, and connect the SEL terminal of even-numbered IC with VSS. Note 5: Apply the stable potential other than the VDD1 and VDD2 lines to the VREF terminal. 6585-5/11 LC7958NC Function Table 1. Shift Register and Latch Blocks SEL CLOCK1 Falling edge LOAD1 Shift register Latch DATA load and DATA - - shift Rising edge - DATA keep - - High - DATA load - Low - DATA keep High Falling edge DATA load and DATA - - shift Rising edge - DATA keep - - Low - DATA load - High - DATA keep Low 2. Output Block STROBE SI DO output High “×” OFF Low Low OFF Low High ON Note 1: "×": don’t care Establishment of Output Current MODE ADJ(+) ADJ(-) Current control IOH(typ) resistance 1 Low Low Built in (RINT) VREF/RINT × 10 2 Low High Built in (RINT) VREF/RINT × 10 × 0.94 3 High Low Built in (RINT) VREF/RINT× 10 × 1.06 Note 2: RINT(TYP) = 3.61 kΩ *Complement explanation Here shows the general usage of the modes 1 to 3 as follows. MODE 1 is set by connecting the ADJ(+) and ADJ(-) terminals with VSS. In the MODE1 state, by cutting the bonding wire connected with ADJ(+) or ADJ(-), the IC enters the MODE2 or MODE3, respectively. The current in MODE1 can be corrected by about –6 % or +6 % in MODE2 or MODE3, respectively. 6585-6/11 LC7958NC Ranking by Output Current 1. Test condition: VDD1 = VDD2 = 5.0 V, VREF = 1.8 V, VO = 1.6 V, Ta = 25 °C 2. Ranking determination: The rank is determined by the average ON current (Iave) of the terminals DO1 to DO64 when the all DO outputs are on. 3. Current width: (Imax - Imin)/(Imax + Imin) ≈ 2.0 % Rank Specification [mA] A B C - 1 - -3.700 to -3.853 - 2 - -3.854 to -4.011 - 3 - -4.012 to -4.177 1 4 - -4.178 to -4.347 2 5 - -4.348 to -4.524 3 6 - -4.525 to -4.708 4 7 1 -4.709 to -4.900 5 8 2 -4.901 to -5.100 6 9 3 -5.101 to -5.308 7 - 4 -5.309 to -5.524 8 - 5 -5.525 to -5.749 9 - 6 -5.750 to -5.983 - - 7 -5.984 to -6.227 - - 8 -6.228 to -6.481 - - 9 -6.482 to -6.700 * * * Rejected article (for the manufacturing process control) Note: The chips of Ranking No. "*" are marked with the ink ON Current Deviation in a Chip Test condition: VDD1 = VDD2 = 5.0 V, VO = 1.6 V, VREF = 1.8 V, Ta = 25 °C 1. Let the average ON current of the terminals DO4, 12, 20, 28, 36, 44, 52, and 60 be Cave, the that of the terminals DO1, 12, 20, and 28 be Lave, and that of the terminals DO36, 44, 52, and 60 be Rave: then the relationship among the Cave, Lave, and Rave should be as follows. | Lave - Cave | / Cave ≤ 2.5 %, | Rave - Cave | / Cave ≤ 2.5 % 2. Let the average ON current of DO1 to DO8, DO29 to DO36, and DO57 to DO64 be I1, I2, and I3, respectively: the relationship among the I1, I2, and I3 should be as follows. | In - Iave | / Iave ≤ 2.5 %, Iave: Average ON current of the DO1 to DO64. In: I2, and I3 6585-7/11 LC7958NC Timing Chart (SEL = High) 1/fc CLOCK1 CLOCK2 tsc thold tPL tPH SI tpcr tpcf SO tW tSL LOAD1 tHL LOAD2 tPH tPL STROB tpsr tpsf DOn(on) DOn(off) tCr tor 90 % CLOCK1 LOAD1 tCf tof 90 % SO 10 % 10 % 6585-8/11 LC7958NC Pad Assignment 85 16 86 22 15 21 Y X 20 (0,0) 19 18 Chip size: 5.39 mm × 1.43 mm Pad size: (PV open) 110 µm × 110 µm (Others) 2 23 24 Φ 110 µm (VDD2) 100 µm × 100 µm (DOn) 17 1 Chip thickness: 330 µm ± 30 µm 6585-9/11 LC7958NC Pad Coordinates No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 Pin SI CLOCK1 LOAD1 VDD VREF SEL STROBE VSS NC ADJ(-) ADJ(+) VSS VDD LOAD2 CLOCK2 S0 VDD2 VDD2 VDD2 VDD2 VDD2 VDD2 DO1 D02 DO3 DO4 DO5 DO6 DO7 DO8 DO9 DO10 DO11 DO12 DO13 DO14 DO15 DO16 DO17 DO18 DO19 DO20 DO21 Unit: µm X -2520 -2040 -1800 -1560 -1080 -840 -600 -120 120 600 840 1080 1560 1800 2040 2520 -2280 -1320 -360 360 1320 2280 -2520 -2440 -2360 -2280 -2200 -2120 -2040 -1960 -1880 -1800 -1720 -1640 -1560 -1480 -1400 -1320 -1240 -1160 -1080 -1000 -920 Y -484 -484 -484 -484 -484 -484 -484 -484 -484 -484 -484 -484 -484 -484 -484 -484 18 18 18 18 18 18 539 398 539 398 539 398 539 398 539 398 539 398 539 398 539 398 539 398 539 398 539 No. 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 Pin DO22 DO23 DO24 DO25 DO26 DO27 DO28 DO29 DO30 DO31 DO32 DO33 DO34 DO35 DO36 DO37 DO38 DO39 DO40 DO41 DO42 DO43 DO44 DO45 DO46 DO47 DO48 DO49 DO50 DO51 DO52 DO53 DO54 DO55 DO56 DO57 DO58 DO59 DO60 DO61 DO62 DO63 DO64 X -840 -760 -680 -600 -520 -440 -360 -280 -200 -120 -40 40 120 200 280 360 440 520 600 680 760 840 920 1000 1080 1160 1240 1320 1400 1480 1560 1640 1720 1800 1880 1960 2040 2120 2200 2280 2360 2440 2520 Y 398 539 398 539 398 539 398 539 398 539 398 539 398 539 398 539 398 539 398 539 398 539 398 539 398 539 398 539 398 539 398 539 398 539 398 539 398 539 398 539 398 539 398 6585-10/11 LC7958NC Specifications of any and all SANYO products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO products(including technical data,services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be expor ted without obtaining the expor t license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Electric Co., Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only ; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of May, 2000 . Specifications and information herein are subject to change without notice. PS 6585-11/11