PAC7311 PAC7311 VGA PC Camera Single-Chip General Description The PAC7311 is a single chip with an embedded VGA CMOS image sensor and USB 1.1 interface. It has JPEG image compression and image processing. The generic application is a PC camera. JPEG decoder and auto exposure are performed by software in PC side. And the optical size is 1/4” which can easily be embedded in LCD monitors, notebooks or PDA. There are 4 IO-trapping pins with internal pull-low resistors. It is flexible for customers to set PID. It supports the interface to a serial-EEPROM. When the EEPROM function is enabled, the internal control registers can be power-up loaded from external EEPROM. This allows customization of VID, PID, product string. Features Key Specification z VGA resolution, ~1/4”Lens z Frame rate up to 30fps at following resolution format VGA format (640x480) with JPEG compression CIF format (352x288) with JPEG compression QVGA format (320x240) with JPEG compression QCIF format (176x144) without compression QQVGA format (160x120) without compression z RGB Bayer’s pattern raw data Up to 3fps @VGA format (640x480) Up to 12fps @CIF format (352x288) Up to 12fps @QVGA format (320x240) Up to 30fps @QCIF format (176x144) Up to 30fps @QQVGA format (160x120) z Standard JPEG compression engine comply to ISO/IEC 10918-1(JPEG) z AEC/AGC/AWB automatic z 4 IO-trapping pins to set USB PID z Support USB suspend mode z Support video data transfer through USB isochronous transfer z Snapshot control through USB interrupt pipe z USB Vendor ID, Product ID, device release number and the string descriptor index via a serial EEPROM (93C46) or by metal mask z Complete Universal Serial Bus® spec V1.1 compatibility Supply Voltage 5.0V ± 10% Resolution 640 (H) x 480 (V) Array Diagonal 4.48mm Optical format 1/4“ Pixel Size 5.6um x 5.6um Frame Rate Up to 30fps System Clock 12MHz Color Filter RGB Bayer Pattern Scan mode Progressive Sensitivity 3.06 V/lux*sec PGA gain 23.52dB (Max.) S/N ratio >45dB Power consumption 65mA Package 48-pin PLCC / 37-pin CSP Ordering Information Order number Package Type Package Size(mm) PAC7311PE PAC7311CS 48-pin PLCC 37-pin CSP 11.43 x 11.43 5.06 x 5.55 All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 1 V1.5 Oct. 2005 PixArt Imaging Inc. PAC7311 VGA PC Camera Single-Chip 1. Pin Assignment 1.1 PLCC Package Pin# 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 Name NC NC NC VRB VCM NC NC VRT VDDA VDDAY EPR_DO VSSQ VDDQ EPR_CS/TR2 EPR_CK/TR3 EPR_DI/TR1 VSSAY NC NC GPO/TR0 LED NC VSSQ EPR_EN IOTRAP# KEY# NC VSSQ VDDD PWR_5V NC VDDQ GPIO TEST NC RESET# VSSQ XOUT XIN DP DN NC VDDQ VDDP VDDAD VDDAV VSSA PWR_5V Type BYPASS BYPASS BYPASS BYPASS BYPASS IN GND BYPASS OUT OUT OUT GND OUT OUT GND IN IN IN GND BYPASS PWR BYPASS IO IN IN GND OUT IN I/O I/O BYPASS BYPASS BYPASS BYPASS GND PWR Description No Connection No Connection No Connection Analog voltage reference Analog voltage reference No Connection No Connection Analog voltage reference Analog power for AD/DA/PGA, 2.5V Sensor reset power reference Data output of EEPROM Ground for I/O and PHY Power for I/O and PHY Chip Select of EEPROM; (IO trap pin for PID2, internal pull-down 100Kohm) Serial clock of EEPROM; (IO trap pin for PID3, internal pull-down 100Kohm) Data input of EEPROM; (IO trap pin for PID1, internal pull-down 100Kohm) Sensor ground No Connection No Connection General purpose output; (IO trap pin for PID0, internal pull-down 100Kohm) LED driver No Connection Ground for I/O and PHY Enable signal of EEPROM (1: enable, 0: disable), internal pull-down 100Kohm I/O trap enable signal (0: enable, 1: disable, internal pull-down 100Kohm) Snapshot control signal (Active Low, internal pull-up 100Kohm) No Connection Ground for I/O and PHY Logic power for mixed-mode circuit, 2.5V Main power, USB bus power No Connection Power for I/O and PHY, 3.3V General purpose input/output, internal pull-down 100Kohm Test pin. Connect to GND in normal operation mode No Connection Chip power up reset Ground for I/O and PHY Crystal output Crystal input DP for USB1.1 PHY DN for USB1.1 PHY No Connection Power for I/O and PHY Analog power for PLL Analog voltage reference power for core logic, 2.5V Analog voltage reference Analog ground Main power, USB bus power All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 2 V1.5 Oct. 2005 PixArt Imaging Inc. PAC7311 VGA PC Camera Single-Chip 1.2 CSP Package Pin# 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 Name NC VRB VCM VRT VDDA VDDAY EPR_DO VSSQ VDDQ EPR_CS/TR2 EPR_CK/TR3 EPR_DI/TR1 VSSAY GPI/TR0 LED EPR_EN IOTRAP# KEY# NC VSSQ VDDD PWR_5V VDDQ GPIO TEST RESET# VSSQ XOUT XIN DP DN VDDQ VDDP VDDAD VDDAV VSSA PWR_5V Type BYPASS BYPASS BYPASS BYPASS BYPASS IN GND BYPASS OUT OUT OUT GND OUT OUT IN IN IN GND BYPASS PWR BYPASS IO IN IN GND OUT IN I/O I/O BYPASS BYPASS BYPASS BYPASS GND PWR Description No Connection Analog voltage reference Analog voltage reference Analog voltage reference Analog power for AD/DA/PGA, 2.5V Sensor reset power reference Data output of EEPROM Ground for I/O and PHY Power for I/O and PHY Chip Select of EEPROM; (IO trap pin for PID2, internal pull-down 100Kohm) Serial clock of EEPROM; (IO trap pin for PID3, internal pull-down 100Kohm) Data input of EEPROM; (IO trap pin for PID1, internal pull-down 100Kohm) Sensor ground General purpose output; (IO trap pin for PID0, internal pull-down 100Kohm) LED driver Enable signal of EEPROM (1: enable, 0: disable), internal pull-down 100Kohm I/O trap enable signal (0: enable, 1: disable, internal pull-down 100Kohm) Snapshot control signal (Active Low, internal pull-up 100Kohm) No Connection Ground for I/O and PHY Logic power for mixed-mode circuit, 2.5V Main power, USB bus power Power for I/O and PHY General purpose input/output, internal pull-down 100Kohm Test pin. Connect to GND in normal operation mode Chip power up reset Ground for I/O and PHY Crystal output Crystal input DP for USB1.1 PHY DN for USB1.1 PHY Power for I/O and PHY, 3.3V Analog power for PLL Analog voltage reference power for core logic, 2.5V Analog voltage reference Analog ground Main power, USB bus power All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 3 V1.5 Oct. 2005 PixArt Imaging Inc. PAC7311 VGA PC Camera Single-Chip 2. Block Diagram PAC7311 is a single-chip USB camera. It includes a VGA sensor based on PixArt VGA sensor with enhanced image quality and sensitivity, a 48MHz PLL, internal regulators, JPEG image compression, image processing schemed, control registers, on-chip SRAM for image data buffer and USB controller. All register parameters are set by USB interface. And the JPEG compressed image data is transmitted by USB 1.1 isochronous pipe. All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 4 V1.5 Oct. 2005 PixArt Imaging Inc. PAC7311 VGA PC Camera Single-Chip 3. Function Description 3.1 Analog Data Path The PixArt VGA sensor is a 1/4inch CMOS imaging sensor with 644x488 physical pixels. The active region of sensor array is 644x484. The sensor array is cover with Bayer pattern color filters and micro lens. After a programmable exposure time, the image is sampled first with CDS (Correlated Double Sampling) block to improve S/N ration and reduce fixed pattern noise. Three analog gain stages are implemented before signal transferred by the 10bit ADC. The front gain stage (FG) can be programmed to fit the saturation level of sensor to the full-range input of ADC. The programmable color gain stage (CG) is used to balance the luminance response difference between B/G/R. The global gain stage (GG) is programmed to adapt the gain to the image luminance. The fine gained signal will be digitized by the on-chip 10bit ADC. After the image data has been digitized, further alteration to the signal can be applied before the data is output. The gain stage can be set by digital register, please refer to the following equation to get the mapping gain. Front Gain = 2 + (n/4), n = 0, 1, 2, …7 Color Gain = 1 + (m/16), m= 0, 1, 2, …15 Global Gain = 1 + (q/16), q = 0, 1, 2, …15 All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 5 V1.5 Oct. 2005 PixArt Imaging Inc. PAC7311 VGA PC Camera Single-Chip 4. Specifications Absolute Maximum Ratings Exposure to absolute maximum rating may affect device reliability. Symbol Parameter Min Max Unit VDD DC supply voltage -0.5 5.5 V VIN DC input voltage 0.5 3.8 V VOUT DC output voltage -0.5 3.8 V TSTG Storage temperature 0 70 ℃ Notes Recommend Operating Condition Symbol Parameter TA Operating Temperature VDD Power supply voltage FCLK System clock frequency Min Typ. Max Unit Notes 0 - 40 °C 4.25 5.0 5.5 V - 12 - MHz Max. Unit Notes mA @30 frame/sec DC Electrical Characteristics (Typical values at 25°C, VDD =5.0 V) Symbol Parameter Min. Typ. Type: PWR IDD Operating Current 65 Type: IN & I/O, Reset VIH Input voltage HIGH 2.0 VDDQ V VIL Input voltage LOW 0 0.8 V CIN Input capacitor 10 pF ILKG Input leakage current 1.0 uA Type: OUT & I/O VOH Output voltage HIGH VOL Output voltage LOW VDDQ-0.2 0.2 V CL= 10pf, RL=1.2kΩ V CL= 10pf, RL=1.2kΩ Sensor Characteristics (Light source: 3200K halogen lamp; 8bit resolutions) Symbol Parameter Min. Typ. Max. Unit PRNU Photo response non-uniformity - 1.3 - % VSAT Saturation output voltage - 0.832 - V Dark output voltage - 0.055 - V/sec Dark signal non-uniformity - 0.001 - V R Sensitivity (Red channel) - 4.590 - V/Lux*sec G Sensitivity (Green channel) - 3.060 - V/Lux*sec B Sensitivity (Blue channel) - 2.448 - V/Lux*sec VDARK DSNU Notes All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 6 V1.5 Oct. 2005 PixArt Imaging Inc. PAC7311 VGA PC Camera Single-Chip 5. Package Information 5.1 PLCC Pin Assignment and Optical Center Information Note: Sensor Array Center = Package Center --TOP VIEW— All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 7 V1.5 Oct. 2005 PixArt Imaging Inc. PAC7311 VGA PC Camera Single-Chip 5.2 PLCC Package Outline Dimension 18 7 6 19 1 48 43 30 31 42 -- TOP VIEW -- All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 8 V1.5 Oct. 2005 PixArt Imaging Inc. PAC7311 VGA PC Camera Single-Chip 5.3 CSP Pin Assignment VSSAY EPR_DI/TR1 EPR_CK/TR3 VDDQ EPR_CS/TR2 VSSQ EPR_DO VDDAY VRT VDDA Leads & BGA Formation VRT VDDA VDDAY EPR_DO VSSQ VDDQ EPR_CK/TR3 EPR_CS/TR2 EPR_DI/TR1 VSSAY Pad Extension Formation GPO/TR0 VCM VCM GPO/TR0 LED VRB VRB LED NC NC EPR_EN EPR_EN Sensor Area IOTRAP# PWR_5V VSSA KEY# PWR_5V IOTRAP# VSSA KEY# NNN NNN Top view (Bumps down) Step Size：5061 × 5551 um Die Size：4841 × 5331 um Ball Pitch：650 um Ball Diameter：300 um Scribe Line：360 um NC VDDQ TEST VSSQ GPIO RESET# VSSQ XOUT XIN DP DN DN PWR_5V DP VDDD VDDQ XIN VDDP VDDQ XOUT VDDP VSSQ VDDD PWR_5V RESET# VDDAD TEST VDDAV VDDAD GPIO VDDAV VDDQ NC VSSQ Buttom view (Bumps up) Package Size：4966 × 5456 um Marking Code：NNNNNN - Datecode 5.4 Recommend PCB Layout All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 9 V1.5 Oct. 2005 PixArt Imaging Inc. PAC7311 VGA PC Camera Single-Chip 5.4 CSP Package Dimensions and Ball Matrix Table 1 2 3 4 5 6 A VSSAY(PIN 13) EPR_DI/TR(PIN 12) EPR _CS/TR2(PIN 10) VSSQ(PIN 8) VDDAY(PIN 6) VRT(PIN 4) B LED(PIN 15) GPO/TR0(PIN 14) VDDQ(PIN 9) EPR _D0(PIN 7) VCM(PIN 3) VRB(PIN 2) C VSSQ/EPR_EN(PIN 16) EPR _CK/TR3(PIN 11) VDDA(PIN 5) NC(PIN 1) PWR_5V(PIN 37) D IOTRAP# (PIN 17) KEY# (PIN 18) VDDAV(PIN 35) VSSA(PIN 36) E NC(PIN 19) VSSQ(PIN 20) VDDP(PIN 33) VDDAD(PIN 34) F VDDD(PIN 21) PWR_5V(PIN 22) RESET# (PIN 26) XOUT(PIN 28) DP(PIN 30) VDDQ(PIN 32) G VDDQ(PIN 23) GPIO(PIN 24) TEST(PIN 25) VSSQ(PIN 27) XIN(PIN 29) DN(PIN 31) A E S1 2 3 4 5 J1 6 6 5 4 3 2 1 886.095 A B A J2 F S2 1 B C C D 158.28 E E F F G G NNN NNN Center of BGA= Center of package Center of sensor Top view (Bumps down) Bottom view (Bumps up) C3 B D C1 C C2 Marking Code：NNNNNN - Datecode Side view Package Body Dimension X Package Body Dimension Y Package Height Ball Height Package Body Thickness Thickness of Glass surface to wafer Ball Diameter Total Pin Count Pin Count X axis Pin Count Y axis Pins Pitch X axis Pins Pitch Y axis Edge to Pin Center Distance analog X Edge to Pin Center Distance analog Y Edge to Optical Center Distance analog X Edge to Optical Center Distance analog Y Symbol Nominal A B C C1 C2 C3 D N N1 N2 J1 J2 S1 S2 E F 4966 5456 800 160 640 415 300 37 6 7 650 650 858 778 2325 1842 Min. µm 4941 5431 740 130 605 395 270 Max. 4991 5481 860 190 675 435 330 828 748 2300 1817 888 808 2350 1867 All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 10 V1.5 Oct. 2005 PixArt Imaging Inc. PAC7311 VGA PC Camera Single-Chip 6. Reference Application Circuit 6.1 PLCC Package (PAC7311PE) VDDQ VRT 7 8 VDDAD VDDQ VCM 4 VRB C3 1uF R4 1M 47 VSSA 46 VDDAV 45 VDDAD 44 VDDP 43 L4 VSSQ C6 1uF VDDAV C7 1uF VDDAD C8 1uF VRT C9 1uF C11 1uF VCM C12 1uF VDDAY C13 0.1uF C10 1uF 5 4 3 2 1 Short / 3.3uH GND2 NC + +5V L1 3.3uH L2 Open/3.3uH VSSA VSSAY VSSA USBGND VSSQ VDD5V CON1 MINI USB 5P VSSAY C14 10uF C15 0.1uF C20 10uF 6 7 R7 27 ohm 47pF VDDA + 9 8 VDD5V C5 VDDQ HC4 HC3 VSSQ 1.5K 47pF VDD5V VRB HC1 HC2 DP DN Short / 3.3uH C4 X1 12MHz XIN 48 LED C1 1uF KEY VDDP XOUT VSSQ R5 L3 S1 1uF VDDQ R6 27 ohm RST# C2 2 1 LED D1 VDDD 3 42 DP 41 40 5 10k DN DP 32 31 RST# VSSQ 6 NC PWR_5V DN VDDP XIN VDDD VDDQ KEY NC VDDA VRT 9 VDDA EPR_DO VDDAY 11 12 VSSQ 13 VDDQ 14 EPR_CS/TR2 15 EPR_CK/TR3 16 EPR_DI/TR1 17 VDDAV VSSQ NC VDD5V NC XOUT 30 VSSA 39 29 PWR_5V KEY # XIN VDDD PAC7311PE IOTRAP# VSSQ 28 VSSQ NC 38 27 NC EPR_EN XOUT 26 VSSQ RESET# KEY NC 37 25 VCM 36 24 NC NC NC VSSQ U1 VRB TEST 23 R1 R2 1K R3 51k LED 35 22 GPO/TR0 GPIO 21 34 LED NC VDDQ 20 33 19 VSSAY NC 18 VDDQ 10 VSSQ VDDAY VSSAY VSSQ 0.1uF R8 10M 10uF C21 4.7nF USBGND VDDQ + 20pF C16 + C22 0.1uF C23 10uF + 20pF C19 C24 0.1uF C25 10uF + C18 C26 0.1uF C27 10uF + C17 C28 0.1uF VSSQ All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 11 V1.5 Oct. 2005 PixArt Imaging Inc. PAC7311 VGA PC Camera Single-Chip 6.2 CSP Package (PAC7311CS) VDDQ VDDQ VSSAY R1 R2 1K VSSQ VDDAY VDDA VRT KEY 13 12 11 10 9 8 7 6 5 4 VSSQ VDDD PAC7311CS C2 1uF VDDP C3 1uF 3 2 1 37 36 35 34 33 32 VCM VRB NC PWR_5V VSSA VDDAV VDDAD VDDP VDDQ XOUT VCM VRB VDDAV VDDAD VDDP VDD5V VSSA VDDQ 23 24 25 RST# 26 27 XOUT 28 XIN 29 DP 30 DN 31 9 8 1.5K DP DN XIN L4 C5 47pF VSSQ VDDA C6 1uF VDDAV C7 1uF VDDAD C8 1uF VRT C9 1uF C11 1uF VCM C12 1uF VDDAY C13 0.1uF C10 1uF Short / 3.3uH GND2 NC + +5V L1 3.3uH L2 Open/3.3uH VSSA VSSAY VSSA USBGND VSSQ VDD5V VSSAY C14 10uF CON1 MINI USB 5P C15 0.1uF C20 10uF VSSQ C19 0.1uF C16 + R8 10M C21 4.7nF 10uF USBGND VDDQ C22 0.1uF C23 10uF + 20pF C24 0.1uF C25 10uF + C18 20pF C26 0.1uF C27 10uF + C17 + 6 7 R7 27 ohm VDD5V 5 4 3 2 1 HC4 HC3 VSSQ HC1 HC2 Short / 3.3uH 47pF X1 12MHz VSSQ R5 L3 C4 R4 1M VDDQ R6 27 ohm KEY VDDD VRB VDDQ S1 LED C1 1uF U1 VDDQ GPIO TEST RESET# VSSQ XOUT XIN DP DN VDD5V GPO/TR0 LED EPR_EN IOTRAP# KEY # NC VSSQ VDDD PWR_5V RST# + KEY VSSAY EPR_DI/TR1 EPR_SK/TR3 EPR_CS/TR2 VDDQ VSSQ EPR_DO VDDAY VDDA VRT 14 15 16 17 18 19 20 21 22 LED D1 R3 51k LED 10k C28 0.1uF VSSQ All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 12 V1.5 Oct. 2005 PixArt Imaging Inc. PAC7311 VGA PC Camera Single-Chip 7. Update History Version V1.0 V1.1 V1.2 V1.3 V1.4 V1.5 Update Creation, Preliminary 1st version 4. Specifications 5. Package information 4. Specifications 5. Package information 4. Specifications 5. Package information 6. Reference Application Circuit 5. Package information 6. Reference Application Circuit General Description 5. Package information 6. Reference Application Circuit (Change list: C4, C5, L2) Date 10/27/2004 10/29/2004 11/04/2004 06/28/2005 07/01/2005 10/07/2005 All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 13 V1.5 Oct. 2005