RFF60P06 Data Sheet September 1998 25A†, 60V, 0.030 Ohm, P-Channel Power MOSFET The RFF60P06 P-Channel power MOSFET is manufactured using the MegaFET process. This process, which uses feature sizes approaching those of LSI circuits gives optimum utilization of silicon, resulting in outstanding performance. It was designed for use in applications such as switching regulators, switching converters, motor drivers, and relay drivers. These transistors can be operated directly from integrated circuits. Reliability screening is available as either commercial or TX/TXV equivalent of MIL-S-19500. Contact Intersil Corporation High-Reliability Marketing group for any desired deviations from the data sheet. File Number 3975.2 Features • 25A, 60V • rDS(ON) = 0.030Ω • Temperature Compensating PSPICE® Model • Peak Current vs Pulse Width Curve • UIS Rating Curve • 150oC Operating Temperature • Reliability Screened Symbol D Formerly developmental type TA09835. Commercial Version: RFG60P06E. G † Current is limited by the package capability. Ordering Information PART NUMBER RFF60P06 S PACKAGE TO-254AA BRAND RFF60P06 NOTE: When ordering, use the entire part number. Packaging JEDEC TO-254AA PACKAGE TAB (ISOLATED) GATE SOURCE DRAIN CAUTION: Berylia Warning per MIL-S-19500. Refer to package specifications. 4-181 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. PSPICE® is a registered trademark of MicroSim Corporation. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999. RFF60P06 Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS Drain to Gate Voltage (RGS = 20kΩ) (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IDM Single Pulse Avalanche Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TL RFF60P06 -60 -60 ±20 25 (Note 5) Refer to Peak Current Curve Refer to UIS Curve 125 1.0 -55 to 150 UNITS V V V A 260 oC W W/oC oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC. Electrical Specifications TC = 25oC, Unless Otherwise Specified MIN TYP MAX UNITS Drain to Source Breakdown Voltage PARAMETER SYMBOL BVDSS ID = 250µA, VGS = 0V -60 - - V Gate Threshold Voltage VGS(TH) VGS = VDS, ID = 250µA Zero Gate Voltage Drain Current IDSS Gate to Source Leakage Current Drain to Source On Resistance (Note 2) IGSS rDS(ON) Turn-On Time tON Turn-On Delay Time td(ON) Rise Time Turn-Off Delay Time Fall Time Turn-Off Time TEST CONDITIONS -2.0 -3.0 -4.5 V VDS = Rated BVDSS,VGS = 0V - - -25 µA VDS = 0.8 x Rated BVDSS, VGS = 0V, TC = 125oC - - -250 µA VGS = ±20V, TC = 125oC - - ±100 µA ID = 25A, VGS = -10V, (Figure 9) - - 0.030 Ω VDD = -30V, ID = 25A, RL = 1.2Ω, VGS = -10V RG = 2.35Ω (Figures 13, 16, 17) - - 195 ns - 25 70 ns tr - 50 125 ns td(OFF) - 80 200 ns tf - 30 75 ns tOFF - - 275 ns - - 450 nC - - 225 nC - - 15 nC - 7200 - pF - 1800 - pF - 400 - pF Total Gate Charge Qg(TOT) VGS = 0 to -20V Gate Charge at -10V Qg(-10) VGS = 0 to -10V Threshold Gate Charge Qg(TH) VGS = 0 to -2V Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS VDD = -30V, ID = 25A, RL = 1.2Ω IG(REF) = -4.2mA (Figures 18, 19) VDS = -25V, VGS = 0V f = 1MHz Thermal Resistance Junction to Case RθJC - - 1.0 oC/W Thermal Resistance Junction to Ambient RθJA - - 48 oC/W Source to Drain Diode Specifications PARAMETER Source to Drain Diode Voltage (Note 2) SYMBOL VSD Diode Reverse Recovery Time trr TEST CONDITIONS MIN TYP MAX UNITS ISD = -25A - -1.1 -1.5 V ISD = -25A, dISD/dt = -100A/µs - 130 200 ns NOTES: 2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%. 3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3) 4. Current is limited by package capability. 4-182 RFF60P06 Unless Otherwise Specified -30 1.0 -25 ID , DRAIN CURRENT (A) 1.2 0.8 0.6 0.4 0.2 -20 -15 -10 -5 0 POWER DISSIPATION MULTIPLIER Typical Performance Curves 0 0 25 50 75 100 125 TC , CASE TEMPERATURE (oC) 25 150 50 75 100 125 150 TC, CASE TEMPERATURE (oC) FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE 2 THERMAL IMPEDANCE ZθJC, NORMALIZED 1 0.5 0.2 PDM 0.1 0.1 t1 0.05 0.02 0.01 SINGLE PULSE 0.01 10-5 10-4 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJC x RθJC + TC 10-3 10-1 10-2 100 101 t, RECTANGULAR PULSE DURATION (s) FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE -103 -100 100µs 1ms -10 -1 -1 OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON) TC = 25oC TJ = MAX RATED 10ms 100ms DC VDSS MAX = -60V -10 VDS , DRAIN-TO-SOURCE VOLTAGE (V) -100 FIGURE 4. FORWARD BIAS SAFE OPERATING AREA 4-183 IDM , PEAK CURRENT (A) ID , DRAIN CURRENT (A) -500 FOR TEMPERATURES ABOVE 25oC DERATE PEAK CURRENT CAPABILITY AS FOLLOWS: 150 – T C I = I 25 ---------------------- 125 -102 TRANSCONDUCTANCE MAY LIMIT CURRENT IN THIS REGION VGS = -10V -101 10-5 10-4 10-3 10-2 TC = 25oC 10-1 100 t, PULSE WIDTH (s) FIGURE 5. PEAK CURRENT CAPABILITY 101 RFF60P06 Typical Performance Curves (Continued) -150 If R = 0 tAV = (L) (IAS) / (1.3 RATED BVDSS - VDD) If R ≠ 0 tAV = (L/R) ln [(IAS*R) / (1.3 RATED BVDSS - VDD) + 1] -100 -75 STARTING TJ = 25oC VGS = -6V -50 100 FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING 0 -2 -4 -6 -8 VDS, DRAIN TO SOURCE VOLTAGE (V) -10 2.5 -150 25oC -55oC VDD = -15V PULSE TEST PULSE DURATION = 250µs DUTY CYCLE = 0.5% MAX -125 150oC -100 -75 -50 -25 0 0 -2 -4 -6 -8 PULSE DURATION = 250µs, VGS = -10V, ID = 25A 2.0 1.5 1.0 0.5 0 -80 -10 FIGURE 8. TRANSFER CHARACTERISTICS 2.0 NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE 1.0 0.5 0 0 40 80 120 160 TJ , JUNCTION TEMPERATURE (oC) FIGURE 10. NORMALIZED GATE THRESHOLD VOLTAGE vs JUNCTION TEMPERATURE 4-184 40 80 120 160 2.0 1.5 -40 0 FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE VGS = VDS, ID = 250µA -80 -40 TJ , JUNCTION TEMPERATURE (oC) VGS, GATE TO SOURCE VOLTAGE (V) NORMALIZED GATE THRESHOLD VOLTAGE VGS = -5V VGS = -4.5V FIGURE 7. SATURATION CHARACTERISTICS NORMALIZED DRAIN TO SOURCE ON RESISTANCE IDS(ON), DRAIN TO SOURCE CURRENT (A) PULSE DURATION = 250µs TC = 25oC -25 1 10 tAV, TIME IN AVALANCHE (ms) VGS = -7V -75 0 0.1 VGS = -8V -100 STARTING TJ = 150oC -10 VGS = -10V VGS = -20V -125 ID , DRAIN CURRENT (A) IAS , AVALANCHE CURRENT (A) -200 Unless Otherwise Specified ID = 250µA 1.5 1.0 0.5 0 -80 -40 0 40 80 120 TJ , JUNCTION TEMPERATURE (oC) 160 FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE RFF60P06 Unless Otherwise Specified (Continued) -10 C, CAPACITANCE (pF) CISS 6000 VGS = 0V, f = 0.1MHz CISS = CGS + CGD CRSS = CGD COSS ≈ CDS + CGS 4000 COSS 2000 CRSS VDS , DRAIN TO SOURCE VOLTAGE (V) -60 8000 VDD = BVDSS -7.5 RL = 1.0Ω IG(REF) = 4.2mA VGS = -10V 0.75 BVDSS 0.75 BVDSS -30 -15 0.50 BVDSS 0.50 BVDSS 0.25 BVDSS 0.25 BVDSS -5.0 -2.5 0 0 0 0 VDD = BVDSS -45 -5 -10 -15 -20 VDS , DRAIN TO SOURCE VOLTAGE (V) -25 20 IG(REF) t, TIME (µs) IG(ACT) 80 IG(REF) IG(ACT) NOTE: Refer to Intersil Application Notes AN7254 and AN7260. FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE FIGURE 13. NORMALIZED SWITCHING WAVEFORMS FOR CONSTANT GATE CURRENT Test Circuit and Waveforms VDS tAV L 0 VARY tP TO OBTAIN REQUIRED PEAK IAS - RG + 0V VGS VDD DUT VDD tP IAS IAS VDS tP 0.01Ω BVDSS FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 15. UNCLAMPED ENERGY WAVEFORMS tON tOFF td(OFF) td(ON) tr VDS 0 RL tf 10% 10% VGS VDS VDD + VGS DUT RGS VGS 0 90% 90% 10% 50% 50% PULSE WIDTH 90% FIGURE 16. SWITCHING TIME TEST CIRCUIT 4-185 FIGURE 17. RESISTIVE SWITCHING WAVEFORMS VGS , GATE TO SOURCE VOLTAGE (V) Typical Performance Curves RFF60P06 Test Circuit and Waveforms (Continued) VDS RL VDS Qg(TH) 0 VGS = -2V VGS - VGS = -10V -VGS VDD Qg(-10) + DUT VGS = -20V VDD IG(REF) Qg(TOT) 0 IG(REF) FIGURE 18. GATE CHARGE TEST CIRCUIT Data Packages - Intersil Power Transistors TX and TXV Equivalents 1. TX/TXV Equivalent - Standard Data Package A. Certificate of Compliance B. Assembly Flow Chart C. Preconditioning - Attributes Data Sheet D. Group A - Attributes Data Sheet E. Group B - Attributes Data Sheet F. Group C - Attributes Data Sheet 2. TX/TXV Equivalent - Optional Data Package A. Certificate of Compliance B. Assembly Flow Chart C. Preconditioning - Attributes Data Sheet - Precondition Lot Traveler - Pre and Post Burn-In Read and Record Data D. Group A - Attributes Data Sheet - Group A Lot Traveler E. Group B - Attributes Data Sheet - Group B Lot Traveler - Pre and Post Read and Record Data for Intermittent Operating Life (Subgroup B3) - Bond Strength Data (Subgroup B3) - Pre and Post High Temperature Operating Life Read and Record Data (Subgroup B6) F. Group C - Attributes Data Sheet - Group C Lot Traveler - Pre and Post Read and Record Data for Intermittent Operating Life (Subgroup C6) - Bond Strength Data (Subgroup C6) 4-186 FIGURE 19. GATE CHARGE WAVEFORMS RFF60P06 PSPICE Electrical Model .SUBCKT RFF60P06 2 1 3 REV 9/20/94 CA 12 8 1.01e-8 CB 15 14 1.05e-8 CIN 6 8 6.9e-9 GATE 1 LGATE RGATE 9 VTO - EBREAK 17 18 16 MOS1 6 8 S1A 14 13 13 CA RBREAK 17 18 RBKMOD 1 RDRAIN 5 16 RDSMOD 12.83e-3 RGATE 9 20 1.55 RIN 6 8 1e9 RSOURCE 8 7 RDSMOD 3.25e-3 RVTO 18 19 RVTOMOD 1 DBODY 11 LSOURCE RSOURCE + 6 EGS 8 - 15 17 RBREAK S2B 18 RVTO CB 14 + 5 EDS 8 IT - S1A 6 12 13 8 S1AMOD S1B 13 12 13 8 S1BMOD S2A 6 15 14 13 S2AMOD S2B 13 15 14 13 S2BMOD VBAT 8 19 DC 1 VTO 21 6 -0.83 .MODEL DBDMOD D (IS=1.24e-12 RS=4.72e-3 TRS1=1.43e-3 TRS2=-4.91e-7 CJO=6.98e-9 TT=1.5e-7) .MODEL DBKMOD D (RS=1.11e-1 TRS1=1.34e-3 TRS2=4.46e-12) .MODEL DPLCAPMOD D (CJO=15e-10 IS=1e-30 N=10) .MODEL MOSMOD PMOS (VTO=-3.71 KP=31.5 IS=1e-30 N=10 TOX=1 L=1u W=1u) .MODEL RBKMOD RES (TC1=9.42e-4 TC2=0) .MODEL RDSMOD RES (TC1=5.85e-3 TC2=7.69e-6) .MODEL RVTOMOD RES (TC1=-3.39e-3 TC2=1.07e-6) .MODEL S1AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=4.6 VOFF=2.6) .MODEL S1BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=2.6 VOFF=4.6) .MODEL S2AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=1.16 VOFF=-3.84) .MODEL S2BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-3.84 VOFF=1.16) .ENDS NOTE: For further discussion of the PSPICE model consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global Temperature Options; written by William J. Hepp and C. Frank Wheatley. 4-187 3 7 S2A 13 8 S1B MOS1 16 6 8 8 MOSMOD M=0.99 MOS2 16 21 8 8 MOSMOD M=0.01 - DBREAK CIN IT 8 17 1 12 + 21 RIN LDRAIN 2 5 1e-9 LGATE 1 9 7.9e-9 LSOURCE 3 7 4.18e-9 2 MOS2 - 18 20 8 LDRAIN RDRAIN 6 8 EVTO + EBREAK 5 11 17 18 -76.35 EDS 14 8 5 8 1 EGS 13 8 6 8 1 ESG 6 10 8 6 1 EVTO 20 6 8 18 1 ESG + DPLCAP + DBODY 5 7 DBDMOD DBREAK 7 11 DBKMOD DPLCAP 10 5 DPLCAPMOD DRAIN 5 10 19 - VBAT + RFF60P06 Screening Information Screening is performed in accordance with the latest revision in effect of MIL-S-19500, (Screening Information Table). Delta Tests and Limits (JANTX/JANTXV Equivalent) PARAMETER SYMBOL Gate to Source Leakage Current Gate Threshold Voltage MAX UNITS IGSS VGS = ±20V, TC = 25oC ±20 (Note 4) nA IDSS VDS = 80% Rated Value, TC = 25oC ±25 (Note 4) µA rDS(ON) TC = 125oC at Rated ID ±20% (Note 5) Ω VGS(TH) ID = 1.0mA, TC = 25oC ±20% (Note 5) V Zero Gate Voltage Drain Current On Resistance TEST CONDITIONS NOTES: 5. Or 100% of Initial Reading (whichever is greater). 6. Of Initial Reading. Screening Information TEST JANTX/JANTXV EQUIVALENT Gate Stress VGS = -30V, t = 250µs Pind Optional PDA 10% Pre Burn-In Test (Note 1) MIL-S-19500 Group A, Subgroup 2 (All Static Tests at 25oC) Steady State Gate Bias (Gate Stress) MIL-STD-750, Method 1042, Condition B VGS = 80% of Rated Value, TA = 150oC, Time = 48 hours Interim Electrical Tests (Note 6) All Delta Parameters Listed in the Delta Tests and Limits Table Steady State Reverse Bias (Drain Stress) MIL-STD-750, Method 1042, Condition A VDS = 80% of Rated Value, TA = 150oC, Time = 168 hours Final Electrical Tests (Note 6) MIL-S-19500, Group A, Subgroup 2 NOTE: 7. Test limits are identical pre and post burn-in. Additional Screening Tests PARAMETER SYMBOL MAX UNITS VDS = -48V, t = 10ms 8.0 A IAS VGS(PEAK) = -15V, L = 0.1mH 75 A Thermal Response ∆VSD tH = 100ms; VH = 25V, IH = 4A 142 mV Thermal Impedance ∆VSD tH = 500ms; VH = 25V, IH = 4A 182 mV Safe Operating Area SOA Unclamped Inductive Switching TEST CONDITIONS All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240 4-188 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029