FAIRCHILD 74ABT162244MTDX

Revised March 2002
74ABT162244
16-Bit Buffer/Line Driver with
25Ω Series Resistors in the Outputs
General Description
Features
The ABT162244 contains sixteen non-inverting buffers with
3-STATE outputs designed to be employed as a memory
and address driver, clock driver, or bus oriented transmitter/receiver. The device is nibble controlled. Individual 3STATE control inputs can be shorted together for 8-bit or
16-bit operation.
■ Separate control logic for each nibble
The 25Ω series resistors in the outputs reduce ringing and
eliminate the need for external resistors.
■ Non-destructive hot insertion capability
■ 16-bit version of the ABT2244
■ Guaranteed latchup protection
■ High impedance glitch free bus loading during entire
power up and power down cycle
Ordering Code:
Order Number
Package Number
74ABT162244CSSC
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
Package Description
74ABT162244CSSX
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
74ABT162244CMTD
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
74ABT162244MTDX
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Logic Symbol
Connection Diagram
Pin Descriptions
Pin Names
Description
OEn
Output Enable Input (Active LOW)
I0–I15
Inputs
O0–O15
Outputs
© 2002 Fairchild Semiconductor Corporation
DS010987
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74ABT162244 16-Bit Buffer/Line Driver with 25Ω Series Resistors in the Outputs
April 1992
74ABT162244
Truth Tables
Logic Diagram
Inputs
Outputs
OE1
I0–I3
L
L
L
L
H
H
H
X
Z
Inputs
O0–O3
Outputs
OE3
I8–I11
L
L
L
L
H
H
H
X
Z
Inputs
O8–O11
Outputs
OE2
I4–I7
O4–O7
L
L
L
L
H
H
H
X
Z
Inputs
Outputs
OE4
I12–I15
O12–O15
L
L
L
L
H
H
H
X
Z
Schematic of each Output
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
Functional Description
The ABT162244 contains sixteen non-inverting buffers with
3-STATE outputs. The device is nibble (4 bits) controlled
with each nibble functioning identically, but independent of
the other. The control pins can be shorted together to
obtain full 16-bit operation.
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2
Recommended Operating
Conditions
Storage Temperature
−65°C to +150°C
Ambient Temperature under Bias
−55°C to +125°C
Free Air Ambient Temperature
Junction Temperature under Bias
−55°C to +150°C
Supply Voltage
−0.5V to +7.0V
VCC Pin Potential to Ground Pin
Input Voltage (Note 2)
−0.5V to +7.0V
Input Current (Note 2)
−30 mA to +5.0 mA
−40°C to +85°C
+4.5V to +5.5V
Minimum Input Edge Rate (∆V/∆t)
Data Input
50 mV/ns
Enable Input
20 mV/ns
Voltage Applied to Any Output
in the Disabled or
Power-Off State
−0.5V to 5.5V
in the HIGH State
−0.5V to VCC
Current Applied to Output
in LOW State (Max)
Note 1: Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
twice the rated IOL (mA)
−500 mA
DC Latchup Source Current
Over Voltage Latchup (I/O)
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
10V
DC Electrical Characteristics
Symbol
Parameter
Min
Typ
Max
2.0
Units
VCC
V
Conditions
VIH
Input HIGH Voltage
VIL
Input LOW Voltage
0.8
V
VCD
Input Clamp Diode Voltage
−1.2
V
Min
IIN = −18 mA
VOH
Output HIGH Voltage
V
Min
IOH = −3 mA
V
Min
IOH = −32 mA
VOL
Output LOW Voltage
0.8
V
Min
IIH
Input HIGH Current
1
2.5
2.0
1
IBVI
Input HIGH Current Breakdown Test
7
IIL
Input LOW Current
−1
VID
Input Leakage Test
IOZH
Output Leakage Current
IOZL
Output Leakage Current
IOS
Output Short-Circuit Current
ICEX
−1
4.75
Recognized HIGH Signal
Recognized LOW Signal
µA
Max
µA
Max
µA
Max
V
0.0
IOL = 12 mA
VIN = 2.7V (Note 3)
VIN = VCC
VIN = 7.0V
VIN = 0.5V (Note 3)
VIN = 0.0V
IID = 1.9 µA
All Other Pins Grounded
10
µA
0 − 5.5V VOUT = 2.7V; OEn = 2.0V
0 − 5.5V VOUT = 0.5V; OEn = 2.0V
−10
µA
−275
mA
Max
VOUT = 0.0V
Output High Leakage Current
50
µA
Max
VOUT = VCC
−100
IZZ
Bus Drainage Test
100
µA
0.0
VOUT = 5.5V; All Others GND
ICCH
Power Supply Current
2.0
mA
Max
All Outputs HIGH
ICCL
Power Supply Current
60
mA
Max
All Outputs LOW
ICCZ
Power Supply Current
2.0
mA
Max
OEn = VCC
ICCT
Additional ICC/Input
Outputs Enabled
3.0
mA
Outputs 3-STATE
3.0
mA
Outputs 3-STATE
50
µA
All Others at VCC or GND
VI = VCC − 2.1V
Max
Enable Input VI = VCC − 2.1V
Data Input VI = VCC − 2.1V
All Others at VCC or GND
ICCD
Dynamic ICC
No Load
mA/
(Note 3)
0.1
MHz
Max
Outputs OPEN
OEn = GND
One Bit Toggling, 50% Duty Cycle
Note 3: Guaranteed, but not tested.
3
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74ABT162244
Absolute Maximum Ratings(Note 1)
74ABT162244
AC Electrical Characteristics
Symbol
Parameter
TA = +25°C
TA = −40°C to +85°C
VCC = +5V
VCC = 4.5V–5.5V
CL = 50 pF
CL = 50 pF
Min
Typ
Max
Min
tPLH
Propagation
1.0
2.4
3.9
1.0
3.9
tPHL
Delay Data to Outputs
1.0
3.2
4.7
1.0
4.7
tPZH
Output
1.5
3.5
6.3
1.5
6.3
tPZL
Enable Time
1.5
4.2
6.9
1.5
6.9
tPHZ
Output
1.0
4.2
6.7
1.0
6.7
tPLZ
Disable Time
1.0
3.8
6.7
1.0
6.7
Max
Capacitance
Symbol
Parameter
Typ
Units
Conditions
TA = 25°C
CIN
Input Capacitance
5.0
pF
VCC = 0.0V
COUT (Note 4)
Output Capacitance
9.0
pF
VCC = 5.0V
Note 4: COUT is measured at frequency f = 1 MHz per MIL-STD-883, Method 3012.
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Units
ns
ns
ns
74ABT162244
AC Loading
*Includes jig and probe capacitance
FIGURE 1. Standard AC Test Load
FIGURE 2. Input Pulse Requirements
Amplitude
3.0V
Rep. Rate
tW
tr
tf
1 MHz
500 ns
2.5 ns
2.5 ns
FIGURE 3. Test Input Signal Requirements
AC Waveforms
FIGURE 4. Propagation Delay Waveforms for Inverting
and Non-Inverting Functions
FIGURE 6. 3-STATE Output HIGH
and LOW Enable and Disable Times
FIGURE 5. Propagation Delay,
Pulse Width Waveforms
FIGURE 7. Setup Time, Hold Time
and Recovery Time Waveforms
5
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74ABT162244
Physical Dimensions inches (millimeters) unless otherwise noted
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
Package Number MS48A
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74ABT162244 16-Bit Buffer/Line Driver with 25Ω Series Resistors in the Outputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Package Number MTD48
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
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user.
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