AMD PRELIMINARY Am186EM MICROCONTROLLER BLOCK DIAGRAM INT2/INTA0 INT3/INTA1/IRQ CLKOUTA INT1/SELECT INT4 TMROUT0 INT0 CLKOUTB NMI TMRIN0 TMRIN1 DRQ0 0 Clock and Power Management Unit Interrupt Control Unit Control Registers Control Registers 1 (WDT) 2 0 1 20-Bit Source Pointers 20-Bit Destination Pointers 16-Bit Count Registers Control Registers Max Count B Registers Max Count A Registers 16-Bit Count Registers Control Registers Control Registers GND DRQ1 DMA Unit Timer Control Unit X2 X1 VCC TMROUT1 RES Control Registers ARDY Refresh Control Unit PSRAM Control Unit Control Registers PIO Unit Control Registers Asynchronous Serial Port SRDY S2–S0 DT/R Bus Interface Unit DEN HOLD Chip-Select Unit Execution Unit PIO31– PIO0* TXD RXD Control Registers HLDA S6/ CLKDIV2 UZI Synchronous Serial Interface RD WHB A19–A0 WLB AD15–AD0 LCS/ONCE0 PCS6/A2 BHE/ADEN SDEN0 SDEN1 PCS5/A1 MCS3/RFSH MCS2–MCS0 WR SDATA SCLK PCS3–PCS0 UCS/ONCE1 ALE Note: * All PIO signals are shared with other physical pins. See the pin descriptions beginning on page 24 and Table 2 on page 28 for information on shared function. 2 Am186EM and Am188EM Microcontrollers