ETC AT24C16SC-09ET-2.7

Features
• Low-voltage and Standard-voltage Operation
•
•
•
•
•
•
•
•
•
– 5.0 (VCC = 4.5V to 5.5V)
– 2.7 (VCC = 2.7V to 5.5V)
Internally Organized 128 x 8 (1K), 256 x 8 (2K), 512 x 8 (4K),
1024 x 8 (8K) or 2048 x 8 (16K)
2-wire Serial Interface
Schmitt Trigger, Filtered Inputs for Noise Suppression
Bi-directional Data Transfer Protocol
100 kHz (2.7V) and 400 kHz (5V) Compatibility
8-byte Page (1K, 2K), 16-byte Page (4K, 8K, 16K) Write Modes
Partial Page Writes Are Allowed
Self-timed Write Cycle (10 ms max)
High-reliability
– Endurance: 100,000 Write Cycles
– Data Retention: 100 Years
– ESD Protection: >3000V
Description
The AT24C01A/02SC/04SC/08SC/16SC provides 1024/2048/4096/8192/16384 bits
of serial, electrically-erasable and programmable read-only memory (EEPROM)
organized as 128/256/512/1024/2048 words of 8 bits each. The devices are optimized
for use in smart card applications where low-power and low-voltage operation may be
essential. The devices are available in several standard ISO 7816 smart card modules
(see Ordering Information). The entire family is available in both high-voltage (4.5V to
5.5V) and low-voltage (2.7V to 5.5V) versions. All devices are functionally equivalent
to Atmel serial EEPROM products offered in standard IC packages (PDIP, SOIC,
EIAJ, LAP), with the exception of the slave address and Write Protect functions, which
are not required for smart card applications.
Pin Configurations
Pad Name
Description
ISO Module Contact
VCC
Power Supply Voltage
C1
GND
Ground
C5
SCL
Serial Clock Input
C3
SDA
Serial Data Input/Output
C7
NC
No Connect
2-wire Serial
EEPROM Smart
Card Modules
1K (128 x 8)
2K (256 x 8)
4K (512 x 8)
8K (1024 x 8)
16K (2048 x 8)
AT24C01ASC
AT24C02SC
AT24C04SC
AT24C08SC
AT24C16SC
C2, C4, C6, C8
Card Module Contact
VCC
NC
Rev. 1610A–05/00
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Absolute Maximum Ratings
Operating Temperature.................................. -55°C to +125°C
Storage Temperature ..................................... -65°C to +150°C
Voltage on Any Pin
with Respect to Ground .....................................-1.0V to +7.0V
Maximum Operating Voltage .......................................... 6.25V
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
DC Output Current........................................................ 5.0 mA
Block Diagram
Pin Description
SERIAL CLOCK (SCL): The SCL input is used to positive
edge clock data into each EEPROM device and negative
edge clock data out of each device.
SERIAL DATA (SDA): The SDA pin is bi-directional for
serial data transfer. This pin is open-drain driven and may
be wire-ORed with any number of other open-drain or
open-collector devices.
Memory Organization
AT24C01ASC, 1K SERIAL EEPROM: Internally organized
with 16 pages of 8 bytes each, the 1K requires a 7-bit data
word address for random word addressing.
2
AT24C02SC, 2K SERIAL EEPROM: Internally organized
with 32 pages of 8 bytes each, the 2K requires an 8-bit data
word address for random word addressing.
AT24C04SC, 4K SERIAL EEPROM: The 4K is internally
organized with 32 pages of 16 bytes each. Random word
addressing Chip Number requires a 9-bit data word
address.
AT24C08SC, 8K SERIAL EEPROM: The 8K is internally
organized with 64 pages of 16 bytes each. Random word
addressing requires a 10-bit data word address.
AT24C16SC, 16K SERIAL EEPROM: The 16K is internally
organized with 128 pages of 16 bytes each. Random word
addressing requires an 11-bit data word address.
AT24C01ASC/02SC/04SC/08SC/16SC
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AT24C01ASC/02SC/04SC/08SC/16SC
Pin Capacitance(1)
Applicable over recommended operating range from TA = 25°C, f = 1.0 MHz, VCC = +2.7V.
Symbol
Test Condition
CI/O
CIN
Note:
Max
Units
Conditions
Input/Output Capacitance (SDA)
8
pF
VI/O = 0V
Input Capacitance (SCL)
6
pF
VIN = 0V
1. This parameter is characterized and is not 100% tested.
DC Characteristics
Applicable over recommended operating range from: TAC = 0°C to +70°C, VCC = +2.7V to +5.5V (unless otherwise noted).
Symbol
Parameter
Max
Units
VCC1
Supply Voltage
2.7
5.5
V
VCC2
Supply Voltage
4.5
5.5
V
ICC
Supply Current VCC = 5.0V
READ at 100 kHz
0.4
1.0
mA
ICC
Supply Current VCC = 5.0V
WRITE at 100 kHz
2.0
3.0
mA
ISB1
Standby Current VCC = 2.7V
VIN = VCC or GND
1.6
4.0
µA
ISB2
Standby Current VCC = 5.0V
VIN = VCC or GND
8.0
18.0
µA
ILI
Input Leakage Current
VIN = VCC or GND
0.10
3.0
µA
ILO
Output Leakage Current
VOUT = VCC or GND
0.05
3.0
µA
VIL
Input Low Level(1)
-0.6
VCC x 0.3
V
VIH
Input High Level(1)
VCC x 0.7
VCC + 0.5
V
VOL
Output Low Level VCC = 3.0V
0.4
V
Note:
Test Condition
Min
Typ
IOL = 2.1 mA
1. VIL min and VIH max are reference only and are not tested.
AC Characteristics
Applicable over recommended operating range from TA = 0°C to +70°C, VCC = +2.7V to +5.5V, CL = 1 TTL Gate and 100
pF (unless otherwise noted).
2.7-volt
Symbol
Parameter
fSCL
Clock Frequency, SCL
tLOW
Clock Pulse Width Low
tHIGH
Clock Pulse Width High
Min
5.0-volt
Max
Min
100
Max
Units
400
kHz
4.7
1.2
µs
4.0
0.6
µs
(1)
tI
Noise Suppression Time
tAA
Clock Low to Data Out Valid
0.1
tBUF
Time the bus must be free before a new
transmission can start(1)
4.7
1.2
µs
tHD.STA
Start Hold Time
4.0
0.6
µs
tSU.STA
Start Setup Time
4.7
0.6
µs
tHD.DAT
Data In Hold Time
0
0
µs
tSU.DAT
Data In Setup Time
200
100
ns
tR
Inputs Rise Time(1)
100
4.5
1.0
0.1
50
ns
0.9
µs
0.3
µs
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AC Characteristics (Continued)
Applicable over recommended operating range from TA = 0°C to +70°C, VCC = +2.7V to +5.5V, CL = 1 TTL Gate and 100
pF (unless otherwise noted).
2.7-volt
Symbol
Parameter
tF
Inputs Fall Time(1)
tSU.STO
Stop Setup Time
4.7
0.6
µs
tDH
Data Out Hold Time
100
50
ns
tWR
Write Cycle Time
Endurance(1)
5.0V, 25°C, Page Mode
Note:
Min
5.0-volt
Max
Min
300
10
100K
Max
Units
300
ns
10
100K
ms
Write
Cycles
1. This parameter is characterized and is not 100% tested.
Device Operation
CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an external device. Data on the SDA
pin may change only during SCL low time periods (refer to
Data Validity timing diagram). Data changes during SCL
high periods will indicate a start or stop condition as
defined below.
START CONDITION: A high-to-low transition of SDA with
SCL high is a start condition that must precede any other
command (refer to Start and Stop Definition timing diagram).
STOP CONDITION: A low-to-high transition of SDA with
SCL high is a stop condition. After a read sequence, the
Stop command will place the EEPROM in a standby power
mode (refer to Start and Stop Definition timing diagram).
ACKNOWLEDGE: All addresses and data words are
serially transmitted to and from the EEPROM in 8-bit
words. Each word requires the receiver to acknowledge
that it has received a valid command or data byte. During
the transmission of commands from the host to the
EEPROM, the EEPROM will send a zero to the host to
4
acknowledge that it has received a valid command byte.
This occurs on the ninth clock cycle of the command byte.
During read operations, the host will send a zero to the
EEPROM to acknowledge that it has received a valid data
byte and that it requests the next sequential data byte to be
transmitted during the subsequent eight clock cycles. This
occurs on the ninth clock cycle of the data byte. If the host
does not transmit this acknowledge bit, the EEPROM will
disable the Read operation and return to standby mode.
STANDBY MODE: The AT24C01ASC/02SC/04SC/
08SC/16SC features a low-power standby mode that is
enabled: (a) upon power-up and (b) after the receipt of the
STOP bit and the completion of any internal operations.
MEMORY RESET: After an interruption in protocol, power
loss or system reset, any 2-wire part can be reset by following these steps:
1. Clock up to 9 cycles.
2. Look for SDA high in each cycle while SCL is high.
3. Create a start condition as SDA is high.
AT24C01ASC/02SC/04SC/08SC/16SC
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AT24C01ASC/02SC/04SC/08SC/16SC
Bus Timing
SCL: Serial Clock, SDA: Serial Data I/O
Write Cycle Timing
SCL: Serial Clock, SDA: Serial Data I/O
tWR(1)
Note:
1.
The write cycle time tWR is the time from a valid stop condition of a write sequence to the end of the internal clear/write
cycle.
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Data Validity
Start and Stop Definition
Output Acknowledge
6
AT24C01ASC/02SC/04SC/08SC/16SC
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AT24C01ASC/02SC/04SC/08SC/16SC
Device Addressing
The 1K, 2K, 4K, 8K and 16K EEPROM devices all
require an 8-bit device address word following a start condition to enable the chip for a read or write operation (refer
to Figure 1).
The device address word consists of a mandatory one,
zero, one, zero sequence for the first four most significant
bits as shown. This is common to all the serial EEPROM
devices.
The next 3 bits of the device address word are the most
significant data word address bits for the AT24C16SC
(16K), which requires a total of 11 address bits. The
AT24C08SC (8K) requires only 10 total word address bits.
The most significant 2 bits are included in the device
address word. The unused bit of the device address word
should be set to “0”. The AT24C04SC (4K) requires only 9
total data word address bits. The most significant bit is
included in the device address word. The 2 unused bits of
the device address word should be set to “0”. The
AT24C02SC (2K) and AT24C01ASC (1K) do not require
any address bits in the device address word. The 3 unused
bits of the device address word should be set to “0”.
The eighth bit of the device address is the read/write operation select bit. A read operation is initiated if this bit is high
and a write operation is initiated if this bit is low.
Upon a compare of the device address, the EEPROM will
output a zero (ACK). If a successful compare is not made,
the chip will return to a standby state (NO ACK).
Write Operations
BYTE WRITE: A write operation requires an 8-bit data
word address following the device address word and
acknowledgment. Upon receipt of this address, the
EEPROM will again respond with a zero (ACK) and then
clock in the first 8-bit data word. Following receipt of the 8bit data word, the EEPROM will output a zero (ACK) and
the addressing device, such as a microcontroller, must
terminate the write sequence with a stop condition. At this
time the EEPROM enters an internally-timed write cycle,
t WR , to the nonvolatile memory. All inputs are disabled
during this write cycle and the EEPROM will not respond
until the write is complete (refer to Figure 2).
PAGE WRITE: The 1K/2K EEPROM is capable of an
8-byte page write, and the 4K, 8K and 16K devices are
capable of 16-byte page writes.
A page write is initiated the same as a byte write, but the
microcontroller does not send a stop condition after the first
data word is clocked in. Instead, after the EEPROM
acknowledges receipt of the first data word, the microcontroller can transmit up to 7 (1K/2K) or 15 (4K, 8K, 16K)
more data words. The EEPROM will respond with a zero
(ACK) after each data word received. The microcontroller
must terminate the page write sequence with a stop condition (refer to Figure 3).
The data word address lower 3 (1K/2K) or 4(4K, 8K, 16K)
bits are internally incremented following the receipt of each
data word. The higher data word address bits are not incremented, retaining the memory page row location. When the
word address, internally generated, reaches the page
boundary, the following byte is placed at the beginning of
the same page. If more than 8 (1K/2K) or 16 (4K, 8K, 16K)
data words are transmitted to the EEPROM, the data word
address will “roll over” and previous data will be overwritten.
ACKNOWLEDGE POLLING: Once the internally timed
write cycle has started and the EEPROM inputs are disabled, acknowledge polling can be initiated. This involves
sending a start condition followed by the device address
word. The read/write bit is representative of the operation
desired. Only if the internal write cycle has completed will
the EEPROM respond with a zero (ACK), allowing the read
or write sequence to continue.
Read Operations
Read operations are initiated the same way as write operations, with the exception that the read/write select bit in the
device address word is set to one. There are three read
operations: current address read, random address read
and sequential read.
CURRENT ADDRESS READ: The internal data word
address counter maintains the last address accessed during the last read or write operation, incremented by one.
This address stays valid between operations as long as the
chip power is maintained. The address “rollover” during
read is from the last byte of the last memory page to the
first byte of the first page. The address “rollover” during
write is from the last byte of the current page to the first
byte of the same page.
Once the device address with the read/write select bit set
to “1” is clocked in and acknowledged by the EEPROM, the
current address data word is serially clocked out. The
microcontroller does not respond with an input zero, but
does generate a following stop condition (refer to Figure 4).
RANDOM READ: A random read requires a “dummy” byte
write sequence to load in the data word address. Once the
device address word and data word address are clocked in
and acknowledged by the EEPROM, the microcontroller
must generate another start condition. The microcontroller
now initiates a current address read by sending a device
address with the read/write select bit high. The EEPROM
acknowledges the device address and serially clocks out
the data word. The microcontroller does not respond with a
zero (NO ACK) but does generate a following stop condition (refer to Figure 5).
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SEQUENTIAL READ: Sequential reads are initiated by
either a current address read or a random address read.
After the microcontroller receives a data word, it responds
with an acknowledge. As long as the EEPROM receives an
acknowledge, it will continue to increment the data word
address and serially clock out sequential data words. When
the memory address limit is reached, the data word
address will “rollover” and the sequential read will continue.
The sequential read operation is terminated when the
microcontroller does not respond with a zero (NO ACK) but
does generate a following stop condition (refer to Figure 6).
Figure 1. Device Address
Note:
PO, P1, P2 = Data word address bits
Figure 2. Byte Write
Figure 3. Page Write
(* = DON’T CARE bit for 1K)
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AT24C01ASC/02SC/04SC/08SC/16SC
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AT24C01ASC/02SC/04SC/08SC/16SC
Figure 4. Current Address Read
Figure 5. Random Read
(* = DON’T CARE bit for 1K)
Figure 6. Sequential Read
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AT24C01ASC Ordering Information
Ordering Code
Package
Voltage Range
Operation Range
AT24C01ASC - 09AT - 2.7
AT24C01ASC - 09BT - 2.7
AT24C01ASC - 09CT - 2.7
AT24C01ASC - 09DT - 2.7
AT24C01ASC - 09ET - 2.7
AT24C01ASC - 09FT - 2.7
AT24C01ASC - 09GT - 2.7
AT24C01ASC - 09HT - 2.7
M2 - A Module
M2 - B Module
M4 - C Module
M4 - D Module
M2 - E Module
M2 - F Module
M3 - G Module
M3 - H Module
2.7V - 5.5V
Commercial
(0°C to 70°C)
AT24C01ASC - 09AT
AT24C01ASC - 09BT
AT24C01ASC - 09CT
AT24C01ASC - 09DT
AT24C01ASC - 09ET
AT24C01ASC - 09FT
AT24C01ASC - 09GT
AT24C01ASC - 09HT
M2 - A Module
M2 - B Module
M4 - C Module
M4 - D Module
M2 - E Module
M2 - F Module
M3 - G Module
M3 - H Module
4.5V - 5.5V
Commercial
(0°C to 70°C)
Package Type(1)
Note:
10
M2 - A Module
M2 ISO 7816 Smart Card Module
M2 - B Module
M2 ISO 7816 Smart Card Module with Atmel Logo
M4 - C Module
M4 ISO 7816 Smart Card Module
M4 - D Module
M4 ISO 7816 Smart Card Module with Atmel Logo
M2 - E Module
M2 ISO 7816 Smart Card Module
M2 - F Module
M2 ISO 7816 Smart Card Module
M3 - G Module
M3 ISO 7816 Smart Card Module
M3 - H Module
M3 ISO 7816 Smart Card Module with Atmel Logo
1.
Formal drawings may be obtained from an Atmel sales office.
AT24C01ASC/02SC/04SC/08SC/16SC
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AT24C01ASC/02SC/04SC/08SC/16SC
AT24C02SC Ordering Information
Ordering Code
Package
Voltage Range
Operation Range
AT24C02SC - 09AT - 2.7
AT24C02SC - 09BT - 2.7
AT24C02SC - 09CT - 2.7
AT24C02SC - 09DT - 2.7
AT24C02SC - 09ET - 2.7
AT24C02SC - 09FT - 2.7
M2 - A Module
M2 - B Module
M4 - C Module
M4 - D Module
M2 - E Module
M2 - F Module
2.7V - 5.5V
Commercial
(0°C to 70°C)
AT24C02SC - 09AT
AT24C02SC - 09BT
AT24C02SC - 09CT
AT24C02SC - 09DT
AT24C02SC - 09ET
AT24C02SC - 09FT
M2 - A Module
M2 - B Module
M4 - C Module
M4 - D Module
M2 - E Module
M2 - F Module
4.5V - 5.5V
Commercial
(0°C to 70°C)
Package
Voltage Range
Operation Range
AT24C04SC - 09AT - 2.7
AT24C04SC - 09BT - 2.7
AT24C04SC - 09CT - 2.7
AT24C04SC - 09DT - 2.7
AT24C04SC - 09ET - 2.7
AT24C04SC - 09FT - 2.7
M2 - A Module
M2 - B Module
M4 - C Module
M4 - D Module
M2 - E Module
M2 - F Module
2.7V - 5.5V
Commercial
(0°C to 70°C)
AT24C04SC - 09AT
AT24C04SC - 09BT
AT24C04SC - 09CT
AT24C04SC - 09DT
AT24C04SC - 09ET
AT24C04SC - 09FT
M2 - A Module
M2 - B Module
M4 - C Module
M4 - D Module
M2 - E Module
M2 - F Module
4.5V - 5.5V
Commercial
(0°C to 70°C)
AT24C04SC Ordering Information
Ordering Code
Package Type(1)
Note:
M2 - A Module
M2 ISO 7816 Smart Card Module
M2 - B Module
M2 ISO 7816 Smart Card Module with Atmel Logo
M4 - C Module
M4 ISO 7816 Smart Card Module
M4 - D Module
M4 ISO 7816 Smart Card Module with Atmel Logo
M2 - E Module
M2 ISO 7816 Smart Card Module
M2 - F Module
M2 ISO 7816 Smart Card Module
M3 - G Module
M3 ISO 7816 Smart Card Module
M3 - H Module
M3 ISO 7816 Smart Card Module with Atmel Logo
1. Formal drawings may be obtained from an Atmel Sales Office.
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AT24C08SC Ordering Information
Ordering Code
Package
Voltage Range
Operation Range
AT24C08SC - 09AT - 2.7
AT24C08SC - 09BT - 2.7
AT24C08SC - 09CT - 2.7
AT24C08SC - 09DT - 2.7
AT24C08SC - 09ET - 2.7
AT24C08SC - 09FT - 2.7
M2 - A Module
M2 - B Module
M4 - C Module
M4 - D Module
M2 - E Module
M2 - F Module
2.7V - 5.5V
Commercial
(0°C to 70°C)
AT24C08SC - 09AT
AT24C08SC - 09BT
AT24C08SC - 09CT
AT24C08SC - 09DT
AT24C08SC - 09ET
AT24C08SC - 09FT
M2 - A Module
M2 - B Module
M4 - C Module
M4 - D Module
M2 - E Module
M2 - F Module
4.5V - 5.5V
Commercial
(0°C to 70°C)
Package
Voltage Range
Operation Range
AT24C16SC - 09AT - 2.7
AT24C16SC - 09BT - 2.7
AT24C16SC - 09CT - 2.7
AT24C16SC - 09DT - 2.7
AT24C16SC - 09ET - 2.7
AT24C16SC - 09FT - 2.7
M2 - A Module
M2 - B Module
M4 - C Module
M4 - D Module
M2 - E Module
M2 - F Module
2.7V - 5.5V
Commercial
(0°C to 70°C)
AT24C16SC - 09AT
AT24C16SC - 09BT
AT24C16SC - 09CT
AT24C16SC - 09DT
AT24C16SC - 09ET
AT24C16SC - 09FT
M2 - A Module
M2 - B Module
M4 - C Module
M4 - D Module
M2 - E Module
M2 - F Module
4.5V - 5.5V
Commercial
(0°C to 70°C)
AT24C16SC Ordering Information
Ordering Code
Package Type(1)
Note:
12
M2 - A Module
M2 ISO 7816 Smart Card Module
M2 - B Module
M2 ISO 7816 Smart Card Module with Atmel Logo
M4 - C Module
M4 ISO 7816 Smart Card Module
M4 - D Module
M4 ISO 7816 Smart Card Module with Atmel Logo
M2 - E Module
M2 ISO 7816 Smart Card Module
M2 - F Module
M2 ISO 7816 Smart Card Module
M3 - G Module
M3 ISO 7816 Smart Card Module
M3 - H Module
M3 ISO 7816 Smart Card Module with Atmel Logo
1. Formal drawings may be obtained from an Atmel Sales Office.
AT24C01ASC/02SC/04SC/08SC/16SC
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AT24C01ASC/02SC/04SC/08SC/16SC
Smart Card Modules
M2 - E Module - Ordering Code: 09ET
M2 - A Module - Ordering Code: 09AT
Module Size: M2
Dimension(1): 12.6 x 11.4 mm
Glob Top: Black, Square: 8.6 x 8.6 mm
Thickness: 0.58 mm max.
Pitch: 14.25 mm
Module Size: M2
Dimension(1): 12.6 x 11.4 mm
Glob Top: Clear, Round: Ø 7.5 mm max.
Thickness: 0.58 mm max.
Pitch: 14.25 mm
M2 - F Module - Ordering Code: 09FT
M2 - B Module - Ordering Code: 09BT
Module Size: M2
Dimension(1): 12.6 x 11.4 mm
Glob Top: Black, Square: 8.6 x 8.6 mm
Thickness: 0.58 mm max.
Pitch: 14.25 mm
Module Size: M2
Dimension(1): 12.6 x 11.4 mm
Glob Top: Clear, Round: Ø 8.0 mm max.
Thickness: 0.58 mm max.
Pitch: 14.25 mm
M3 - G Module - Ordering Code: 09GT
M4 - C Module - Ordering Code: 09CT
Module Size: M4
Dimension(1): 12.6 x 12.6 mm
Glob Top: Black, Square: 8.6 x 8.6 mm
Thickness: 0.58 mm
Pitch: 14.25 mm
Module Size: M3
Dimension(1): 10.6 x 8.0 mm
Glob Top: Clear, Round: Ø 6.5 mm max.
Thickness: 0.58 mm max.
Pitch: 9.5 mm
M3 - H Module - Ordering Code: 09HT
M4 - D Module - Ordering Code: 09DT
Module Size: M4
Dimension(1): 12.6 x 12.6 mm
Glob Top: Black, Square: 8.6 x 8.6 mm
Thickness: 0.58 mm max.
Pitch: 14.25 mm
Module Size: M3
Dimension(1): 10.6 x 8.0 mm
Glob Top: Clear, Round: Ø 6.5 mm max.
Thickness: 0.58 mm max.
Pitch: 9.5 mm
Note:
1. The module dimensions listed refer to the dimensions of the
exposed metal contact area. The actual dimensions of the
module after excise or punching from the carrier tape are
generally 0.4 mm greater in both directions (i.e. a punched
M2 module will yield 13.0 x 11.8 mm).
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Camberley, Surrey GU15 3YL
England
TEL (44) 1276-686-677
FAX (44) 1276-686-697
Zone Industrielle
13106 Rousset Cedex
France
TEL (33) 4-4253-6000
FAX (33) 4-4253-6001
Asia
Atmel Asia, Ltd.
Room 1219
Chinachem Golden Plaza
77 Mody Road Tsimhatsui
East Kowloon
Hong Kong
TEL (852) 2721-9778
FAX (852) 2722-1369
Japan
Atmel Japan K.K.
9F, Tonetsu Shinkawa Bldg.
1-24-8 Shinkawa
Chuo-ku, Tokyo 104-0033
Japan
TEL (81) 3-3523-3551
FAX (81) 3-3523-7581
Fax-on-Demand
North America:
1-(800) 292-8635
International:
1-(408) 441-0732
e-mail
[email protected]
Web Site
http://www.atmel.com
BBS
1-(408) 436-4309
© Atmel Corporation 2000.
Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for
any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without
notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual property of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are
not authorized for use as critical components in life suppor t devices or systems.
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®
and/or
™
are registered trademarks and trademarks of Atmel Corporation.
Terms and product names in this document may be trademarks of others.
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