MOTOROLA MMBT404ALT1

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by MMBT404ALT1/D
SEMICONDUCTOR TECHNICAL DATA
PNP Silicon
COLLECTOR
3
Motorola Preferred Device
1
BASE
3
2
EMITTER
1
2
MAXIMUM RATINGS
Rating
CASE 318 – 08, STYLE 6
SOT– 23 (TO – 236AB)
Symbol
Value
Unit
Collector–Emitter Voltage
VCEO
–35
Vdc
Collector–Base Voltage
VCBO
–40
Vdc
Emitter–Base Voltage
VEBO
–25
Vdc
IC
–150
mAdc
Collector Current — Continuous
DEVICE MARKING
MMBT404ALT1 = 2N
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
PD
225
mW
1.8
mW/°C
RθJA
556
°C/W
PD
300
mW
2.4
mW/°C
RθJA
417
°C/W
TJ, Tstg
– 55 to +150
°C
Total Device Dissipation FR-5 Board,*
TA = 25°C
Derate above 25°C
Thermal Resistance, Junction to Ambient
Total Device Dissipation
Alumina Substrate,** TA = 25°C
Derate above 25°C
Thermal Resistance, Junction to Ambient
Junction and Storage Temperature
* FR–5 = 1.0 x 0.75 x 0.062 in.
** Alumina = 0.4 x 0.3 x 0.024 in. 99.5% alumina.
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Symbol
Min
Typ
Max
Unit
Collector–Emitter Breakdown Voltage
(IC = –10 mAdc, IB = 0)
V(BR)CEO
–35
—
—
Vdc
Collector–Emitter Breakdown Voltage
(IC = –10 µAdc, IE = 0)
V(BR)CBO
–40
—
—
Vdc
Emitter–Base Breakdown Voltage
(IE = –10 µAdc, IC = 0)
V(BR)EBO
–25
—
—
Vdc
Collector Cutoff Current
(VCB = –10 Vdc, IE = 0)
ICBO
—
—
–100
nAdc
Emitter Cutoff Current
(VEB = –10 Vdc, IC = 0)
IEBO
—
—
–100
nAdc
Characteristic
OFF CHARACTERISTICS
Thermal Clad is a trademark of the Bergquist Company
Preferred devices are Motorola recommended choices for future use and best overall value.
Motorola Small–Signal Transistors, FETs and Diodes Device Data
 Motorola, Inc. 1996
1
MMBT404ALT1
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) (Continued)
Characteristic
Symbol
Min
Typ
Max
Unit
DC Current Gain
(IC = –12 mAdc, VCE = –0.15 Vdc)
hFE
100
—
400
—
Collector–Emitter Saturation Voltage
(IC = –12 mAdc, IB = –0.4 mAdc)
(IC = –24 mAdc, IB = –1.0 mAdc)
VCE(sat)
—
—
—
—
–0.15
–0.2
Base–Emitter Saturation Voltage
(IC = –12 mAdc, IB = –0.4 mAdc)
(IC = –24 mAdc, IB = –1.0 mAdc)
VBE(sat)
—
—
—
—
–0.85
–1.0
Cobo
—
—
20
pF
Delay time
(VCC = –10 Vdc, IC = –10 mAdc) (Figure 1)
td
—
43
—
ns
Rise Time
(IB1 = –1.0 mAdc, VBE(off) = –14 Vdc)
tr
—
180
—
ns
Storage Time
(VCC = –10 Vdc, IC = –10 mAdc)
ts
—
675
—
ns
Fall Time
(IB1 = IB2 = –1.0 mAdc) (Figure 1)
tf
—
160
—
ns
ON CHARACTERISTICS
Vdc
Vdc
SMALL–SIGNAL CHARACTERISTICS
Output Capacitance
(VCB = –6.0 Vdc, IE = 0, f = 1.0 MHz)
SWITCHING CHARACTERISTICS
VCC = –10 V
VBB
RBB
1.0 k
0.1 µF
Vin
1.0 k
TO SCOPE
RB
10 k
51
Vin
(Volts)
ton, td, tr
toff, ts and tf
VBB
(Volts)
–12
+1.4
+20.6
–11.6
Voltages and resistor values shown are
for IC = 10 mA, IC/IB = 10 and IB1 = IB2
Figure 1. Switching Time Test Circuit
2
Motorola Small–Signal Transistors, FETs and Diodes Device Data
MMBT404ALT1
INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to insure proper solder connection
0.037
0.95
0.037
0.95
0.079
2.0
0.035
0.9
0.031
0.8
inches
mm
SOT–23
SOT–23 POWER DISSIPATION
The power dissipation of the SOT–23 is a function of the
pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power dissipation.
Power dissipation for a surface mount device is determined
by T J(max), the maximum rated junction temperature of the
die, RθJA, the thermal resistance from the device junction to
ambient, and the operating temperature, TA . Using the
values provided on the data sheet for the SOT–23 package,
PD can be calculated as follows:
PD =
TJ(max) – TA
RθJA
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature TA of 25°C, one can
calculate the power dissipation of the device which in this
case is 225 milliwatts.
PD =
150°C – 25°C
556°C/W
= 225 milliwatts
The 556°C/W for the SOT–23 package assumes the use
of the recommended footprint on a glass epoxy printed circuit
board to achieve a power dissipation of 225 milliwatts. There
are other alternatives to achieving higher power dissipation
from the SOT–23 package. Another alternative would be to
use a ceramic substrate or an aluminum core board such as
Thermal Clad. Using a board material such as Thermal
Clad, an aluminum core board, the power dissipation can be
doubled using the same footprint.
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within a
short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
• Always preheat the device.
• The delta temperature between the preheat and
soldering should be 100°C or less.*
• When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering method,
the difference shall be a maximum of 10°C.
• The soldering temperature and time shall not exceed
260°C for more than 10 seconds.
• When shifting from preheating to soldering, the
maximum temperature gradient shall be 5°C or less.
• After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and result
in latent failure due to mechanical stress.
• Mechanical stress or shock should not be applied during
cooling.
* Soldering a device without preheating can cause excessive
thermal shock and stress which can result in damage to the
device.
Motorola Small–Signal Transistors, FETs and Diodes Device Data
3
MMBT404ALT1
PACKAGE DIMENSIONS
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE
MATERIAL.
A
L
3
B S
1
V
2
DIM
A
B
C
D
G
H
J
K
L
S
V
G
C
D
H
K
J
INCHES
MIN
MAX
0.1102 0.1197
0.0472 0.0551
0.0350 0.0440
0.0150 0.0200
0.0701 0.0807
0.0005 0.0040
0.0034 0.0070
0.0180 0.0236
0.0350 0.0401
0.0830 0.0984
0.0177 0.0236
MILLIMETERS
MIN
MAX
2.80
3.04
1.20
1.40
0.89
1.11
0.37
0.50
1.78
2.04
0.013
0.100
0.085
0.177
0.45
0.60
0.89
1.02
2.10
2.50
0.45
0.60
STYLE 6:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
CASE 318–08
SOT–23 (TO–236AB)
ISSUE AE
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Opportunity/Affirmative Action Employer.
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4
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*MMBT404ALT1/D*
MMBT404ALT1/D
Motorola Small–Signal Transistors, FETs and Diodes
Device Data