SM6452AM/BM Audio Variable Volume ICs NIPPON PRECISION CIRCUITS INC. OVERVIEW FEATURES ■ PINOUT 6-channel input/output (positive-phase-sequence output) Attenuation function • 6-channel independent control • +16 to 0 to −79dB variable range • 1.0 dB/step adjustment • Mute function Microcontroller interface • 3-wire serial data interface (SM6452AM) • I2C bus format 2-wire control (SM6452BM)*1 • I2C address = 1000000 Low noise • ≤ 0.002% THD + noise • ≤ 10µVrms residual noise 0.5AVDD analog reference voltage source built-in Power supply • 7 to 13V analog supply • 2.7 to 5.5V digital supply Molybdenum-gate CMOS process 24-pin SSOP SM6452AM Top view pre lim ina ■ ry The SM6452AM/BM are serial-control electronic variable volume ICs for audio applications. They provide electronic volume control for 6 channels, with independent channel gain, attenuation and muting. They feature enhanced digital zip noise suppression. The serial control options are 3-wire interface (SM6452AM) and I2C bus (SM6452BM). The SM6452AM/BM are available in 24-pin SSOP packages. ■ ■ ■ ■ ■ ORDERING INFORMATION D e vice P ackag e SM6452AM 24-pin SSOP SM6452BM 24-pin SSOP 1 24 VREF1 AVDD2 VREF2 AIN1 AOUT1 AIN2 AOUT2 S M 6 4 5 2 AM ■ AVDD1 AIN3 AIN4 AIN5 AIN6 AVSS1 AOUT3 AOUT4 AOUT5 AOUT6 AVSS2 DVDD DVSS MDT MCK RSTN 12 13 MLEN 24 AVDD2 SM6452BM Top view AVDD1 1 VREF1 VREF2 AOUT1 AIN2 AOUT2 S M 6 4 5 2 BM AIN1 AIN3 AIN4 AIN5 AIN6 AVSS1 DVDD SDA RSTN 12 13 AOUT3 AOUT4 AOUT5 AOUT6 AVSS2 DVSS SCL NC *1. I2C bus is a registered trademark of Philips Electronics N.V. NIPPON PRECISION CIRCUITS—1 SM6452AM/BM PACKAGE DIMENSIONS 5.40 0.20 7.80 0.30 ina ry Unit: mm + 0.1 0.15 − 0.05 0.36 0.10 0.10 lim BLOCK DIAGRAM 0.12 M +0.20 1.90−0.10 0.8 0.10 0.10 1.80 10.05 0.20 10.20 0.30 AVDD1 0.50 0.20 AVDD2 AIN1 ATT Control Gain/ATT Control AOUT1 AIN2 ATT Control Gain/ATT Control AOUT2 AIN3 ATT Control Gain/ATT Control AOUT3 AIN4 ATT Control Gain/ATT Control AOUT4 AIN5 ATT Control Gain/ATT Control AOUT5 AIN6 ATT Control Gain/ATT Control AOUT6 pre 0 10 Gain/ATT Decoder VREF2 VREF1 Interface Control AVSS2 AVSS1 DVSS MLEN(AM)/NC(BM) RSTN MCK(AM)/SCL(BM) MDT(AM)/SDA(BM) DVDD NIPPON PRECISION CIRCUITS—2 SM6452AM/BM PIN DESCRIPTION Number Name I/O 1 A/D2 1 AV D D 1 – A Analog supply 1 2 VREF1 O A Reference voltage source capacitor connection (0.5AV D D 1 ) 3 AIN1 I A Channel 1 audio input 4 AIN2 I 5 AIN3 I 6 AIN4 I 7 AIN5 I 8 AIN6 I 9 AV S S 1 – 10 DV D D – MDT (AM) I S D A (BM) I/O RSTN Ip MLEN (AM) Ip NC (BM) – MCK (AM) I SCL (BM) I DV S S – AV S S 2 Channel 2 audio input A Channel 3 audio input A Channel 4 audio input A Channel 5 audio input A Channel 6 audio input A Analog ground 1 D Digital supply D Microcontroller data input D I2 C bus serial data input and acknowledge (ACK) signal output D System reset input (active LOW -level) D Microcontroller latch enable input – No connection D Microcontroller clock input D I2 C bus clock input D Digital ground – A Analog ground 2 AOUT6 O A Channel 6 audio output AOUT5 O A Channel 5 audio output AOUT4 O A Channel 4 audio output AOUT3 O A Channel 3 audio output AOUT2 O A Channel 2 audio output AOUT1 O A Channel 1 audio output VREF2 O A Reference voltage source capacitor connection (0.5AV D D 2 ) AV D D 2 – A Analog supply 2 13 16 17 18 19 20 21 22 23 pre 24 lim 14 15 ina ry A 11 12 Description 1. Ip = input pin with pull-up 2. A = analog, D= digital NIPPON PRECISION CIRCUITS—3 SM6452AM/BM SPECIFICATIONS Absolute Maximum Ratings AVSS1 = AVSS2 = DVSS = 0V, AVDD1 = AVDD2 = AVDD, DVDD = DVDD Symbol Rating 1 Unit AV D D −0.3 to 15.0 V DV D D −0.3 to 7.0 V V INA V S S − 0.3 to AV D D + 0.3 V V IND V S S − 0.3 to DV D D + 0.3 V V IOPEN 10 V T stg −55 to 125 °C PD TBD mW Symbol Rating Unit AV D D 7.0 to 13.0 V DV D D 2.7 to 5.5 V Supply voltage deviation AV D D 1 − AV D D 2 , AV S S 1 − AV S S 2 , AV S S 1 − DV S S , AV S S 2 − DV S S ±0.1 V Operating temperature T opr −40 to 85 °C Analog supply voltage Digital supply voltage Analog input voltage Digital input voltage I2 C bus signal input voltage (SDA, SCL) Storage temperature range Pow er dissipation 1. Ratings also apply at supply switch ON and OFF. ina ry P arameter Recommended Operating Conditions AVSS1 = AVSS2 = DVSS = 0V P arameter Analog supply voltage pre lim Digital supply voltage NIPPON PRECISION CIRCUITS—4 SM6452AM/BM DC Characteristics (SM6452AM) AVDD = 7 to 13V, DVDD = 2.7 to 5.5V, VSS = 0V, Ta = −40 to 85°C Rating DVDD current consumption Symbol ID D D 1 ID D D 2 AVDD1, AVDD2 current consumption ID D A M D T, MCK, MLEN, RSTN HIGH-level input voltage V IH M D T, MCK, MLEN, RSTN LOW -level input voltage V IL RSTN, MLEN input current IIL1 M D T, MCK input leakage current IL L 1 IL H 1 RSTN, MLEN input leakage current IL H 2 Condition Unit min typ max Data transfer stopped, MDT = MCK = M L E N = R S T N = DV D D = 5V – TBD TBD µA Data transfer in progress, DV D D = 5V – TBD TBD mA – TBD TBD mA 0.7DV D D – – V – – 0.3DV D D V V IN = 0V – TBD TBD µA V IN = 0V – – TBD µA V IN = DV D D – – TBD µA V IN = DV D D – – TBD µA ina ry P arameter DC Characteristics (SM6452BM) AVDD = 7 to 13V, DVDD = 2.7 to 5.5V, VSS = 0V, Ta = −40 to 85°C Rating Symbol Condition lim P arameter DVDD current consumption Unit min typ max ID D D 1 Data transfer stopped, S D A = SCL = RSTN = DV D D – TBD TBD µA ID D D 2 Data transfer in progress – TBD TBD mA ID D A – TBD TBD mA S D A, SCL, RSTN HIGH-level input voltage V IH 0.7DV D D – – V S D A, SCL, RSTN LOW -level input voltage V IL – – 0.3DV D D V RSTN input current IIL1 V IN = 0V – TBD TBD µA S D A, SCL input current IIL2 V IN = 0V – TBD TBD µA RSTN input leakage current IL H 1 V IN = DV D D – – TBD µA IL H 2 V IN = DV D D – – TBD µA IL H 3 V IN = 10V – – TBD µA VOL A CK signal output, 3mA input current TBD – TBD V pre AVDD1, AVDD2 current consumption S D A, SCL input leakage current S D A L OW -level output voltage NIPPON PRECISION CIRCUITS—5 SM6452AM/BM AC Digital Characteristics (SM6452AM) AVDD = 7 to 13V, DVDD = 2.7 to 5.5V, VSS = 0V, Ta = −40 to 85°C Serial inputs (MDT, MCK, MLEN) Rating Symbol M C K , M L E N r ise time MCK, MLEN fall time MDT setup time MDT hold time MLEN setup time MLEN hold time M L E N L OW -level pulsewidth MLEN HIGH-level pulsewidth typ max tr – – 100 ns tf – – 100 ns tM D S 50 – – ns tM D H 50 – – ns tM C S 50 – – ns tM C H 50 – – ns tM E W L 50 – – ns tM E W H 50 – – ns 0.5DV DD MDT tMDH lim tMDS MCK tMCS MLEN Unit min ina ry P arameter 0.5DV DD tMCH tMEWL 0.5DV DD tMEWH Reset input (RSTN) P arameter pre R S T N L OW -level pulsewidth Rating Symbol tR S T N Unit min typ max 100 – – ns NIPPON PRECISION CIRCUITS—6 SM6452AM/BM AC Digital Characteristics (SM6452BM) AVDD = 7 to 13V, DVDD = 2.7 to 5.5V, VSS = 0V, Ta = −40 to 85°C Serial inputs (SDA, SCL) Rating Symbol SCL hold time (start) SCL setup time (stop) S D A hold time S D A setup time SCL clock HIGH-level pulsewidth SCL clock LOW -level pulsewidth SCL rise time SCL fall time SDA SCL tSU:DAT typ max tH D : S TA 4.0 – – µs tS U : S TA 4.0 – – µs tH D : DAT 5.0 – – µs tS U : DAT 250 – – ns tH I G H 4.0 – – µs tL O W 4.7 – – µs tr – – 1000 ns tf – – 300 ns tHD:DAT lim tHD:STA Unit min ina ry P arameter tHIGH tHD:STO tLOW Reset input (RSTN) P arameter tR S T N Unit min typ max 100 – – ns pre R S T N L OW -level pulsewidth Rating Symbol NIPPON PRECISION CIRCUITS—7 SM6452AM/BM AC Analog Characteristics AVDD = 9V, DVDD = 5V, (TBD)Vrms analog input amplitude, 1kHz analog input frequency, 100kΩ output load resistance, Ta = 25°C, AC-coupled inputs Analog inputs (AIN1 to AIN6) Rating Symbol Reference input amplitude V AI resistance 1 R IN Input clipping voltage VCLP Input Condition Unit ina ry P arameter ATT = 0dB THD + N = 1%, ATT = 0dB min typ max – TBD – Vr m s TBD TBD TBD Ω – TBD – Vr m s 1. R IN varies with the ATT setting. See figure 11 in the Analog Performance Characteristics section. Analog outputs (AOUT1 to AOUT6) Rating P arameter Symbol Residual noise voltage VNS Signal-to-noise ratio SNR Total harmonic distortion + noise RCNT Step size ATT = 0dB, 20kHz lowpass filter Step Attenuation error (1 to 20kHz) Absolute attenuation (1kHz) crosstalk 1 Frequency response Quiescent output zip noise voltage 2 Minimum driver load resistance Unit min typ max – TBD TBD µVr m s TBD TBD – dBr – TBD TBD % −7 9 – +16 dB 0.8 1.0 1.5 dB ERR1 +16 to −6 0 d B TBD – TBD dB ERR2 −61 to −7 9 d B TBD – TBD dB AT 0 ATT = 16dB – TBD – dB AT 1 ATT = 0dB – TBD – dB AT 2 ATT = −2 0 d B – TBD – dB AT 3 ATT = −4 0 d B – TBD – dB AT 4 ATT = −6 0 d B – TBD – dB AT 5 ATT = −7 9 d B – TBD – dB Mute ATT = Mute TBD TBD – dB CT ATT = 0dB TBD TBD – dB FR ATT = 0dB, f = 200kHz – TBD – dB NJ 0Vr ms input signal – – TBD mVp-p TBD TBD – Ω pre Mute attenuation (1kHz) Channel Input signal: 0Vrm s , A - weight filter, 0dBr = (TBD)Vr m s , ATT = 0dB lim Gain control range THD + N Condition RML ATT = 0dB, THD + N = 1% 1. Leakage to other channels when analog input is applied to one channel only. 2. Noise occurring when the ATT setting is changed (peak to peak) Reference voltage (VREF1, VREF2) P arameter Reference voltage output Symbol VREF Rating Condition Unit min typ max 0.45AV D D 0.5AV D D 0.55AV D D V NIPPON PRECISION CIRCUITS—8 SM6452AM/BM ina ry MEASUREMENT CIRCUIT pre lim TBD NIPPON PRECISION CIRCUITS—9 SM6452AM/BM MICROCONTROLLER INTERFACE SM6452AM Transfer format Channel6 Don't Care Attenuation Data 6 Attenuation Data 5 Attenuation Data 4 Attenuation Data 3 Attenuation Data 2 Attenuation Data 1 Attenuation Data 0 D4 D3 D2 D1 D0 MCK MLEN Channel4 D5 Channel3 D6 MDT Channel 2 D7 Channel1 D8 Don't Care D15 D14 D13 D12 D11 D10 D9 Don't Care Channel5 ina ry The SM6452AM uses a 3-wire serial interface to select channels and set attenuation levels. The transfer format is shown in figure 1. Figure 1. Microcontroller input data timing lim Data is shifted into the internal shift register on the rising edge of MCK, and the attenuation value is loaded and changed on the rising edge of MLEN. Accordingly, data on MDT should be changed on the falling edge of MCK. The dotted lines for MCK and MLEN also indicate valid timing. Data description (D15 to D0) In the following description, LOW implies VIL level and HIGH implies VIH level. ■ pre ■ D15, D14 Don’t care. D13 to D8 Chip address bits. Each of 6 channels is set when the corresponding bit is set HIGH. • D13: channel 1 • D12: channel 2 • D11: channel 3 • D10: channel 4 • D9: channel 5 • D8: channel 6 D7 to D0 Gain/attenuation set bits. The gain/attenuation setting for ATT register settings are shown in table 1. ■ NIPPON PRECISION CIRCUITS—10 SM6452AM/BM SM6452BM Transfer format AD6 to AD0 = 1000000 First Byte (Slave address) SDA AD6 Start condition Third Byte Second Byte AD0 L SCL ina ry The SM6452BM uses Philips I2C interface to select channels and set attenuation levels. For details of the I2C bus, refer to Philips “I2C Bus Specification Description”. Here, we describe only the aspects for controlling the SM6452BM. The transfer format is shown in figure 2. ACK D15 D8 ACK D7 D0 ACK Stop condition Figure 2. Microcontroller input data timing As shown in figure 2, the data format comprises 3 bytes. After the SM6452BM receives 8 bits for each byte, an acknowledge signal (ACK) on SDA goes LOW to confirm the data transfer. Data format ■ Byte 1 (slave address) The first byte is slave address. The SM6452BM address (AD6 to AD0) is 1000000. The 8th bit indicates information write and should be set LOW. Bytes 2 and 3 Bytes 2 and 3 are the channel select and gain/attenuation level set bits. Byte 2 represents data bits D15 to D8, and byte 3 represents data bits D7 to D0. lim ■ Data description (D15 to D0) ■ pre ■ D15, D14 Don’t care. D13 to D8 Chip address bits. Each of 6 channels is set when the corresponding bit is set HIGH. • D13: channel 1 • D12: channel 2 • D11: channel 3 • D10: channel 4 • D9: channel 5 • D8: channel 6 D7 to D0 Gain/attenuation set bits. The gain/attenuation setting for ATT register settings are shown in table 1. ■ NIPPON PRECISION CIRCUITS—11 SM6452AM/BM Attenuation settings Table 1. ATT settings AT T H D7 D6 D5 D4 D3 D2 D1 D0 16dB 00 × LOW LOW LOW LOW LOW LOW LOW 15dB 01 × LOW LOW LOW LOW LOW LOW HIGH ↓ ↓ ↓ ↓ 1dB 0F × 0dB 10 −1 d B ina ry Attenuation 1 ↓ ↓ ↓ ↓ ↓ LOW LOW LOW HIGH HIGH HIGH HIGH × LOW LOW HIGH LOW LOW LOW LOW 11 × LOW LOW HIGH LOW LOW LOW HIGH ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ −1 5 d B 1F × LOW LOW HIGH HIGH HIGH HIGH HIGH −1 6 d B 20 × LOW HIGH LOW LOW LOW LOW LOW −1 7 d B 21 × LOW HIGH LOW LOW LOW LOW HIGH ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ −7 8 d B 5E × HIGH LOW HIGH HIGH HIGH HIGH LOW −7 9 d B 5F × HIGH LOW HIGH HIGH HIGH HIGH HIGH Mute 6× × HIGH HIGH LOW × × × × Mute 7× × HIGH HIGH HIGH × × × × lim ↓ pre 1. Outputs are muted after system reset. The ATT hex code is determined by D6 to D0 only. NIPPON PRECISION CIRCUITS—12 SM6452AM/BM ANALOG PERFORMANCE CHARACTERISTICS TBD ina ry AVDD = 9V, DVDD = 5V, 100kΩ output load resistance, Ta = 25°C TBD Figure 4. THD + N vs. frequency TBD TBD lim Figure 3. THD + N vs. input amplitude pre Figure 5. Gain/attenuation error Figure 6. Residual noise vs. ATT TBD TBD Figure 7. Frequency response Figure 8. Crosstalk frequency response NIPPON PRECISION CIRCUITS—13 SM6452AM/BM Figure 9. FFT spectrum Figure 10. THD + N vs. load resistance TBD lim TBD TBD ina ry TBD Figure 12. Current consumption vs. supply voltage pre Figure 11. Input resistance vs. ATT TBD Figure 13. Current consumption vs. temperature NIPPON PRECISION CIRCUITS—14 SM6452AM/BM ina ry TYPICAL APPLICATIONS pre lim TBD NIPPON PRECISION CIRCUITS—15 pre lim ina ry SM6452AM/BM NIPPON PRECISION CIRCUITS INC. reserves the right to make changes to the products described in this data sheet in order to improve the design or performance and to supply the best possible products. Nippon Precision Circuits Inc. assumes no responsibility fo r the use of any circuits shown in this data sheet, conveys no license under any patent or other rights, and makes no claim that the circuits are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Nippon Precision Circuits Inc. makes no claim or warranty that such applications will be suitable for the use specified without further testing or modification. The products described in this data sheet are not intended to use for the apparatus which influence human lives due to the failure or malfunction of the products. Customers are requested to comply with applicable laws and regulations in effect now and hereinafter, including compliance with expor t controls on the distribution or dissemination of the products. Customers shall not expor t, directly or indirectly, any products without first obtaining required licenses and approvals from appropriate government agencies. NIPPON PRECISION CIRCUITS INC. NIPPON PRECISION CIRCUITS INC. 4-3, Fukuzumi 2-chome Koto-ku, Tokyo 135-8430, Japan Telephone: 03-3642-6661 Facsimile: 03-3642-6698 NP9917BE 2000.1 NIPPON PRECISION CIRCUITS—16