HT16512 1/4 to 1/11 Duty VFD Controller Features · · · · · · Logic voltage: 5V High-voltage output: VDD-30V max. Multiple display (11-segment & 11-digit to 16-segment & 4-digit) 6´4 matrix key scanning 8 steps dimmer circuit 4 LED output ports · · · 4-bit general purpose input port No external resistors necessary for driver output (provides PMOS open-drain and pull-low resistor output) Serial interface with MCU (CLK, CS, DI, DO) Applications · · Consumer products panel function control Industrial measuring instrument panel function control · Other similar application panel function control General Description Serial data inputs to the HT16512 through a three-line serial interface. This VFD controller/driver is ideal as a peripheral device for an MCU. HT16512 is a VFD (Vacuum Fluorescent Display) controller/driver that is driven on a 1/4 to 1/11 duty factor. It consists of 11 segment output lines, 6 grid output lines, 5 segment/grid output drive lines, 4 LED output ports, a control circuit, a display memory, and a key scan circuit. 1 December 24, 1999 HT16512 Block Diagram C o m m a n d D e c o d e r D I D O C L K S e r ia l I/F C S O S C 6 1 6 - B it O u tp u t L a tc h D is p la y R A M 1 6 - B it ´ 1 1 W o r d s 1 1 S 0 /K 0 ~ S 5 /K 5 S e g m e n t D r iv e r 5 S 6 ~ S 1 0 5 O S C T im in g G e n e r a to r K e y S c a n K e y D a ta R A M M u ltip le x e d D r iv e r 5 G r id D r iv e r 6 S 1 1 /G 1 0 ~ S 1 5 /G 6 5 (4 ´ 6 ) 1 1 - B it S h ift R e g is te r 4 - B it L a tc h 4 - B it L a tc h 5 D a ta S e le c to r K 0 ~ K 3 S W 0 ~ S W 3 1 6 1 1 6 G 0 ~ G 5 D im m in g C ir c u it L E D 0 ~ L E D 3 V D D V S S V E E Pin Assignment L L L L G G G G V D E D E D E D E D V S O S D C S 3 2 1 0 3 2 1 0 S W 0 S W 1 S W 2 S W 3 D O D I V S S C L K C S K 0 K 1 4 4 4 3 4 2 4 1 4 0 3 9 3 8 3 7 3 6 3 5 3 4 1 3 3 2 3 2 3 3 1 4 3 0 5 0 6 $ # " " 3 . 2 6 7 2 9 2 8 2 7 8 2 6 9 2 5 1 0 2 4 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 G 4 G 5 S 1 S 1 S 1 S 1 V E S 1 S 1 S 9 S 8 0 5 /G 4 /G 3 /G 2 /G E 1 /G 6 7 8 9 1 0 S 7 S 6 S 5 S 4 S 3 S 2 S 1 S 0 V D K 3 K 2 /K 5 /K 4 /K 3 /K 2 /K 1 /K 0 D 2 December 24, 1999 HT16512 Pin Description Pin No. Pin Name I/O Description 1~4 SW0~SW3 I 4-bit general purpose input port 5 DO O Output serial data at the falling edge of the shift clock, starting from low order bit. This is an NMOS open-drain output pin. 6 DI I Input serial data at the rising edge of the shift clock, starting from the low order bit. 7, 43 VSS ¾ Power supply, ground 8 CLK I Reads serial data at the rising edge, and outputs data at the falling edge. 9 CS I Initializes serial interface at the rising or falling edge of the HT16512. Then it waits to receive a command. Data input after CS has fallen is processed as a command. While command data is processed, current processing is stopped, and the serial interface is initialized. While CS is high, CLK is ignored. 10~13 K0~K3 I Keying data input to these pins is latched at the end of the display cycle. 14, 38 VDD ¾ Posistive power supply 15~20 S0/K0~S5/K5 O Segment or key source output pins (dual function). This is PMOS open-drain and pull-low resistor output. 21~25 S6~S10 O Segment driver output pins (segment only). This is PMOS open-drain and pull-low resistor output. 26, 28~31 S11/G10~S15/G6 O Segment or Grid driver output pins. These pins are selectable for segment or grid driving. This is PMOS open-drain and pull-low resistor output. 27 VEE ¾ VFD power supply 37~32 G0~G5 O Grid driver output pins (Grid only). This is PMOS open-drain and pull-low resistor output. 42~39 LED0~LED3 O LED driver output ports. This is a CMOS output pin. 44 OSC I Connected to an external resistor or an RC oscillator circuit. 3 December 24, 1999 HT16512 Approximate internal connections N M O S O U T P M O S O U T V D D V E E C M O S O U T V D D Absolute Maximum Ratings Supply Voltage..............................-0.3V to 5.5V Operating Temperature ..............-25°C to 75°C Input Voltage .................VSS-0.3V to VDD+0.3V Storage Temperature.................-50°C to 125°C Note: These are stress ratings only. Stresses exceeding the range specified under ²Absolute Maximum Ratings² may cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability. D.C. Characteristics Symbol Parameter Ta=25°C Test Conditions VDD Conditions Min. Typ. Max. Unit VDD Logic Supply Voltage ¾ ¾ 4.5 5 5.5 V VEE VFD Supply Voltage ¾ ¾ 0 ¾ VDD-30 V fOSC Oscillation Frequency 5V ROSC=51kW 350 500 650 kHz RPL Output Pull-low Resistor 5V Driver output 50 100 150 kW IDD Operating Current 5V No load, VFD display off ¾ ¾ 5 mA IOL Driver Leakage Current 5V VO=VDD-30V VFD driver off ¾ ¾ -10 mA IOL1 LED Sink Current 5V VOL=1V LED0~LED3 20 ¾ ¾ mA IOH1 LED Source Current 5V VOH=0.9VDD LED0~LED3 -1 ¾ ¾ mA IOH21 Segment/Key Source Current 5V VOH=VDD-2V S0/K0~S5/K5, S6~S10 -3 ¾ ¾ mA 4 December 24, 1999 HT16512 Symbol Test Conditions Parameter VDD Conditions Min. Typ. Max. Unit -15 ¾ ¾ mA 4 ¾ ¾ mA IOH22 Segment/Grid Source Current 5V VOH=VDD-2V G0~G5, S11/G10~S15/G6 IOL3 DO Sink Current 5V VOL=0.4V VIH ²H² Input Voltage ¾ ¾ 0.7VDD ¾ VDD V VIL ²L² Input Voltage ¾ ¾ 0 ¾ 0.3VDD V VOH1 High-level Output Voltage 5V LED0~LED3, IOH1=-1mA 0.9VDD ¾ VDD V VOL1 Low-level Output Voltage 5V LED0~LED3, IOL1=20mA 0 ¾ 1 V VOL2 Low-level Output Voltage 5V DO, IOL2=4mA 0 ¾ 0.4 V A.C. Characteristics Symbol tPHL tPLH Parameter Propagation Delay Time tr1 Ta=25°C Test Conditions Rise Time Min. Typ. Max. Unit ¾ ¾ 300 ns ¾ ¾ 100 ns CL=300pF, S0~S10 ¾ ¾ 2 ms CL=300pF, 5V G0~G5, S11/G10~S15/G6 ¾ ¾ 0.5 ms 5V CL=300pF, Sn, Gn ¾ ¾ 120 ms 5V CLK®DO 5V CL=15pF, RL=10kW 5V tr2 Conditions VDD tf Fall Time tmax Maximum Clock Frequency 5V Duty=50% 1 ¾ ¾ MHz Ci Input Capacitance 5V ¾ ¾ ¾ 15 pF tCW Clock Pulse Width 5V ¾ 400 ¾ ¾ ns tSW Strobe Pulse Width 5V ¾ 1 ¾ ¾ us tSU Data Setup Time 5V ¾ 100 ¾ ¾ ns th Data Hold Time 5V ¾ 100 ¾ ¾ ns tCS Clock-Strobe Time 5V CLK rising edge to CS rising edge 1 ¾ ¾ ms tW Wait Time 5V CLK rising edge to CLK falling edge 1 ¾ ¾ ms 5 December 24, 1999 HT16512 Functional Description K0~K3 are sampled by strobe signal S0/K0~S5/K5 and latched into the register. Display RAM and display mode The static display RAM is organized into 22´8 bits and stores the data transmitted from an external device to the HT16512 through a serial interface. The contents of the RAM are directly mapped to the contents of the VFD driver. Data in the RAM can be accessed through the data setting, address setting and display control commands. It is assigned addresses in 8-bit unit as follows: S 0 ~ S 3 A d d re s s : 0 0 0 0 0 0 0 0 1 1 1 S 4 ~ 0 H 2 H 4 H 6 H 8 H A H C H E H 0 H 2 H 4 H b 0 b 1 b 2 b 3 b 4 b 5 b 6 b 7 S 7 S 8 ~ S 1 1 0 0 0 0 0 0 0 0 1 1 1 1 3 5 7 9 B D F 1 3 5 S 1 2 H H H H H H H H H H H ~ The key matrix is made up of a 6´4 matrix, as shown below. S 0 /K 0 it0 it1 it2 it3 D ig D ig D ig D ig D ig D ig D ig it4 it5 it6 it7 it8 it9 it1 0 S 2 /K 2 S 3 /K 3 S 4 /K 4 S 5 /K 5 K 0 K 1 K 2 K 3 S 1 5 D ig D ig D ig D ig S 1 /K 1 D e ta il K e y m a tr ix The data of each key is stored as illustrated below, and is read with the read command, starting from the least significant bit. b 0 b 1 b 2 b 3 b 4 b 5 b 6 b 7 Dimming control K 0 ~ K 3 K 0 ~ K 3 S 0 /K 0 S 1 /K 1 S 2 /K 2 S 3 /K 3 S 4 /K 4 S 5 /K 5 R e a d in g fir s t R e a d in g la s t b 0 b 1 b 2 b 3 b 4 b 5 b 6 b 7 HT16512 porvides 8-step dimmer function on display by controlling the 3-bit binary command code. The full pulse width of grid signal is divides into 16 uniform sections by PWM (pulse width modulation) technology. LED port The LED port belongs to the CMOS output configuration. Data is written to the LED port with the write command, starting from the least port¢s least significant bit. In our application (see application circuits), the user adopts an internal NMOS device to a driver LED component by connecting VDD. When a bit of this port is 0, the corresponding LED lights; when the bit is 1, the LED turns off. The data of bits 5 through 8 are ignored. The 16 uniform sections available form 8 steps dimmer via 3-bit binary code. The 8-step dimmer includes 1/16, 2/16, 4/16, 10/16, 11/16, 12/16, 13/16 and 14/16. The 1/16 pulse width indicates minimum lightness. The 14/16 pulse width represents maximum lightness. (Refer to the display control command). Key matrix and key-input data storage RAM M S B The key matrix scans the series key states at e a c h l ev el of t he key s tr ob e s i g n a l (S0/K0~S5/K5) output of the HT16512. The key strobe signal outputs are time-multiplexed signals from S0/K0~S5/K5. The states of inputs L S B b 3 D o n 't c a r e 6 b 2 b 1 b 0 L E D L E D L E D L E D 0 1 2 3 December 24, 1999 HT16512 SW data HT16512 provides an extra 4-bit general input port. The SW data is provided with available binary code. The SW data is read with the read command, starting from the least significant bit. Bits 5 through 8 of the SW data are 0. M S B L S B 0 0 0 0 b 3 b 2 b 1 b 0 S W 0 S W 1 S W 2 S W 3 Commands Commands set the display mode and status of the VFD driver. The first 1 byte input to the HT16512 through the DI pin after the CS pin has fallen, is regarded as a command. If CS is set high while commands/data are transmitted, serial communication is initialized, and the commands/data being transmitted are not valid (however, the commands/data previously transmitted remains valid). · Display mode setting commands These commands initialize the HT16512 and select the number of segments and the number of grids (1/4~1/11 duty, 11 segments to 16 segments). When these commands are executed, the display is forcibly turned off, and key scanning is also stopped. To resume display, the display command ²ON² must be executed. If the same mode is selected, nothing happens. M S B 0 L S B b 2 0 D o n 't c a r e b 1 b 0 D is 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 p la : 4 : 5 : 6 : 7 : 8 : 9 : 1 : 1 y m d ig d ig d ig d ig d ig d ig 0 d 1 d o d e its , its , its , its , its , its , ig its ig its s e ttin 1 6 s e g 1 6 s e g 1 6 s e g 1 5 s e g 1 4 s e g 1 3 s e g , 1 2 s e , 1 1 s e 7 g s m e m e m e m e m e m e g m g m n ts n ts n ts n ts n ts n ts e n ts e n ts December 24, 1999 HT16512 · Data setting commands These commands set the data write and data read modes. M S B L S B 0 b 3 1 b 2 b 1 b 0 D a 0 0 0 1 1 0 1 1 D o n 't c a r e ta w : W r : W r : R e : R e r ite ite ite a d a d a n d r e a d m o d e s e ttin g s d a ta to d is p la y m e m o r y d a ta to L E D p o rt k e y d a ta S W d a ta A d d r e s s in c r e m e n t m o d e s e ttin g s ( d is p la y m e m o r y ) 0 : In c r e m e n ts a d d r e s s a fte r d a ta h a s b e e n w r itte n 1 : F ix e s a d d r e s s T e s t m o d e s e ttin g s 0 : N o rm a l m o d e 1 : T e s t m o d e , u s e r d o n 't u s e · Address setting commands These commands set the address of the display memory. M S B L S B 1 1 b 4 b 3 b 2 b 1 b 0 D o n 't c a r e A d d re s s (0 0 H ~ 1 5 H ) If address 16H or higher is set, data is ignored until a valid address is set. · Display control commands M S B 1 L S B b 3 0 D o n 't c a r e b 2 b 1 b 0 D im 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 m in : S e : S e : S e : S e : S e : S e : S e : S e g q t p t p t p t p t p t p t p t p u a u ls u ls u ls u ls u ls u ls u ls u ls n tity e w id e w id e w id e w id e w id e w id e w id e w id s e th th th th th th th th ttin to to to to to to to to g s 1 /1 6 2 /1 6 4 /1 6 1 0 /1 1 1 /1 1 2 /1 1 3 /1 1 4 /1 6 6 6 6 6 T u r n s o n /o ff d is p la y 0 : D is p la y o ff ( k e y s c a n c o n tin u e s ) 1 : D is p la y o n 8 December 24, 1999 HT16512 Timing Diagrams tf tr1 ( tr2 ) 9 0 % S n /G n 1 0 % tS W C S tC tC W tC W S C L K tS U th D I tP tP H L L H D O Key scanning and display timing K e y s c a n d a ta S n /K n o u tp u t D ig it 0 D ig it 1 D ig it 2 D ig it n 1 2 3 4 5 6 D ig it 0 G 0 o u tp u t G 1 o u tp u t t t G 2 o u tp u t G n o u tp u t T @ 5 0 0 m s N o te : n = 0 ~ t= 1 /1 T : p u O n e 1 fra m e = T ´ (n + 1 ) 5 6 T ls e w id th o f s e g m e n t s ig n a l is d e c id e d b y o s c illa to r fr e q u e n c y c y c le o f k e y s c a n n in g c o n s is ts o f o n e fr a m e . 9 December 24, 1999 HT16512 Serial communication format · Reception (command/data write) C S C L K 1 D I 2 b 0 3 b 1 7 b 2 8 b 6 b 7 · Transmission (data read) C S 1 C L K D I 2 b 0 3 b 1 4 b 2 5 b 3 6 b 4 7 b 5 8 b 6 tW 1 2 3 4 5 6 b 7 D O b 0 b 1 A d a ta r e a d c o m m a n d is s e t b 2 b 3 b 4 b 5 D a ta is r e a d D O m u s t b e s u r e to c o n n e c t a n e x te r n a l p u ll- h ig h r e s is to r to th is p in ( 1 k W N o te : W h e n d a ta is r e a d , a w a it tim e " tW " o f 1 m s is n e c e s s a r y . to 1 0 k W ). · Updating display memory by incrementing address C S C L K D I C o m C o m C o m D a ta C o m C o m m a n d 1 m a n m a n m a n 1 to m a n d 1 : s d 2 : s d 3 : s n : tra d 4 : c C o m m a n d 2 C o m m a n d 3 D a ta 1 D a ta n C o m m a n d 4 e ts d is p la y m o d e e ts d a ta e ts a d d re s s n s fe r s d is p la y d a ta ( 2 2 b y te s m a x .) o n tr o ls d ip la y 10 December 24, 1999 HT16512 · Updating specific addresses C S C L K D I C o m m a n d 1 C o m m a n d 2 D a ta C o m m a n d 2 D a ta C o m m a n d 1 : s e ts d a ta C o m m a n d 2 : s e ts a d d re s s D a ta : d is p la y d a ta Application Circuits R 6 R 7 R 8 R 9 D 1 D 2 D 3 D 4 D 5 D 6 S 0 S 1 S 2 S 3 V S 4 D D S 5 V D D R K 0 K 1 K 2 K 3 S 0 /K 0 S 1 /K 1 S 2 /K 2 S 3 /K 3 S 4 /K 4 S 5 /K 5 O S C O S C S 6 ~ S 1 0 C S C L K V M C U D I D D S 1 1 /G 1 0 ~ S 1 5 /G 6 0 6 $ # D O L E D 0 R 2 V V F D E f 5 G r id s /S e g m e n ts 6 G r id s G 0 ~ G 5 V E E R 1 5 S e g m e n ts L E D 1 R 3 L E D 2 R 4 L E D 3 S W 0 S W 1 S W 2 S W 3 -2 5 V V S S R 5 D D Note: ROSC=51kW for oscillator resistor R1=1~10kW for external pull-high resistor R2~R5=750W~1.2kW R6~R9=10kW for external pull-low resistor D1~D6=1N4001 Ef=Filament voltage for VFD 11 December 24, 1999 HT16512 Holtek Semiconductor Inc. (Headquarters) No.3 Creation Rd. II, Science-based Industrial Park, Hsinchu, Taiwan, R.O.C. Tel: 886-3-563-1999 Fax: 886-3-563-1189 Holtek Semiconductor Inc. (Taipei Office) 5F, No.576, Sec.7 Chung Hsiao E. Rd., Taipei, Taiwan, R.O.C. Tel: 886-2-2782-9635 Fax: 886-2-2782-9636 Fax: 886-2-2782-7128 (International sales hotline) Holtek Semiconductor (Hong Kong) Ltd. RM.711, Tower 2, Cheung Sha Wan Plaza, 833 Cheung Sha Wan Rd., Kowloon, Hong Kong Tel: 852-2-745-8288 Fax: 852-2-742-8657 Copyright ã 1999 by HOLTEK SEMICONDUCTOR INC. The information appearing in this Data Sheet is believed to be accurate at the time of publication. However, Holtek assumes no responsibility arising from the use of the specifications described. The applications mentioned herein are used solely for the purpose of illustration and Holtek makes no warranty or representation that such applications will be suitable without further modification, nor recommends the use of its products for application that may present a risk to human life due to malfunction or otherwise. Holtek reserves the right to alter its products without prior notification. For the most up-to-date information, please visit our web site at http://www.holtek.com.tw. 12 December 24, 1999