NPC SM5866AS

SM5866AS
D/A Converter for DSD and PCM
OVERVIEW
The SM5866AS is a D/A converter compatible with
both the DSD SACD signal format and the PCM
CD/DVD-Audio and similar formats. DSD employs
a 1-bit data stream, from a high-order ∆Σ conversion
at 64fs (fs = 44.1kHz), that contains high-level quantization noise in the high-frequency band above
20kHz. The SM5866AS, in DSD reproduction, has a
DSD-dedicated FIR digital filter that attenuates the
DSD quantization noise in the digital domain, and
the resulting multi-level signal is D/A converted. In
PCM reproduction, an oversampled PCM signal
input, provided using a SM5847AF or similar digital
filter, is converted to a multi-level signal by the 3rdorder noise shaper and then the multi-level signal is
D/A converted.
FEATURES
PINOUT
■
■
■
■
■
■
■
■
(Top view)
TSTN
28
1
DVDD
AVSSA
SDI
RA
SBCKA
IOUTA
SBCKD
IOUTAN
RSTN
AVDDA
DI
AVDDB
BCKI
RB
WCKI
IOUTB
DVSS
IOUTBN
BCPOL
AVSSB
DSPOL
CVSS
CVDD
14
15
(Unit: mm)
Weight: 0.60g
+ 0.1
0.15 − 0.
05
1.095TYP
ORDERING INFORMATION
28-pin SOP
0.05 ± 0.05
SM5866AS
18.7 ± 0.3
2.2 ± 0.1
Package
CKI
PACKAGE DIMENSIONS
(note 1) Under the operating conditions 1: 4.5 to 5.5V, –40 to 85°C
(note 2) Under the operating conditions 2: 4.75 to 5.25V, –40 to 70°C
Device
IMD1
IMD0
TO
0.5 ± 0.2
■
Mono-channel multi-level D/A converter
High performance analog characteristics
• DSD mode (typical values)
- THD + N: –109dB (0.00036%)
- D.R: 115dB
• PCM mode (typical values)
- THD+N: –106dB (0.00050%)
- D.R: 112dB
2 selectable DSD digital filters
PCM input mode
• 24-bit, MSB-first, right-justified
• 8-times or 4-times oversampling of fs = 16k to
192kHz
System clock (CKI)
Maximum operating frequency: fCKI (max)
• 37.0MHz (note 1)
• 45.4MHz (note 2)
DSD mode fs = fCKI/512
• typ. fs = 44.1kHz
• max. fs = 52.7kHz (note 1)
• max. fs = 88.7kHz (note 2)
PCM mode system clock
• 192/256/384/512/768fs
Operating voltage: 4.5 to 5.5V
Operating temperature: –40 to 85°C
Package: 28-pin SOP
Molybdenum-gate CMOS process
9.9 ± 0.3
■
7.5 ± 0.2
■
1.27
0 to 10
0.10
0.4 ± 0.1
0.12 M
NIPPON PRECISION CIRCUITS INC.—1
SM5866AS
BLOCK DIAGRAM
DVDD
DVSS
WCKI
BCKI
10
9
DI
SBCKD SBCKA
8
6
5
SDI
4
3
12
11
PCM input interface
DSD input interface
13
7
2
Interpolation
1
CVDD
CKI
CVSS
AVSSB
BCPOL
DSPOL
RSTN
TO
TSTN
14
DSD filter
Noise shaper
15
28
16
27
26
17
23 level
DEM DAC
18
23 level
DEM DAC
19
20
23 level
DEM DAC
21
22
23
23 level
DEM DAC
24
IMD1
IMD0
AVSSA
25
RA
IOUTA
IOUTAN
AVDDA
AVDDB
RB
IOUTB
IOUTBN
NIPPON PRECISION CIRCUITS INC.—2
SM5866AS
PIN DESCRIPTION
Number
Name
I/O1
1
TSTN
Ip
Test mode use only (tie HIGH or leave open for normal operation)
2
TO
O
Test mode use only (leave open for normal operation)
3
DVDD
–
Digital supply VDD
4
SDI
Ip
DSD data input
5
SBCKA
Ip
DSD bit clock input
6
SBCKD
Ip
DSD bit clock input (tie LOW for DSD normal input mode)
7
RSTN
Ip
System reset (active LOW)
8
DI
Ip
PCM data input
9
BCKI
Ip
PCM bit clock input
10
WCKI
Ip
PCM word clock input
11
DVSS
–
Digital ground VSS
12
BCPOL
Ip
DSD mode bit clock polarity select
13
DSPOL
Ip
DSD mode data polarity select
14
CVDD
–
System clock supply VDD
15
CKI
I
System clock
16
CVSS
–
System clock ground VSS
17
AVSSB
–
B-channel analog ground VSS
18
IOUTBN
O
B-channel analog output (inverse-phase)
19
IOUTB
O
B-channel analog output (in-phase)
20
RB
I
B-channel built-in resistor connection
21
AVDDB
–
B-channel analog supply VDD
22
AVDDA
–
A-channel analog supply VDD
23
IOUTAN
O
A-channel analog output (inverse-phase)
24
IOUTA
O
A-channel analog output (in-phase)
25
RA
I
A-channel built-in resistor connection
26
AVSSA
–
A-channel analog ground VSS
27
IMD0
Ip
Input mode select
28
IMD1
Ip
Input mode select
Description
1. Ip = input pin with built-in pull-up resistor
NIPPON PRECISION CIRCUITS INC.—3
SM5866AS
SPECIFICATIONS
Absolute Maximum Ratings
DVSS = CVSS = AVSSA = AVSSB = 0 V, DVDD = CVDD = AVDDA = AVDDB
Parameter
Symbol
Rating
Unit
Supply voltage range
DVDD, CVDD, AVDDA, AVDDB
−0.3 to 7.0
V
Input voltage range1
VIN1
DVSS − 0.3 to DVDD + 0.3
V
Storage temperature range
TSTG
−55 to 125
°C
PD
250
mW
Power dissipation
1. Pins TSTN, SDI, SBCKA, SBCKD, RSTN, DI, BCKI, WCKI, BCPOL, DSPOL, IMD0, IMD1.
Note: Rating applies at power-ON and power-OFF.
Recommended Operating Conditions
DVSS = CVSS = AVSSA = AVSSB = 0 V, DVDD = CVDD = AVDDA = AVDDB
Parameter
Symbol
Rating
Unit
DVDD, CVDD, AVDDA, AVDDB
4.5 to 5.5
V
DVDD – CVDD, DVDD – AVDDA,
DVDD – AVDDB, CVDD – AVDDA,
CVDD – AVDDB, AVDDA – AVDDB,
DVSS – CVSS, DVSS – AVSSA,
DVSS – AVSSB, CVSS – AVSSA,
CVSS – AVSSB, AVSSA – AVSSB
±0.1
V
TOPR
−40 to 85
°C
Supply voltage range
Supply voltage differential
Operating temperature range
Note: DVDD, CVDD, AVDDA, AVDDB are connected on the LSI substrate, and so the same potential should be applied to these inputs.
DC Electrical Characteristics
Recommended operating conditions apply unless otherwise noted.
Rating
Parameter
Symbol
Condition
Unit
min
typ
max
fCKI = 22.5792 MHz
–
13
18
mA
fCKI = 45.1584 MHz
–
25
32
mA
DVDD, CVDD, AVDDA, AVDDB
current consumption1
IDD
CKI HIGH-level input voltage
VIHC
0.7 × DVDD
–
–
V
CKI LOW-level input voltage
VILC
–
–
0.3 × DVDD
V
CKI input voltage
VINAC
1.0
–
–
Vp-p
AC coupling
HIGH-level input voltage2
VIH
2.4
–
–
V
LOW-level input voltage2
VIL
–
–
0.5
V
HIGH-level output voltage3
VOH
IOH = −1 mA
DVDD − 0.4
–
–
V
LOW-level output voltage3
VOL
IOL = 1 mA
–
–
0.4
V
CKI HIGH-level input current
IIHC
VIN = DVDD
20
60
120
µA
CKI LOW-level input current
IILC
VIN = 0 V
20
60
120
µA
LOW-level input current2
IIL1
VIN = 0 V
–
9
18
µA
HIGH-level input leakage current2
IIH1
VIN = DVDD
–
–
1.0
µA
1. all outputs have no load. Input data is an NPC test pattern.
2. Pins TSTN, SDI, SBCKA, SBCKD, RSTN, DI, BCKI, WCKI, BCPOL, DSPOL, IMD0, IMD1.
3. Pin TO.
NIPPON PRECISION CIRCUITS INC.—4
SM5866AS
Switching Characteristics
System clock (CKI)
Operating conditions 1: VDD = 4.5 to 5.5V, TOPR = –40 to 85°C
Rating
Parameter
Symbol
Unit
min
typ
max
HIGH-level clock pulsewidth
tCWH
7
–
100
ns
LOW-level clock pulsewidth
tCWL
7
–
100
ns
Clock pulse cycle
tCKI
27
–
200
ns
Operating conditions 2: VDD = 4.75 to 5.25V, TOPR = –40 to 70°C
Rating
Parameter
Symbol
Unit
min
typ
max
HIGH-level clock pulsewidth
tCWH
7
–
100
ns
LOW-level clock pulsewidth
tCWL
7
–
100
ns
Clock pulse cycle
tCKI
22
–
200
ns
t CKI
VIHC
0.5∗DVDD
VILC
CKI
t CWL
t CWH
Reset input (RSTN)
Rating
Parameter
Symbol
Conditions
At power-ON
RSTN pulsewidth (active LOW)
tRSTN
After power-ON
Unit
min
typ
max
1
–
–
µs
100
–
–
ns
NIPPON PRECISION CIRCUITS INC.—5
SM5866AS
DSD normal input mode (SDI, SBCKA)
Rating
Parameter
Symbol
SBCKA frequency
Unit
min
typ
max
fSBA
–
2.8224
–
MHz
SBCKA HIGH-level pulsewidth
tSBAWH
40
–
–
ns
SBCKA LOW-level pulsewidth
tSBAWL
40
–
–
ns
SDI setup time
tSDS
10
–
–
ns
SDI hold time
tSDH
10
–
–
ns
SBCKA
(64fs)
1.5V
t SBAWH
t SBAWL
1/f SBA
SDI
1.5V
t SDS
t SDH
SBCKD = LOW
This figure applies when BCPOL = LOW (SBCKA rising edge read-in).
When BCPOL = HIGH, SBCKA has opposite phase.
DSD phase-modulated input mode (SDI, SBCKA, SBCKD)
Rating
Parameter
Symbol
SBCKA frequency
Unit
min
typ
max
fSBA
–
5.6448
–
MHz
SBCKA HIGH-level pulsewidth
tSBAWH
20
–
–
ns
SBCKA LOW-level pulsewidth
tSBAWL
20
–
–
ns
fSBD
–
2.8224
–
MHz
SBCKD HIGH-level pulsewidth
tSBDWH
40
–
–
ns
SBCKD LOW-level pulsewidth
tSBDWL
40
–
–
ns
SDI setup time
tSDS
10
–
–
ns
SDI hold time
tSDH
10
–
–
ns
SBCKA rising edge → SBCKD falling edge
tSAD
− 20
–
20
ns
SBCKD frequency
t SBCWH
t SBCWL
1/f SBA
SBCKA
(128fs)
1.5V
t SBDWL
t SBDWH
1/f SBD
t SAD
SBCKD
(64fs)
1.5V
t SDS
SDI
t SDH
D1
D1
D2
D2
D3 1.5V
BCPOL = LOW
NIPPON PRECISION CIRCUITS INC.—6
SM5866AS
PCM mode data input (DI, BCKI, WCKI)
Rating
Parameter
Symbol
Unit
min
typ
max
BCKI HIGH-level pulsewidth
tBCWH
7
–
–
ns
BCKI LOW-level pulsewidth
tBCWL
7
–
–
ns
BCKI pulse cycle
tBCY
22
–
–
ns
DI setup time
tDS
5
–
–
ns
DI hold time
tDH
5
–
–
ns
WCKI edge → first BCKI rising edge
tWB
10
–
–
ns
Last BCKI rising edge → WCKI edge
tBW
10
–
–
ns
BCKI
1.5V
t BCWH
t BCY
t BCWL
DI
1.5V
t DS
t DH
WCKI
1.5V
t WB
t BW
NIPPON PRECISION CIRCUITS INC.—7
SM5866AS
DSD Mode Analog Characteristics
Measurement Conditions
Op-amp
Supply voltage
: JRC NJM5534D
SM5866AS
: DVDD = CVDD = AVDDA = AVDDB = 5V,
DVSS = CVSS = AVSSA = AVSSB = 0V
NJM5534D
: ± 15V
Mode setting
: H-Mode (uses H-Filter)
Measurement temperature
: 25°C
Input data
: SUPER AUDIO CD DAC Test Disc (PHILIPS, 3122-783-00632)
System clock
: 22.5792MHz
Measurement equipment
: Audio Precision System Two (RMS mode)
Filter conditions
: THD + N
Measurement circuit
22Hz HPF, 20kHz LPF (FLP-A20K), Unweighted
D.R
22Hz HPF, 20kHz LPF (AES17), A-weighted (FIL-AWT)
S/N
22Hz HPF, 20kHz LPF (AES17), A-weighted (FIL-AWT)
: Refer to “Measurement circuit”.
Analog Characteristics
Rating
Parameter
Symbol
Conditions
Unit
min
typ
max
LSI output level1
Vout1
1 kHz, 0 dB
0.92
0.97
1.02
Vrms
Evaluation board output level
Vout2
1 kHz, 0 dB
–
5.7
–
Vrms
1 kHz, 0 dB
–
–109
(0.00036%)
–105
(0.00056%)
dB
1 kHz, –20 dB
–
–92
–88
dB
1 kHz, –60 dB
–
–52
–48
dB
0dB
Total harmonic distortion
–20dB
THD + N
–60dB
Dynamic range
D.R
1 kHz, −60 dB
111
115
–
dB
Signal-to-noise ratio
S/N
1 kHz, 0 dB/−∞
112
116
–
dB
1. Input stage I/V op-amp, U101 output level (when R101 = 0Ω)
NIPPON PRECISION CIRCUITS INC.—8
SM5866AS
PCM Mode Analog Characteristics
Measurement Conditions
Digital filter
: NPC SM5847AF
Op-amp
: JRC NJM5534D
Supply voltage
SM5866AS
: DVDD = CVDD = AVDDA = AVDDB = 5V,
DVSS = CVSS = AVSSA = AVSSB = 0V
SM5847AF
: + 3.3V
NJM5534D
: ± 15V
Mode settings
: D-Mode
Measurement temperature
: 25°C
Input data
: 44.1kHz sampling, 24-bit data, no dither
System clock
: 22.5792MHz (512fs), 64fs operation
Measurement equipment
: Audio Precision System Two (RMS mode)
Filter conditions
: THD + N
Measurement circuit
22Hz HPF, 20kHz LPF (FLP-A20K) Unweighted
D.R
22Hz HPF, 22kHz LPF, A-weight (FIL-AWT)
S/N
22Hz HPF, 22kHz LPF, A-weight (FIL-AWT)
: Refer to “Measurement circuit”.
Analog Characteristics
Rating
Parameter
Symbol
Conditions
Unit
min
typ
max
LSI output level1
Vout1
1 kHz, 0 dB
1.23
1.28
1.33
Vrms
Evaluation board output level
Vout2
1 kHz, 0 dB
–
5.7
–
Vrms
THD + N
1 kHz, 0 dB
–
0.0005
(–106dB)
0.0010
(–100dB)
%
Total harmonic distortion
Dynamic range
D.R
1 kHz, −60 dB
106
112
–
dB
Signal-to-noise ratio
S/N
1 kHz, 0 dB/−∞
117
120
–
dB
1. Input stage I/V op-amp, U101 output level (when R101 = 0Ω)
NIPPON PRECISION CIRCUITS INC.—9
+
AVSS
C112
100µ
AVDD
C103
0.1µ
+
AVSS
C102
0.1µ
14
13
12
11
10
9
8
7
6
5
4
3
2
1
IOUTA
RA
AVSSA
IMD0
IMD1
CKI
CVSS
AVSSB
IOUTBN
IOUTB
RB
AVDDB
AVDDA
IC1
SM5866AS
CVDD
DSPOL
BCPOL
DVSS
WCKI
BCKI
DI
RSTN
SBCKD IOUTAN
SBCKA
SDI
DVDD
TO
TSTN
AVSS
15
16
17
18
19
20
21
22
23
24
25
26
27
28
SW1
R102
8.2k
AVSS
R104
6.8k
C122
100p
C126
10µ
AVSS
C127
10µ
AVSS
6
U102
NJM5534D
C107
0.1µ
4 18
VEE
3
2
C106
0.1µ
75
VCC
AVSS
C101
0.1µ
C125
10µ
AVSS
C105
0.1µ
VEE
C111
470µ
AVDD
C124
10µ
C104
0.1µ
75
AVSS
2
6
3
U101
NJM5534D
4 18
+
R103
6.8k
AVDD
AVSS
AVSS
C121
100p
+
CKI
WCKI
BCKI
DI
RSTN
SBCKA
SDI
C113
100µ
AVDD
PCM
R101
8.2k
+
DSD
VCC
+
+
AVSS
DSD
R109
2.0k
R106
1.5k
R105
1.5k
DSD
R107
2.0k
SW3
PCM
R110
1.5k
SW2
PCM
R108
1.5k
C124
220p
AVSS
C118
10µ
VEE
AVSS
C109
0.1µ
C119
10µ
C108
0.1µ
75
AVSS
2
6
3
U103
NJM5534D
4 18
C123
220p
VCC
+
+
AVDD
SW4
DSD
PCM
Cutoff=28kHz
Analog Filter
for DSD
SW5
C125 R111
47µ 470
AVSS
J1
BNC
SM5866AS
Measurement circuit
NIPPON PRECISION CIRCUITS INC.—10
SM5866AS
FUNCTIONAL DESCRIPTION
Analog Pins
Current output pins (IOUTA, IOUTAN, IOUTB, IOUTBN)
The SM5866AS generates current output A differential outputs, formed by input data in-phase signal processed
by noise shaper A and then 23-level D/A conversion, and current output B differential outputs, formed by input
data inverse-phase signal processed by noise shaper B and then 23-level D/A conversion. A and B differential
outputs each have a in-phase output and inverse-phase output: A in-phase output on IOUTA, A inverse-phase
output on IOUTAN, B in-phase output on IOUTB, and B inverse-phase output on IOUTBN.
Using external circuits, outputs IOUTA and IOUTAN are added and I/V converted, and IOUTB and IOUTBN
are added and I/V converted. Then, the converted signals are input to an op-amp stage to obtain the final output
analog signal.
Feedback resistor connection pins (RA, RB)
There are internal built-in resistors connected between IOUTA and RA and between IOUTB and RB, which
can be used as op-amp feedback resistors. These resistors have a resistance of approximately 6.8kΩ. An external resistor can be connected to the internal resistor, in serial or parallel, in order to adjust the analog output
level. Note, however, that the internal resistance can vary by as much as ± 20% between individual LSI devices,
and thus the output level may change with the difference in the ratio of internal resistance to external resistance.
In-phase
output A
Noise shaper A
Data input
RA
IOUTA
23 Level
DEM DAC
IOUTAN
Inverse-phase
output A
In-phase
output B
Noise shaper B
RB
IOUTB
23 Level
DEM DAC
IOUTBN
Inverse-phase
output B
Figure 1. Analog outputs
Input Mode Settings (IMD0, IMD1)
IMD0 and IMD1 pin settings switch between the DSD and PCM operating modes. In DSD mode, the DSD signal high-frequency components can be removed using one of DSD filters (H-Filter and G-Filter), or the signal
can be left unfiltered.
Table 1. Input mode setting
IMD0
IMD1
Mode name
Input format
DSD FIR filter
H
H
H
1bit, 64fs, DSD
H-Filter
H
L
G
1bit, 64fs, DSD
G-Filter
L
H
A
1bit, 64fs, DSD
None
L
L
D
24bit, 8fs, PCM
None
NIPPON PRECISION CIRCUITS INC.—11
SM5866AS
DSD Filter Characteristics
H-Filter frequency response
0
-20
-40
Gain (dB)
-60
-80
-100
-120
-140
H-Filter
H-Filter + I/V
-160
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
Frequency (MHz)
Figure 2. SM5866AS H-Filter + I/V Halfband Characteristics
0
-1
Gain (dB)
-2
-3
-4
-5
-6
H-Filter
H-Filter + I/V
-7
0
20
40
60
80
100
120
Frequency (kHz)
Figure 3. SM5866AS H-Filter + I/V Passband Characteristics
NIPPON PRECISION CIRCUITS INC.—12
SM5866AS
G-Filter frequency response
0
-20
-40
Gain (dB)
-60
-80
-100
-120
-140
G-Filter
G-Filter + I/V
-160
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
Frequency (MHz)
Figure 4. SM5866AS G-Filter + I/V Halfband Characteristics
0
-1
-2
Gain (dB)
-3
-4
-5
-6
-7
G-Filter
G-Filter + I/V
-8
0
20
40
60
80
100
120
140
Frequency (KHz)
Figure 5. SM5866AS G-Filter + I/V Passband Characteristics
NIPPON PRECISION CIRCUITS INC.—13
SM5866AS
DSD Mode Data Input Pins (SDI, SBCKA, SBCKD)
In DSD mode, the following 2 data input formats are supported.
(1) Normal input format (refer to “DSD normal input mode”)
A 64fs clock is input on SBCKA, and 64fs rate DSD data in sync with the clock is input on SDI. SBCKD
is tied LOW.
(2) Phase-modulated format (refer to “DSD phase-modulated input mode”)
A 128fs clock is input on SBCKA, a 64fs clock is input on SBCKD, and 128fs rate phase-modulated DSD
data in sync with both clocks is input on SDI.
The DSD data phase modulation depends on the clock interval. When the 64fs rate DSD data is “1”, SDI =
HIGH if SKCKD = LOW or SDI = LOW if SBCKD = HIGH. When the DSD data is “0”, SDI = LOW if
SKCKD = LOW or SDI = HIGH if SBCKD = HIGH.
DSD Mode Bit Clock Polarity Select (BCPOL)
When BCPOL = LOW, data on SDI is read in on the rising edge of SBCKA. When BCPOL = HIGH, data on
SDI is read in on the falling edge of SBCKA.
DSD Mode Analog Output Polarity Select (DSPOL)
When DSPOL = HIGH, the analog output has in-phase polarity relative to the SDI input data. When DSPOL =
LOW, the analog output has inverse-phase polarity relative to the SDI input data.
PCM Mode Data Inputs (DI, BCKI, WCKI)
■
Input data format
Data is in MSB-first, 24-bit serial, 2s-complement format.
■
Jitter-free function
The SM5866AS reads serial input data on DI into the first-stage register in sync with the word clock on
WCKI, while processed data is read into the last-stage register in sync with a clock derived by frequency
division of the system clock. The word clock and the system clock continually undergo phase comparison
and if a phase difference is detected, the system clock timing is corrected. Accordingly, if large jitter occurs
in the word clock or the data sampling rate between input/output varies, the internal computational operation
is not affected.
System Reset (RSTN)
The SM5866AS must be reset under the following conditions:
■
At power-ON
■
When the CKI system clock stops or other similar occurrences
A reset occurs when RSTN goes LOW.
NIPPON PRECISION CIRCUITS INC.—14
SM5866AS
PCM Mode Theoretical Quantization Noise
During PCM operation (D-Mode), residual quantization noise in the audio signal band to the high-frequency
band, caused by the operation of the 3rd-order 23-level quantizer noise shaper, is greatly reduced. Figure 6
shows the theoretical quantization noise component for 16fs to 96fs operation.
0
10
0 dB sine wave equivalent white noise level
20
16fs
30
24fs
40
16-bit, fs quantization noise level
Quantization noise (dB)
50
32fs
70
48fs
64fs
80
96fs
60
90
100
110
120
130
20-bit, fs quantization noise level
140
150
24-bit, fs quantization noise level
160
170
180
0
0.5
1
1.5
2
2.5
3
3.5
4
Frequency (fs)
Figure 6. Quantization noise level
PCM Mode Oversampling Operation
The SM5866AS receives signal output from either a 8-times or 4-times oversampling digital filter. Internally,
this data is further oversampled up to the noise shaper operating rate. The internal oversampling ratio is determined automatically by the system clock frequency and the input sampling frequency. This internal oversampling ratio must be an integer, and therefore must satisfy the conditions shown in table 2.
Table 2. Internal oversampling conditions
fWCKI and fCKI conditions1
f CKI = f WCKI × 8 × n
where n = 1, 2, 3, ...
Noise shaper operating frequency
f CKI
f ns = f WCKI × n = ---------8
1. fWCKI = word clock frequency, fCKI = input system clock frequency, n = internal oversampling ratio
NIPPON PRECISION CIRCUITS INC.—15
SM5866AS
PCM Mode System Clock Frequency Example
With the circuit structure shown in figure 7, the oversampling rate for various sampling frequencies is given in
table 3.
fs
fWCKI
Interpolating filter
8 or 4-times
SM5866AS
fCKI
Figure 7. Circuit structure
Table 3. System clock frequency table
fs
fCKI
system clock frequency
Noise shaper
operating rate
Internal ratio (8fs input)
Internal ratio (4fs input)
16kHz
6.144MHz (384fs)
48fs
6
12
16kHz
8.192MHz (512fs)
64fs
8
16
16kHz
12.288MHz (768fs)
96fs
12
24
32kHz
6.144MHz (192fs)
24fs
3
6
32kHz
8.192MHz (256fs)
32fs
4
8
32kHz
12.288MHz (384fs)
48fs
6
12
32kHz
16.384MHz (512fs)
64fs
8
16
32kHz
24.576MHz (768fs)
96fs
12
24
44.1kHz
8.4672MHz (192fs)
24fs
3
6
44.1kHz
11.2896MHz (256fs)
32fs
4
8
44.1kHz
16.9344MHz (384fs)
48fs
6
12
44.1kHz
22.5792MHz (512fs)
64fs
8
16
44.1kHz
33.8688MHz (768fs)
96fs
12
24
48kHz
9.216MHz (192fs)
24fs
3
6
48kHz
12.288MHz (256fs)
32fs
4
8
48kHz
18.432MHz (384fs)
48fs
6
12
48kHz
24.576MHz (512fs)
64fs
8
16
48kHz
36.864MHz (768fs)
96fs
12
24
88.2kHz
16.9344MHz (192fs)
24fs
3
6
88.2kHz
22.5792MHz (256fs)
32fs
4
8
88.2kHz
33.8688MHz (384fs)
48fs
6
12
88.2kHz
45.1584MHz (512fs)
64fs
8
16
96kHz
18.432MHz (192fs)
24fs
3
6
96kHz
24.576MHz (256fs)
32fs
4
8
96kHz
36.864MHz (384fs)
48fs
6
12
176.4kHz
33.8688MHz (192fs)
24fs
3
6
176.4kHz
45.1584MHz (256fs)
32fs
4
8
192kHz
36.864MHz (192fs)
24fs
3
6
NIPPON PRECISION CIRCUITS INC.—16
SM5866AS
PCM MODE INPUT TIMING EXAMPLE
PCM mode input data in 24-bit word length, MSB-first, right-justified format
1 / 8fs
WCKI
CKI
BCKI
LSB
MSB
DI
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
Figure 8. 192fs system clock input
1 / 8fs
WCKI
CKI
BCKI
(1) *
LSB
MSB
DI
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
BCKI
(2)
LSB
MSB
DI
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
Figure 9. 256fs system clock input
*: When the input data fits within the word clock cycle, the input data position (left/right) can be changed.
NIPPON PRECISION CIRCUITS INC.—17
SM5866AS
1 / 8fs
WCKI
CKI
BCKI
LSB
MSB
DI
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
Figure 10. 384fs system clock input
1 / 8fs
WCKI
CKI
BCKI
(1)*
LSB
MSB
DI
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
BCKI
(2)
LSB
MSB
DI
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
Figure 11. 512fs system clock input
*: When the input data fits within the word clock cycle, the input data position (left/right) can be changed.
NIPPON PRECISION CIRCUITS INC.—18
SM5866AS
TYPICAL CIRCUIT DIAGRAM
DSD Mode Input Interface Connection Example
MCKI
BSAL
BSAR
SONY
CXD2751Q BCKA
BCKD
SACD Signal Pocessor
CKI
SDI
SBCKA
SBCKD
SM5866AS
CKI
SDI
SBCKA
SBCKD
SM5866AS
Figure 12. DSD Mode input interface connection example
PCM Mode Input Interface Connection Example
XTI
DOL
DOR
SM5847AF WCKO
BCKO
8fs Digital Filter
CKI
DI
WCKI
BCKI
SM5866AS
CKI
DI
WCKI
BCKI
SM5866AS
Figure 13. PCM Mode input interface connection example
NIPPON PRECISION CIRCUITS INC.—19
SM5866AS
Analog Output Connection Example
RA
23 level
DEM DAC
23 level
DEM DAC
IOUTA
IOUTAN
SM5866AS
RB
23 level
DEM DAC
23 level
DEM DAC
IOUTB
IOUTBN
Figure 14. Connection example 1
RA
23 level
DEM DAC
23 level
DEM DAC
IOUTA
IOUTAN
SM5866AS
RB
23 level
DEM DAC
23 level
DEM DAC
IOUTB
IOUTBN
Figure 15. Connection example 2
Note:
The connection examples are connections for formats described earlier, with no specific guaranteed output analog characteristics.
NPC does not accept responsibility for any patent issues relating to usage of application circuits published in this document.
NIPPON PRECISION CIRCUITS INC.—20
SM5866AS
DYNAMICS CHARACTERISTICS
DSD mode (H-Mode) Dynamics Characteristics (Under Measurement Condition in page 8)
+0
+0
-10
-10
-20
-20
-30
-30
-40
-40
-50
-50
-60
-60
d
B
r
-70
-80
d
B
r
A
-90
A
-70
-80
-90
-100
-100
-110
-110
-120
-120
-130
-130
-140
-140
-150
-150
-160
-160
2k
4k
6k
8k
10k
12k
14k
16k
18k
5k
20k
10k
15k
20k
25k
30k
35k
40k
45k
50k
55k
60k
65k
70k
75k
80k
85k
90k
95k 100k
Hz
Hz
Figure 16. 0dB input FFT
(with 1kHz notch filter 32768 pts. 8 average)
Figure 17. 0dB input FFT
(with 1kHz notch filter 32768 pts. 8 average)
+0
-80
-10
-20
-85
-30
-40
-90
-50
-60
d
B
r
A
-95
-70
d
-100
B
-80
-90
-100
-105
-110
-120
-110
-130
-140
-115
-150
-160
2k
4k
6k
8k
10k
12k
14k
16k
18k
-120
0.01
20k
Hz
Figure 18. −60dB input FFT (32768 pts. 8 average)
0.1
1
kHz
10
100
Figure 19. THD + N vs. frequency
1
0
-10
-20
0.1
-30
-40
%
0.01
d
B
r
-50
A
-70
-60
-80
-90
0.001
-100
-110
0.0001
-60
-120
-120
-50
-40
-30
-20
-10
0
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
dBFS
dBFS
Figure 20. THD + N (%) vs. amplitude
Figure 21. Linearity
Note. Input data: SUPER AUDIO CD DAC Test Disc (PHILIPS, 3122-783-00632)
NIPPON PRECISION CIRCUITS INC.—21
SM5866AS
PCM mode (D-Mode) Dynamics Characteristics (Under Measurement Condition in page 9)
+0
+0
-10
-10
-20
-20
-30
-30
-40
-40
-50
-50
-60
-60
d -70
B
r -80
d -70
B
-80
r
-90
A
-100
A -90
-100
-110
-110
-120
-120
-130
-130
-140
-140
-150
-150
-160
2k
4k
6k
8k
10k
Hz
12k
14k
16k
18k
-160
20k
Figure 22. 0dB input FFT
(with 1kHz notch filter 32768 pts. 8 average)
10k
20k
30k
40k
50k
Hz
60k
70k
80k
90k
100k
Figure 23. 0dB input FFT
(with 1kHz notch filter 32768 pts. 8 average)
-80
+0
-82
-10
-84
-86
-20
-88
-30
-90
-40
-92
-50
-94
-60
-96
d -70
B
r -80
-98
d -100
B
-102
A -90
-104
-100
-106
-110
-108
-120
-110
-130
-112
-140
-114
-150
-116
-160
2k
4k
6k
8k
10k
Hz
12k
14k
16k
18k
-118
20k
-120
10
Figure 24. −60dB input FFT (32768 pts. 8 average)
20
50
100
200
500
Hz
1k
2k
5k
10k
20k
Figure 25. THD + N vs. frequency
1
-70
0.5
-72.5
-75
0.2
-77.5
-80
0.1
-82.5
-85
0.05
-87.5
-90
0.02
%
0.01
d
B
r
0.005
A
-92.5
-95
-97.5
-100
-102.5
0.002
-105
-107.5
0.001
-110
-112.5
0.0005
-115
-117.5
0.0002
-120
-120
0.0001
-60
-55
-50
-45
-40
-35
-30
-25
-20
-15
-10
-5
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
dBFS
+0
dBFS
Figure 26. THD + N (%) vs. amplitude
Figure 27. THD + N (dB) vs. amplitude
+0
+1
-10
+0.9
-20
+0.8
+0.7
-30
+0.6
+0.5
-40
+0.4
-50
+0.3
+0.2
d
+0.1
B
+0
r
-0.1
A
-0.2
d -60
B
r -70
A -80
-0.3
-90
-0.4
-100
-0.5
-0.6
-110
-0.7
-120
-0.8
-0.9
-130
-1
10
-140
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
20
50
100
200
500
Hz
1k
2k
5k
10k
20k
dBFS
Figure 28. Linearity
Figure 29. Frequency response
NIPPON PRECISION CIRCUITS INC.—22
SM5866AS
NIPPON PRECISION CIRCUITS INC. reserves the right to make changes to the products described in this data sheet in order to
improve the design or performance and to supply the best possible products. Nippon Precision Circuits Inc. assumes no responsibility for
the use of any circuits shown in this data sheet, conveys no license under any patent or other rights, and makes no claim that the circuits
are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Nippon Precision
Circuits Inc. makes no claim or warranty that such applications will be suitable for the use specified without further testing or modification.
The products described in this data sheet are not intended to use for the apparatus which influence human lives due to the failure or
malfunction of the products. Customers are requested to comply with applicable laws and regulations in effect now and hereinafter,
including compliance with export controls on the distribution or dissemination of the products. Customers shall not export, directly or
indirectly, any products without first obtaining required licenses and approvals from appropriate government agencies.
NIPPON PRECISION CIRCUITS INC.
4-3, Fukuzumi 2-chome, Koto-ku,
Tokyo 135-8430, Japan
Telephone: +81-3-3642-6661
Facsimile: +81-3-3642-6698
http://www.npc.co.jp/
Email: [email protected]
NC0017AE 2001.05
NIPPON PRECISION CIRCUITS INC.—23