Order this document by MC1377/D COLOR TELEVISION RGB to PAL/NTSC ENCODER The MC1377 will generate a composite video from baseband red, green, blue, and sync inputs. On board features include: a color subcarrier oscillator; voltage controlled 90° phase shifter; two double sideband suppressed carrier (DSBSC) chroma modulators; and RGB input matrices with blanking level clamps. Such features permit system design with few external components and accordingly, system performance comparable to studio equipment with external components common in receiver systems. • Self–contained or Externally Driven Reference Oscillator • • • SEMICONDUCTOR TECHNICAL DATA Chroma Axes, Nominally 90° (±5°), are Optionally Trimable P SUFFIX PLASTIC PACKAGE CASE 738 PAL/NTSC Compatible Internal 8.2 V Regulator 20 1 DW SUFFIX PLASTIC PACKAGE CASE 751D (SO–20L) 20 1 ORDERING INFORMATION Operating Temperature Range Device MC1377DW TA = 0° to +70°C MC1377P Package SO–20L Plastic DIP Figure 1. Representative Block Diagram Quad Decoup 19 Oscout VCC 14 VB 16 18 17 Oscin Oscillator Buffer Voltage Controlled 90° 90° H/2 20 NTSC/PAL Select PAL/NTSC Control Burst Pulse Driver Gnd 15 1 Trise Chroma Amp R–Y Dual Comparator B–Y B–Y B–Y Clamp 11 R–Y Clamp 12 3 R 4 G Chroma Out Chroma In B–Y Clamp R–Y Clamp –Y Color Difference and Luminance Matrix Output Amp/ Clamp 2 Composite Sync Input 13 10 0° R–Y Latching Ramp Generator PAL Switch 0/180° 8.2V Regulator 5 B 6 –Yout 9 Composite Video Output Video Clamp 7 8 –Yin Inputs Motorola, Inc. 1995 MOTOROLA ANALOG IC DEVICE DATA 1 MC1377 MAXIMUM OPERATING CONDITIONS Rating Symbol Value Unit Supply Voltage VCC 15 Vdc Storage Temperature Tstg –65 to +150 °C Power Dissipation Package Derate above 25°C PD 1.25 10 W mW/°C Operating Temperature TA 0 to +70 °C RECOMMENDED OPERATING CONDITIONS Min Typ Max Unit Supply Voltage Characteristics 10 12 14 Vdc IB Current (Pin 16) 0 – –10 mA Sync, Blanking Level (DC level between pulses, see Figure 9e) Sync Tip Level (see Figure 9e) Sync Pulse Width (see Figure 9e) 1.7 –0.5 2.5 – 0 – 8.2 0.9 5.2 Vdc R, G, B Input (Amplitude) R, G, B Peak Levels for DC Coupled Inputs, with Respect to Ground – 2.2 1.0 – – 4.4 Vpp V Chrominance Bandwidth (Non–comb Filtered Applications), (6 dB) 0.5 1.5 2.0 MHz Ext. Subscarrier Input (to Pin 17) if On–Chip Oscillator is not used. 0.5 0.7 1.0 Vpp µs ELECTRICAL CHARACTERISTICS (VCC = 12 Vdc, TA = 25°C, circuit of Figure 7, unless otherwise noted.) Pins Symbol Min Typ Max Unit 14 ICC – – 20 – – 33 34 35 36 37 – – 40 – – mA 16 VB Regload Regline 7.7 –20 – 8.2 120 4.5 8.7 +30 – Vdc mV mV/V Oscillator Amplitude with 3.58 MHz/4.43 MHz crystal 17 Osc – 0.6 – Vpp Subcarrier Input: Resistance at 3.58 MHz Subcarrier Input: Resistance at 4.43 MHz 17 Rosc – – 5.0 4.0 – – kΩ Cosc – 2.0 – pF – 19 19 ∅m ∆∅m V19 – – – ±5 0.25 6.4 – – – Deg Deg/µA Vdc 10 Vin – – 4.0 0.7 – – Vdc Vpp Rin Cin – – 10 2.0 – – kΩ pF Vout 8.9 – 10 1.0 10.9 – Vdc Vpp Rout – 50 – Ω BWLuma – 8.0 – MHz Characteristics SUPPLY CURRENT Supply Current into VCC, No Load, on Pin 9. Circuit Figure 7 VCC = 10 V VCC = 11 V VCC = 12 V VCC = 13 V VCC = 14 V VOLTAGE REGULATOR VB Voltage (IB = –10 mA, VCC = 12 V, Figure 7) Load Regulation (0 < IB ≤ 10 mA, VCC = 12 V) Line Regulation (IB = 0 mA, 10 V < VCC < 14 V) ≤ OSCILLATOR AND MODULATION Capacitance Modulation Angle (R–Y) to (B–Y) Angle Adjustment (R–Y) DC Bias Voltage CHROMINANCE AND LUMINANCE Chroma Input DC Level Chroma Input Level for 100% Saturation Chroma Input: Resistance Chroma Input: Capacitance Chroma DC Output Level Chroma Output Level at 100% Saturation 13 Chroma Output Resistance Luminance Bandwidth (–3.0 dB), Less Delay Line 2 9 MOTOROLA ANALOG IC DEVICE DATA MC1377 ELECTRICAL CHARACTERISTICS (VCC = 12 Vdc, TA = 25°C, circuit of Figure 7, unless otherwise noted.) Characteristics Pins Symbol Min Typ Max Unit 3, 4, 5 RGB 2.8 3.3 3.8 Vdc – 1.0 – Vpp RRGB CRGB 8.0 – 10 2.0 17 – kΩ pF 2 Sync – 10 – kΩ 9 CVout – – – – 0.6 1.4 1.7 0.6 – – – – Vpp Rvideo – 50 – Ω Vlk – 20 – mVpp VIDEO INPUT R, G, B Input DC Levels R, G, B Input for 100% Color Saturation R, G, B Input: Resistance R, G, B Input: Capacitance Sync Input Resistance (1.7 V < Input < 8.2) COMPOSITE VIDEO OUTPUT Sync Luminance Chroma Burst Composite Output, 100% Saturation (see Figure 8d) Output Impedance (Note 1) Subcarrier Leakage in Output (Note 2) NOTES: 1. Output Impedance can be reduced to less than 10 Ω by using a 150 Ω output load from Pin 9 to ground. Power supply current will increase to about 60 mA. 2. Subcarrier leakage can be reduced to less than 10 mV with optional circuitry (see Figure 12). PIN FUNCTION DESCRIPTIONS Symbol Pin Description tr 1 External components at this pin set the rise time of the internal ramp function generator (see Figure 10). Sync 2 Composite sync input. Presents 10 kΩ resistance to input. R 3 Red signal input. Presents 10 kΩ impedance to input. 1.0 Vpp required for 100% saturation. G 4 Green signal input. Presents 10 kΩ impedance to input. 1.0 Vpp required for 100% saturation. B 5 Blue signal Input. Presents 10 kΩ impedance to input. 1.0 Vpp required for 100% saturation. –Yout 6 Luma (–Y) output. Allows external setting of luma delay time. Vclamp 7 Video Clamp pin. Typical connection is a 0.01 µF capacitor to ground. –Yin 8 Luma (–Y) input. Presents 10 kΩ input impedance. CVout 9 Composite Video output. 50 Ω output impedance. ChromaIn 10 Chroma input. Presents 10 kΩ input impedance. B–Yclamp 11 B–Y clamp. Clamps B–Y during blanking with a 0.1 µF capacitor to ground. Also used with R–Y clamp to null residual color subcarrier in output. R–Yclamp 12 R–Y clamp. Clamps R–Y during blanking with a 0.1 µF capacitor to ground. Also used with B–Y clamp to null residual color subcarrier in output. ChromaOut 13 Chroma output. 50 Ω output impedance. VCC 14 Power supply pin for the IC; +12, ± 2.0 V, required at 35 mA (typical). Gnd 15 Ground pin. VB 16 8.2 V reference from an internal regulator capable of delivering 10 mA to external circuitry. Oscin 17 Oscillator input. A transistor base presents 5.0 kΩ to an external subcarrier input, or is available for constructing a Colpitts oscillator (see Figure 4). Oscout 18 Oscillator output. The emitter of the transistor, with base access at Pin 17, is accessible for completing the Colpitts oscillator. See Figure 4. ∅m 19 Quad decoupler. With external circuitry, R–Y to B–Y relative angle errors can be corrected. Typically, requires a 0.01 µF capacitor to ground. NTSC/PAL Select 20 NTSC/PAL switch. When grounded, the MC1377 is in the NTSC mode; if unconnected, in the PAL mode. MOTOROLA ANALOG IC DEVICE DATA 3 MC1377 FUNCTIONAL DESCRIPTION Figure 2. Power Supply and VB 0.1 Power Supply and VB (8.2 V Regulator) The MC1377 pin for power supply connection is Pin 14. From the supply voltage applied to this pin, the IC biases internal output stages and is used to power the 8.2 V internal regulator (VB at Pin 16) which biases the majority of internal circuitry. The regulator will provide a nominal 8.2 V and is capable of 10 mA before degradation of performance. An equivalent circuit of the supply and regulator is shown in Figure 2. VCC = +12V 14 16 100 8.2V Regulator R, G, B Inputs 9 The RGB inputs are internally biased to 3.3 V and provide 10 kΩ of input impedance. Figure 3 shows representative input circuitry at Pins 3, 4, and 5. The input coupling capacitors of 15 µF are used to prevent tilt during the 50/60 Hz vertical period. However, if it is desired to avoid the use of the capacitors, then inputs to Pins 3, 4, and 5 can be dc coupled provided that the signal levels are always between 2.2 V and 4.4 V. After input, the separate RGB information is introduced to the matrix circuitry which outputs the R–Y, B–Y, and –Y signals. The –Y information is routed out at Pin 6 to an external delay line (typically 400 ns). 32mA 15 Figure 3. RGB Input Circuitry R–Y B–Y –Y RGB Matrix DSBSC Modulators and 3.58 MHz Oscillator 3 27k 27k 27k 18k 18k 18k 4 15µF 5 15µF G R 6 15µF –Y B Figure 4. Chroma Section Chroma Out 13 Oscillator 17 Quad Decoup 18 19 Amp/ Buffer PAL Switch 0/180° ∆ Θ NTSC +90° PAL PAL/NTSC Control B–Y R–Y B–Y R–Y Burst Flag NTSC 4 PAL The R–Y and B–Y outputs (see (B–Y)/(R–Y) Axes versus I/Q Axes, Figure 22) from the matrix circuitry are amplitude modulated onto the 3.58/4.43 MHz subcarrier. These signals are added and color burst is included to produce composite chroma available at Pin 13. These functions plus others, depending on whether NTSC or PAL operation is chosen, are performed in the chroma section. Figure 4 shows a block diagram of the chroma section. The MC1377 has two double balanced mixers, and regardless of which mode is chosen (NTSC or PAL), the mixers always perform the same operation. The B–Y mixer modulates the color subcarrier directly, the R–Y mixer receives a 90° phase shifted color subcarrier before being modulated by the R–Y baseband information. Additional operations are then performed on these two signals to make them NTSC or PAL compatible. In the NTSC mode, the NTSC/PAL control circuitry allows an inverted burst of 3.58 MHz to be added only to the B–Y signal. A gating pulse or “burst flag” from the timing section permits color burst to be added to the B–Y signal. This color burst is 180° from the B–Y signal and 90° away from the R–Y signal (see Figure 22) and permits decoding of the color information. These signals are then added and amplified before being output, at Pin 13, to be bandpassed and then reintroduced to the IC at Pin 10. In the PAL mode, NTSC/PAL control circuitry allows an inverted 4.43 MHz burst to be added to both R–Y and B–Y equally to produce the characteristic PAL 225°/135 burst phase. Also, the R–Y information is switched alternately from 180° to 0° of its original position and added to the B–Y information to be amplified and output. MOTOROLA ANALOG IC DEVICE DATA MC1377 Figure 5. Timing Circuitry Timing Circuitry The composite sync input at Pin 2 performs three important functions: it provides the timing (but not the amplitude) for the sync in the final output; it drives the black level clamps in the modulators and output amplifier; and it triggers the ramp generator at Pin 1, which produces burst envelope and PAL switching. A representative block diagram of the timing circuitry is shown in Figure 5. In order to produce a color burst, a burst envelope must be generated which “gates” a color subcarrier into the R–Y and B–Y modulators. This is done with the ramp generator at Pin 1. The ramp generator at Pin 1 is an R–C type in which the pin is held low until the arrival of the leading edge of sync. The rising ramp function, with time constant R–C, passes through two level sensors – the first one starts the gating pulse and the second stops it (see Figure 10). Since the “early” part of the exponential is used, the timing provided is relatively accurate from chip–to–chip and assembly–to–assembly. Fixed components are usually adequate. The ramp continues to rise for more than half of the line interval, thereby inhibiting burst generation on “half interval” pulses on vertical front and back porches. The ramp method will produce burst on the vertical front and back “porches” at full line intervals. H/2 PAL/ NTSC 20 Sync Input 2 Burst Pulse Driver PAL/NTSC Control Line Drive Burst Flag 10k VB Latching Ramp Generator R Dual Comparator 1 C Figure 6. R–Y, B–Y and Output Amplifier Clamps Chroma 10 B–Y 11 B–Y Clamp 0.1 R–Y R–Y, B–Y Clamps and Output Clamp/Amplifier 12 R–Y Clamp The sync signal, shown in the block diagram of Figure 6, drives the R–Y and B–Y clamps which clamp the R–Y and B–Y signals to reference black during the blanking periods. The output amplifier/clamp provides this same function plus combines and amplifies the chroma and luma components for composite video output. 0.1 9 Sync Output Amp/Clamp Composite Video 7 0.01 8 Application Circuit –Y Figure 7 illustrates the block diagram of the MC1377 and the external circuitry required for typical operation. Figure 7. Block Diagram and Application Circuit VCC 0.01 3.58/ 4.43* MHz 19 17 Voltage Controlled 90° Osc/ Buffer 220 18 220 PAL/NTS C Control 20 5.0 to 25pF NTSC/ PAL Select PAL Switch 0/180° B–Y B–Y Clamp B–Y Dual Comparator R–Y Clamp 0.001 mica 56k * Refers to the choice NTSC/PAL * (3.58 MHz/4.43 MHz). VB 2 + 3 15µF Composite Sync Input MOTOROLA ANALOG IC DEVICE DATA + 4 15µF R 13 220 100/ 62* 0.1 47/33* 3.3k 0.1 12 0.1 Output Amp/ Clamp + 5 15µF G 11 1000 9 Color Difference and Luminance Matrix –Y 1 Chroma Amp 10 R–Y Burst Pulse Driver Latching Ramp Gen TOKO 166NNF –10264AG 0° R–Y 15 16 0.1 8.2V Regulator 90° H/2 VB 14 –Y Composite Video Output 8 6 1.0k 1.0k B 7 0.01 400ns Y Delay R, G, B Inputs 5 MC1377 17 Osc In 18 Quad Decoup 19 Osc Out 14 +12V R4 2.0k T4 R8 220 T5 T6 R7 4.0k R9 220 T17 T15 R20 220 R18 220 T14 R5 470 R161 15k T16 + C2 18pF T11 R10 5.0k + T7 C1 T2 T24 R162 220 T3 T10 16 +8.2V Z1 15 R2 1.2k T28 T23 T8 R15 1.5k R6 5.1k 5pF R6A 5.1k T12 R16 1.0k R17 1.0k T25 T26 T27 5.0k R30 R21 220 T13 T9 T19 R23 1.5k R24 1.5k T20 T18 T1 R2A 1.0k Gnd R27 220 R3 6.8k R13 22k R11 22k R12 10k R14 22k T22 R9 22k R22 270 560 R25 PAL/NTSC 20 22k R28 10k R29 560 R26 R80A 4.0k R77 15k R71 22k T68 T73 T69 R76 15k R79 1.0k R83 10k R80 B 6.0k T74 T75 Z2 R78 15k R82 22k R81 22k R87 13.8k R86 10k R90 22k T76 T77 R88 30.4k R95 18k 22k T72 T79 R70 10k R73 22k R75 10k R74 10k T71 R105 7.5k R100 22k T91A T95 R106 9.1k 3 4 5 T206 R99 10k R113 27k R120 27k R121 27k R117 10k T99 T100 T101 R98 22k T108 R127 27k T110 T111 T109 T92 TRISE R118 10k R112 36k T98 1 R94 2.2k R107 820 R101 10k T90 R93 2.2k T107 T105 R110 1.0k T96 R102 1.0k R97 22k R92 2.2k R111 4.7k T97 T91B R96 22k R91 10k R85 10k 22k Comp Sync R72 22k R109 R69 T82 T80 10k 2 T81 T79 T78 T94 T93 R160 22k R104 2.0k R104 15k R108 2.7k R164 4.7k T102 T103 T104 R115 R116 18k 3.9k R119 5.3k R122 18k R123 3.9k R126 2.7k R–IN G–IN B–IN 6 MOTOROLA ANALOG IC DEVICE DATA R129 18k MC1377 Figure 8. Internal Schematic 13 Chroma Out R31 5.1k R36 1.0k R35 1.0k R66 2.4k R51 12k R67 220 T30 R31 5.1k T5 4 T31 T28 T32 T33 R55 220 R37 220 R21 220 22k R33 T39 R39 500 R40 2.0k T50 R53 500 T49 R47 1.0k T51 T52 T56 R48 500 B–Y T44 T60 T62 R64 500 R57 1.0k R62 2.0k R61 2.0k R50 220 T53 T57 R56 1.0k T55 T41 R41 2.0K T43 R54 220 T38 T42 R46 1.0k T40 PAL F/F PAL F/F 27k R34 T37 R–Y 10k R29 T36 Burst Flag T35 22k R28 R68 3.0k T34 5.0k R30 R27 220 Burst Flag T23 R65 220 T61 B–Y Clamp T63 T45 T64 T46 T65 R60 4.7k R47 4.7k T59 T47 T48 T58 T66 R38 10k R44 22k R43 10k R49 10k R45 300 R52 10k R58 300 R43A 10k R44A 22k R58 300 R63 10k R–Y Clamp R132 1.85k R135 220 R124 12.5 k T128 T110 T1 R123 3.9k R126 2.7k T115 R133 220 R137 1.5k T116 R134 220 T120 R153 220 T118 R156 220 T112 T119 T117 R125 12.5k 10 Composite Video Out 9 T121 Video Clamp R145 3.3k R163 10k 470 R140 470 R141 4.7k R138 T123 22k R155 20k R144 R151 9.1k T126 10k R142 15k R148 15k R152 R150 4.7k –Y In –Y Out MOTOROLA ANALOG IC DEVICE DATA 7 T124 R149 10k R143 22k T113 R131 14k T122 R139 40k R159 10k R129 R130 18k 3.9k Chroma In T127 T125 R127 27k R128 220 12 R154 100 R147 27k R157 22k R136 4.7k T114 R158 10k 11 7 8 6 MC1377 APPLICATION INFORMATION Figure 8. Signal Voltages (Circuit Values of Figure 7) (a) R, G, B Input Levels 4.4V Limits for DC Coupled Inputs 1.0Vpp 100% Green Input (Pin 4) 2.2V (b) 1.0Vpp 100% Red Input (Pin 3) 1.0Vpp 100% Blue Input (Pin 5) (c) The signal levels into Pins 3, 4, 5 should be 1.0 Vpp for fully saturated, standard composite video output levels as shown in Figure 9(d). The inputs require 1.0 Vpp since the internally generated sync pulse and color burst are at fixed and predetermined amplitudes. Further, it is essential that the portion of each input which occurs during the sync interval represent black for that input since that level will be clamped to reference black in the color modulators and output stage. This implies that a refinement, such as a difference between black and blanking levels, must be incorporated in the RGB input signals. If Y, R–Y, B–Y and burst flag components are available and the MC1377 is operating in NTSC, inputs may be as follows: the Y component can be coupled through a 15 pF capacitor to Pins 3, 4 and 5 tied together; the (–[R–Y]) component can be coupled to Pin 12 through a 0.1 µF capacitor, and the (–[B–Y]) and burst flag components can be coupled to Pin 11 in a similar manner. Sync Input (d) 5.0 4.0 Composite Output (Pin 9) 3.0 8.2 Max (e) 1.7 Min 0.9 Max Sync Input (Pin 2) 0 –0.5 Min (f) 10.5 10.0 Chroma Output (Pin 13) 9.5 (g) 4.35 4.0 Chroma Input (Pin 10) 3.65 (h) 5.2 Luminance Output (Pin 6) 4.3 (i) 2.6 2.1 8 Luminance Input (Pin 8) As shown in Figure 9(e), the sync input amplitude can be varied over a wide latitude, but will require bias pull–up from most sync sources. The important requirements are: 1) The voltage level between sync pulses must be between 1.7 V and 8.2 V, see Figure 9(e). 2) The voltage level for the sync tips must be between +0.9 V and – 0.5 V, to prevent substrate leakage in the IC, see Figure 9(e). 3) The width of the sync pulse should be no longer than 5.2 µs and no shorter than 2.5 µs. For PAL operation, correctly serrated vertical sync is necessary to properly trigger the PAL divider. In NTSC mode, simplified “block” vertical sync can be used but the loss of proper horizontal timing may cause “top hook” or “flag waving” in some monitors. An interesting note is that composite video can be used directly as a sync signal, provided that it meets the sync input criteria. Latching Ramp (Burst Flag) Generator The recommended application is to connect a close tolerance (5%) 0.001 µF capacitor from Pin 1 to ground and a resistor of 51 kΩ or 56 kΩ from Pin 1 to VB (Pin 16). This will produce a burst pulse of 2.5 µs to 3.5 µs in duration, as shown in Figure 10. As the ramp on Pin 1 rises toward the charging voltage of 8.2 V, it passes first through a burst “start threshold” at 1.0 V, then a “stop threshold” at 1.3 V, and finally a ramp reset threshold at 5.0 V. If the resistor is reduced to 43 kΩ, the ramp will rise more quickly, producing a narrower and earlier burst pulse (starting approx. 0.4 µs after sync and about 0.6 µs wide). The burst will be wider and later if the resistor is raised to 62 kΩ, but more importantly, the 5.0 V reset point may not be reached in one full line interval, resulting in loss of alternate burst pulses. As mentioned earlier, the ramp method does produce burst at full line intervals on the “vertical porches.” If this is not desired, and the MC1377 is operating in the NTSC mode, burst flag may be applied to Pin 1 provided that the tip of the pulse is between 1.0 Vdc and 1.3 Vdc. In PAL mode this method is not suitable, since the ramp isn’t available to drive the PAL flip–flop. Another means of inhibiting the burst pulse is to set Pin 1 either above 1.3 Vdc or below 1.0 Vdc for the duration that burst is not desired. MOTOROLA ANALOG IC DEVICE DATA MC1377 Color Reference Oscillator/Buffer As stated earlier in the general description, there is an on–board common collector Colpitts color reference oscillator with the transistor base at Pin 17 and the emitter at Pin 18. When used with a common low–cost TV crystal and capacitive divider, about 0.6 Vpp will be developed at Pin 17. The frequency adjustment can be done with a series 30 pF trimmer capacitor over a total range of about 1.0 kHz. Oscillator frequency should be adjusted for each unit, keeping in mind that most monitors and receivers can pull in 1200 Hz. If an external color reference is to be used exclusively, it must be continuous. The components on Pins 17 and 18 can be removed, and the external source capacitively coupled into Pin 17. The input at Pin 17 should be a sine wave with amplitude between 0.5 Vpp and 1.0 Vpp. Also, it is possible to do both; i.e., let the oscillator “free run” on its own crystal and override with an external source. An extra coupling capacitor of 50 pF from the external source to Pin 17 was adequate with the experimentation attempted. Voltage Controlled 90° The oscillator drives the (B–Y) modulator and a voltage controlled phase shifter which produces an oscillator phase of 90° ± 5° at the (R–Y) modulator. In most situations, the result of an error of 5° is very subtle to all but the most expert eye. However, if it is necessary to adjust the angle to better accuracy, the circuit shown in Figure 11 can be used. Pulling Pin 19 up will increase the (R–Y) to (B–Y) angle by about 0.25°/µA. Pulling Pin 19 down reduces the angle by the same sensitivity. The nominal Pin 19 voltage is about 6.3 V, so even though it is unregulated, the 12 V supply is best for good control. For effective adjustment, the simplest approach is to apply RGB color bar inputs and use a vectorscope. A simple bar generator giving R, G, and B outputs is shown in Figure 26. Figure 9. Ramp/Burst Gate Generator Pin 1 Ramp Voltage (Vdc) 5.0 1.3 1.0 Burst Stop Burst Start 0 Sync (Pin 2) 0 5.5 8.5 Residual Feedthrough Components As shown in Figure 9(d), the composite output at Pin 9 for fully saturated color bars is about 2.6 Vpp, output with full chroma on the largest bars (cyan and red) being 1.7 Vpp. The typical device, due to imperfections in gain, matrixing, and modulator balance, will exhibit about 20 mVpp residual color subcarrier in both white and black. Both residuals can be reduced to less than 10 mVpp for the more exacting applications. The subcarrier feedthrough in black is due primarily to imbalance in the modulators and can be nulled by sinking or sourcing small currents into clamp Pins 11 and 12 as shown in Figure 12. The nominal voltage on these pins is about 4.0 Vdc, so the 8.2 V regulator is capable of supplying a pull up source. Pulling Pin 11 down is in the 0° direction, pulling it up is towards 180°. Pulling Pin 12 down is in the 90° direction, pulling it up is towards 270 °. Any direction of correction may be required from part to part. White carrier imbalance at the output can only be corrected by juggling the relative levels of R, G, and B inputs MOTOROLA ANALOG IC DEVICE DATA Time (µs) 50 63.5 for perfect balance. Standard devices are tested to be within 5% of balance at full saturation. Black balance should be adjusted first, because it affects all levels of gray scale equally. There is also usually some residual baseband video at the chroma output (Pin 13), which is most easily observed by disabling the color oscillator. Typical devices show 0.4 Vpp of residual luminance for saturated color bar inputs. This is not a major problem since Pin 13 is always coupled to Pin 10 through a bandpass or a high pass filter, but it serves as a warning to pay proper attention to the coupling network. Figure 10. Adjusting Modulator Angle 12Vdc 19 220k 10k 0.01µF 9 MC1377 Figure 11. Nulling Residual Color in Black VB 12 470k 10k 11 10k Figure 14(a) shows the output of the MC1377 with low resolution RGB inputs. If no bandwidth reduction is employed then a monitor or receiver with frequency response shown in Figure 14(b), which is fairly typical of non–comb filtered monitors and receivers, will detect an incorrect luma sideband at X′. This will result in cross–talk in the form of chroma information in the luma channel. To avoid this situation, a simpler bandpass circuit as shown in Figure 15(a), can be used. 470k Figure 13. MC1377 Output with Low Resolution RGB Inputs VB Figure 12. Delay of Chroma Information X X 2.0 3.0 3.58 4.0 X Gain X Luminance 1.0 Chroma (a) Encoder Output with Low Resolution Inputs and No Bandpass Transformer X 10 X′ Gain The Chroma Coupling Circuits With the exception of S–VHS equipped monitors and receivers, it is generally true that most monitors and receivers have color IF 6.0 dB bandwidths limited to approximately ±0.5 MHz. It is therefore recommended that the encoder circuit should also limit the chroma bandwidth to approximately ±0.5 MHz through insertion of a bandpass circuit between Pin 13 and Pin 10. However, if S–VHS operation is desired, a coupling circuit which outputs the composite chroma directly for connection to a S–VHS terminal is given in the S–VHS application (see Figure 19). For proper color level in the video output, a ±0.5 MHz bandwidth and a midband insertion loss of 3.0 dB is desired. The bandpass circuit shown in Figure 7, using the TOKO fixed tuned transformer, couples Pin 10 to Pin 13 and gives this result. However, this circuit introduces about 350 ns of delay to the chroma information (see Figure 13). This must be accounted for in the luminance path. A 350 ns delay results in a visible displacement of the color and black and white information on the final display. The solution is to place a delay line in the luminance path from Pins 6 to 8, to realign the two components. A normal TV receiver delay line can be used. These delay lines are usually of 1.0 kΩ to 1.5 kΩ characteristic impedance, and the resistors at Pins 6 and 8 should be selected accordingly. A very compact, lumped constant delay line is available from TDK (see Figure 25 for specifications). Some types of delay lines have very low impedances (approx. 100 Ω) and should not be used, due to drive and power dissipation requirements. In the event of very low resolution RGB, the transformer and the delay line may be omitted from the circuit. Very low resolution for the MC1377 can be considered RGB information of less than 1.5 MHz. However, in this situation, a bandwidth reduction scheme is still recommended due to the response of most receivers. 5.0 1.0 2.0 3.0 3.58 4.0 5.0 (b) Standard Receiver Response A final option is shown in Figure 15(b). This circuit provides very little bandwidth reduction, but enough to remove the chroma to luma feedthrough, with essentially no delay. There is, however, about a 9 dB insertion loss from this network. It will be left to the designer to decide which, if any, compromises are acceptable. Color bars viewed on a good monitor can be used to judge acceptability of step luminance/chrominance alignment and step edge transients, but signals containing the finest detail to be encountered in the system must also be examined before settling on a compromise. The Output Stage The output amplifier normally produces about 2.0 Vpp and is intended to be loaded with 150 Ω as shown in Figure 16. This provides about 1.0 Vpp into 75 Ω, an industry standard level (RS–343). In some cases, the input to the monitor may be through a large coupling capacitor. If so, it is necessary to connect a 150 Ω resistor from Pin 9 to ground to provide a low impedance path to discharge the capacitor. The nominal average voltage at Pin 9 is over 4.0 V. The 150 Ω dc load causes the current supply to rise another 30 mA (to approximately 60 mA total into Pin 14). Under this (normal) condition the total device dissipation is about 600 mW. The calculated worst case die temperature rise is 60°C, but the typical device in a test socket is only slightly warm to the touch at room temperature. The solid copper 20–pin lead frame in a printed circuit board will be even more effectively cooled. MOTOROLA ANALOG IC DEVICE DATA MC1377 with an effective source impedance of less than 1.0 Ω. This regulator is convenient for a tracking dc reference for dc coupling the output to an RF modulator. Typical turn–on drift for the regulator is approximately –30 mV over 1 to 2 minutes in otherwise stable ambient conditions. Figure 14. Optional Chroma Coupling Circuits 0.001 0.001 1.0k 10 13 22µH 39pF Figure 15. Output Termination a) Insertion Loss: 3.0 dB a) Bandwidth: ± 1.0 MHz a) Delay: ≈ 100 ns 75Ω Cable Output 56pF 0.001 1.0k 9 10 13 27pF 4.7k 75 4.7k 75 Monitor MC1377 b) Insertion Loss: 9.0 dB b) Bandwidth: ± 2.0 MHz b) Delay: 0 SUMMARY Power Supplies The MC1377 is designed to operate from an unregulated 10 V to 14 Vdc power supply. Device current into Pin 14 with open output is typically 35 mA. To provide a stable reference for the ramp generator and the video output, a high quality 8.2 V regulator can supply up to 10 mA for external uses, The preceding information was intended to detail the application and basis of circuit choices for the MC1377. A complete MC1377 application with the MC1374 VHF modulator is illustrated in Figure 17. The internal schematic diagram of the MC1377 is provided in Figure 8. Figure 16. Application with VHF Modulator 470 47k 470 470 20 18 16 220 3.58MHz 5–25 2.7k 8.2VRef G 3.3k B 7 4 2 0.1 53k + 0.001 RF Out 3 1 3 + 4 15 + 5 22 10µH 0.001 mica MC1377 47 22 MC1374 2 12 0.001 9 11 10 5.1k Delay Line 0.001 0.1 0.33µH 120 15 47 75 0.33µH 9 6.8k 0.1 15 8 1 47 10 + 6 2.2k 220 S R +12Vdc 56 0.001 NTSC 17 0.12µH VCC PAL 8 13 14 75 13 5 10 + 100 220 1.0 1.2k 14 Color Bandpass Transformer (Fig. 24) 1.2k 6 11 12 19 15 0.1 .01 7 Video Out Audio In .01 +12Vdc 0.1 MOTOROLA ANALOG IC DEVICE DATA 11 MC1377 APPLICATIONS INFORMATION S–VHS In full RGB systems (Figure 18), three information channels are provided from the signal source to the display to permit unimpaired image resolution. The detail reproduction of the system is limited only by the signal bandwidth and the capability of the color display device. Also, higher than normal sweep rates may be employed to add more lines within a vertical period and three separate projection picture tubes can be used to eliminate the “shadow mask” limitations of a conventional color CRT. Figure 21 shows the “baseband” components of a studio NTSC signal. As in the previous example, energy is concentrated at multiples of the horizontal sweep frequency. The system is further refined by precisely locating the color subcarrier midway between luminance spectral components. This places all color spectra between luminance spectra and can be accomplished in the MC1377 only if “full interlaced” external color reference and sync are applied. The individual Figure 17. Spectra of a Full RGB System components of luminance and color can then be separated by the use of a comb filter in the monitor or receiver. This technique has not been widely used in consumer products, due to cost, but it is rapidly becoming less expensive and more common. Another technique which is gaining popularity is S–VHS (Super VHS). In S–VHS, the chroma and luma information are contained on separate channels. This allows the bandwidth of both the chroma and luma channels to be as wide as the monitors ability to reproduce the extra high frequency information. An output coupling circuit for the composite chroma using the TOKO transformer is shown in Figure 19. It is composed of the bandpass transformer and an output buffer and has the frequency performance shown in Figure 20. The composite output (Pin 9) then produces the luma information as well as composite sync and blanking. Figure 19. Frequency Response of Chroma Coupling Circuit Red Green Blue 1.0 2.0 3.0 f, FREQUENCY (MHz) 4–8 –6 dB Figure 18. S–VHS Output Buffer +12Vdc 1.0µF 16k 100/62pF* 13 33 1000pF 75 220 ** 47/33pF* 3.3k 8.2k 6.8k Composite Chroma Out f, MHz 2.7 3.66 4.5 +12Vdc 0.1µF **Refers to different component values used for NTSC/PAL (3.58 MHz/4.43 MHz). **Toko 166NNF–1026AG 12 MOTOROLA ANALOG IC DEVICE DATA MC1377 I/Q System versus (R–Y)/(B–Y) System The NTSC standard calls for unequal bandwidths for I and Q (Figure 21). The MC1377 has no means of processing the unequal bandwidths because the I and Q axes are not used (Figure 22) and because the outputs of the (R–Y) and the (B–Y) modulators are added before being output at Pin 13. Therefore, any bandwidth reduction intended for the chroma information must be performed on the composite chroma information. This is generally not a problem, however, since most monitors compromise the standard quite a bit. Color Subcarrier Q Video Amplitude Luminance I Figure 21. Color Vector Relationship (Showing Standard Colors) Red (R–Y) (104°) (90°) Sound Subcarrier Figure 20. NTSC Standard Spectral Content Figure 23 shows the typical response of most monitors and receivers. This figure shows that some crosstalk between luma and chroma information is always present. The acceptability of the situation is enhanced by the limited ability of the CRT to display information above 2.5 MHz. If the signal from the MC1377 is to be used primarily to drive conventional non–comb filtered monitors or receivers, it would be best to reduce the bandwidth at the MC1377 to that of Figure 23 to lessen crosstalk. I (123°) Q (33°) Yellow (168°) 0 1.0 2.0 3.0 f, FREQUENCY (MHz) (B–Y) 0° Color Burst (180°) 4.0 Purple (61°) Blue (348°) Green (241°) Cyan (284°) Figure 22. Frequency Response of Typical Monitor/TV Chroma Channel Gain Luminance Channel 1.0 MOTOROLA ANALOG IC DEVICE DATA 2.0 3.0 3.58 4.0 f, FREQUENCY (MHz) 13 MC1377 Figure 23. A Prototype Chroma Bandpass Transformer Toko Sample Number 166NNF–10264AG 15.0mm Max 3.5mm ± 0.5mm 0.7mm Pin Diameter 7 ± 0.2mm 3 4 S S 2 1 (Drawing Provided By: Toko America, Skokie, IL) 5 Unloaded Q (Pins 1–3): 15 @ 2.5 MHz Inductance: 30 µH ± 10% @ 2.5 MHz Turns: 60 (each winding) Wire: #38 AWG (0.1 m/m) Connection Diagram Bottom View Figure 24. A Prototype Delay Line TDK Sample Number DL122301D–1533 1.26 Max 32.0 0.35 Max 9.0 *Marking 0.93 Max 23.5 0.394 ± 0.06 10.0 ± 1.5 0.026 ± 0.002 0.65 ± 0.33 0.2 ± 0.04 5.0 ± 1.0 0.788 ± 0.08 20.0 ± 2.0 0.8 Radius Max 2.0 Item *Marking: Part Number, Manufacturer’s Identification, *Marking: Date Code and Lead Number. *Marking: Skokie, IL (TDK Corporation of America) Specifications Time Delay 400 ns ± 10% Impedance 1200 Ω ± 10% Resistance Less Than 15 Ω Transient Response with 20 ns Rise Time Input Pulse Preshoot: 10% Max Overshoot: 10% Max Rise Time: 120 ns Max Attenuation 14 3 dB Max at 6.0 MHz MOTOROLA ANALOG IC DEVICE DATA MC1377 Figure 25. RGB Pulse Generator BNC 4.7µF 10k Composite Blanking 2N4403 10k 2.2k –5.0V Reg 10k 1/2 MC74LS112A MC74LS112A 0.1 2N 4401 3.3k 0.1 0.1 0.1 0.1 2.2 k MC1455 8 7 4 3J 2 3.3k 15S 16 Q5 2k 6 154kHz 3 1 1C 2k 13C Q6 15S 16 3J Q9 12k 1C Q7 Q6 R4 R4 5 8 10k 10 k 750 pF 14S 11J 0.1 R10 8 Freq Adj 1.8k 680 2N4401 680 1.8k BNC Blue Output 2N4401 1.8k 470 2N4401 BNC Green Output 0.1 0.1 470 680 BNC Red Output 470 0.1 RGB Pulse Generator Timing Diagram for NTSC 64 µs Composite Blanking Input 154 kHz Clock White Blue Output Yellow Cyan Green Magenta Red Blue Black 1.0 Vpp Red Output Green Output MOTOROLA ANALOG IC DEVICE DATA 15 MC1377 Figure 26. Printed Circuit Boards for the MC1377 (CIRCUIT SIDE) (COMPONENT SIZE) Figure 27. Color TV Encoder – Modulator 470 47k 470 0.12µH 470 VCC 17 20 18 16 220 5–25 8.2Vdc 2.7k S R G 3.3k B 0.1 6 2.2k 7 4 47 2 + 54k 3 + 15µF 4 + 15µF 75 0.1 0.1 120 1 22 2 12 11 9 8 5.1k 14 75k 400ns 13 5 + 220 10 1.0 14 11 12 19 15 0.1 16 22 0.001 1.2k VCC (+12V) 47 RF Out MC1374 0.001 mica MC1377 0.001 100 0.001 10µH 13 10264 AG 0.33µH 3 6.8k 10 47 0.33µH 9 5 + 15µF 8 1 220 (+12V) 56 0.001 3.58MHz VCC 1.2k 6 Video Out 7 Audio In .01 0.1 .01 MOTOROLA ANALOG IC DEVICE DATA MC1377 OUTLINE DIMENSIONS P SUFFIX PLASTIC PACKAGE CASE 738–03 ISSUE E –A– 20 11 1 10 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. B C –T– K SEATING PLANE M N E G F J D 20 PL 0.25 (0.010) 20 PL 0.25 (0.010) T A M 20 –B– 10X NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.150 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN EXCESS OF D DIMENSION AT MAXIMUM MATERIAL CONDITION. P 0.010 (0.25) 1 M B M 10 D M T A B S J S F R X 45 _ C –T– 18X G M MILLIMETERS MIN MAX 25.66 27.17 6.10 6.60 3.81 4.57 0.39 0.55 1.27 BSC 1.27 1.77 2.54 BSC 0.21 0.38 2.80 3.55 7.62 BSC 0_ 15_ 0.51 1.01 M 11 0.010 (0.25) T B INCHES MIN MAX 1.010 1.070 0.240 0.260 0.150 0.180 0.015 0.022 0.050 BSC 0.050 0.070 0.100 BSC 0.008 0.015 0.110 0.140 0.300 BSC 0_ 15 _ 0.020 0.040 DW SUFFIX PLASTIC PACKAGE CASE 751D–04 (SO–20L) ISSUE E –A– 20X M DIM A B C D E F G J K L M N SEATING PLANE K MOTOROLA ANALOG IC DEVICE DATA DIM A B C D F G J K M P R MILLIMETERS MIN MAX 12.65 12.95 7.40 7.60 2.35 2.65 0.35 0.49 0.50 0.90 1.27 BSC 0.25 0.32 0.10 0.25 0_ 7_ 10.05 10.55 0.25 0.75 INCHES MIN MAX 0.499 0.510 0.292 0.299 0.093 0.104 0.014 0.019 0.020 0.035 0.050 BSC 0.010 0.012 0.004 0.009 0_ 7_ 0.395 0.415 0.010 0.029 M 17 MC1377 Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different applications. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. 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Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, Toshikatsu Otsuki, 6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–3521–8315 MFAX: [email protected] – TOUCHTONE (602) 244–6609 INTERNET: http://Design–NET.com HONG KONG: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298 18 ◊ *MC1377/D* MC1377/D MOTOROLA ANALOG IC DEVICE DATA