INTEGRATED CIRCUITS DATA SHEET SAA7152 Digital Video Comb Filter (DCF) Product specification File under Integrated Circuits, IC02 August 1996 Philips Semiconductors Product specification Digital Video Comb Filter (DCF) SAA7152 FEATURES GENERAL DESCRIPTION • Comb filter circuit for luminance and chrominance separation • Luminance and chrominance bypasses with short delay in case of no filtering The CMOS digital comb filter circuit is located between video analog-to-digital converters and the video multistandard decoder SAA7151B (not applicable for SAA7191B). The two-dimensional filtering is only appropriate for standard signals from a source with constant phase relationship between subcarrier signal and horizontal frequency. The comb-filter has to be switched off for VTR-signals and for separate VBS and C signals. In VCR and S-Video operation the luminance low-pass and the chrominance bandpass parts can still be used for noise reduction purposes. The processing delay is: • Line-locked system clock; CCIR-compatible 21 × LL27 clocks in active mode, or • Applicable for standards – PAL B/G, M and N – PAL 4.43 (525 lines, 60 Hz) – NTSC M and N – NTSC 4.43 (50 and 60 Hz) • I2C-bus controlled 3 × LL27 in short delay bypass mode (BYPS = 1) QUICK REFERENCE DATA SYMBOL PARAMETER MIN. TYP. MAX. UNIT VDD supply voltage (pins 11, 34, 44) 4.5 5.0 5.5 V IP total supply current − 85 180 mA Vi input levels TTL-compatible Vo output levels TTL-compatible LL27 typical system clock frequency − 27 − MHz Tamb operating ambient temperature range 0 − 70 °C ORDERING INFORMATION PACKAGE EXTENDED TYPE NUMBER SAA7152 PINS 44 PIN POSITION PLCC plastic Note 1. SOT187-2; 1997 January 06. August 1996 MATERIAL 2 CODE SOT187 (1) Philips Semiconductors Product specification Digital Video Comb Filter (DCF) SAA7152 BLOCK DIAGRAM handbook, full pagewidth +5 V VDDD1 to VDDD3 SAA7152 CVBS(7 -0) 20 to 13 CFRQ MULTIPLEXER REGISTER LINE DELAY 2 CLOCK BUFFER YOUT(7-0) OUTPUT INTERFACE 10 to 3 2 25 to 32 luminance bypass CFRQ CSEL LL27 BYPS BANDPASS FILTER 1 LINE DELAY 1 INPUT INTERFACE CIN(7 -0) 11, 34, 44 NLIN, LLEN BANDPASS FILTER 2 clk 35 to 42 COUT(7-0) NLIN, LLEN COMB FILTER LOGIC (MED) CCMB, TAPS TAPS, CFRQ control bits I 2 C-bus SDA 23 SCL 24 LOW-PASS FILTER I 2 C-BUS CONTROL 1 ADDER AND LIMITER chrominance bypass 21 22 SP AP 12, 33, 43 VSSD1 to V SSD3 RESN Fig.1 Block diagram. August 1996 YCMB 3 MEH423-1 Philips Semiconductors Product specification Digital Video Comb Filter (DCF) SAA7152 PINNING SYMBOL PIN DESCRIPTION RESN 1 reset input; active low LL27 2 line-locked system clock input (27 MHz) CIN0 3 CIN1 4 CIN2 5 CIN3 6 CIN4 7 CIN5 8 CIN6 9 CIN7 10 chrominance input data bits CIN0 to CIN7 VDD1 11 +5 V supply input VSS1 12 ground 1 (0 V) CVBS0 13 CVBS1 14 CVBS2 15 CVBS3 16 CVBS4 17 CVBS5 18 CVBS6 19 CVBS7 20 SP 21 connected to ground (shift pin for testing) AP 22 connected to ground (action pin for testing) SDA 23 I2C-bus data line SCL 24 I2C-bus clock line YOUT7 25 YOUT6 26 YOUT5 27 YOUT4 28 YOUT3 29 YOUT2 30 YOUT1 31 YOUT0 32 VSS2 33 ground 2 (0 V) VDD2 34 +5 V supply input 2 August 1996 CVBS input data bits 0 to 7 luminance (Y) output data bits 7 to 0 4 Philips Semiconductors Product specification Digital Video Comb Filter (DCF) SYMBOL SAA7152 PIN DESCRIPTION COUT7 35 COUT6 36 COUT5 37 COUT4 38 COUT3 39 COUT2 40 COUT1 41 COUT0 42 VSS3 43 ground 3 (0 V) VDD3 44 +5 V supply input 3 COUT4 COUT5 COUT6 COUT7 V DD2 V SS2 YOUT0 YOUT1 YOUT2 YOUT3 handbook, full pagewidth COUT3 chrominance (C) output data bits 7 to 0 39 38 37 36 35 34 33 32 31 30 29 COUT2 40 28 YOUT4 COUT1 41 27 YOUT5 COUT0 42 26 YOUT6 V SS3 43 25 YOUT7 VDD3 44 24 SCL RESN 1 LL27 2 22 AP CIN0 3 21 SP CIN1 4 20 CVBS7 CIN2 5 19 CVBS6 CIN3 6 18 CVBS5 23 SDA 7 8 9 10 11 12 13 14 15 16 17 CIN4 CIN5 CIN6 CIN7 V DD1 V SS1 CVBS0 CVBS1 CVBS2 CVBS3 CVBS4 SAA7152 Fig.2 Pin configuration. August 1996 5 MEH422 Philips Semiconductors Product specification Digital Video Comb Filter (DCF) handbook, full pagewidth SAA7152 CVBS ADC Y TDA8708A CVBS(7-0) YOUT(7-0) CVBS/Y DMSD DCF DIGITAL VIDEO COMB FILTER CHROMA SAA7152 ADC UV YUV SAA7151B TDA8709A CIN(7-0) COUT(7-0) LL27 CUV CREF LL27 LFCO clock CGC SAA7157 MEH557-1 Fig.3 System environment. August 1996 6 Philips Semiconductors Product specification Digital Video Comb Filter (DCF) SAA7152 I2C-BUS FORMAT S SLAVE S ADDRESS = A SUBADDRESS A DATA0 A ........ DATAn start condition SLAVE ADDRESS = 1011 0010 (B2 h) A = acknowledge, generated by the slave SUBADDRESS (1) = subaddress byte (Table 1) DATA = data byte (Table 1) P = stop condition X = read/write control bit X = 0, order to write (the circuit is slave receiver) X = 1, order to read (the circuit is slave transmitter) Note 1. If more than 1 byte DATA are transmitted, then auto-increment of the subaddress is performed. August 1996 7 A P Philips Semiconductors Product specification Digital Video Comb Filter (DCF) Table 1 SAA7152 I2C-bus; subaddress and data bytes for writing (after X = 0 in address byte) DATA FUNCTION Controls SUBADDRESS 00 D7 D6 BYPS CSEL D5 D4 CCMB YCMB D3 TAPS D2 CFRQ D1 D0 NLIN LLEN Function of the bits of Table 1: BYPS Select bypass with a short delay; all other 0 = no bypass functions are disabled: 1 = comb filter bypassed (delay is 3 LLC) CSEL Input mode select: 0 = CVBS selected 1 = Y/C selected CCMB Select comb filtering 0 = chrominance is bandpassed 1 = chrominance is comb-filtered YCMB Enable chrominance substruction from CVBS signal: 0 = disabled, CVBS/Y signal is only low-passed TAPS Selects tap for switching Y and C to adder: 0 = for bandpass/low-pass combination Select centre frequency and matching factor of chrominance filter: 0 = 4.43 MHz NLIN Select delay (number of lines): 0 = 4-line comb filter for standard PAL LLEN Selects the number of clocks for each line delay: CFRQ 1 = enabled (chrominance trap or comb filtering) 1 = for comb filter active 1 = 3.58 MHz 1 = 2-line filter for standard NTSC August 1996 0 = 1728 clocks (625 lines; 50 Hz) 1 = 1716 clocks (525 lines; 60 Hz) 8 Philips Semiconductors Product specification Digital Video Comb Filter (DCF) SAA7152 MEH424 handbook, full pagewidth 0 -6 video (dB) -12 -18 -24 -30 -36 -42 -48 0 2 4 6 8 10 12 14 16 f (MHz) Fig.4 Frequency response of bandpass filters 1 and 2 with CFRQ-bit = 1. MEH425 andbook, full pagewidth 0 -6 video (dB) -12 -18 -24 -30 -36 -42 -48 0 2 4 6 8 10 12 14 16 f (MHz) Fig.5 Frequency response of bandpass filters 1 and 2 with CFRQ-bit = 0. August 1996 9 Philips Semiconductors Product specification Digital Video Comb Filter (DCF) SAA7152 MEH426 ook, full pagewidth 0 -6 video (dB) -12 -18 -24 -30 -36 -42 -48 0 2 4 6 8 10 12 14 16 f (MHz) Fig.6 Frequency response of low-pass filter with CFRQ-bit = 1. MEH427 handbook, full pagewidth 0 -6 video (dB) -12 -18 -24 -30 -36 -42 -48 0 2 4 6 8 10 12 14 f (MHz) Fig.7 Frequency response of low-pass filter with CFRQ-bit = 0. August 1996 10 16 Philips Semiconductors Product specification Digital Video Comb Filter (DCF) SAA7152 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER MIN. MAX. UNIT VDD supply voltage (pins 11, 34, 44) −0.5 7.0 V VI voltage on all inputs −0.5 VDD + 0.5 V VO voltage on all outputs (IO max = 20 mA) −0.5 VDD + 0.5 V Ptot total power dissipation − 1.0 W Tstg storage temperature range −65 150 °C Tamb operating ambient temperature range 0 70 °C VESD handling(1) − ±2000 V electrostatic for all pins Note 1. Equivalent to discharging a 100 pF capacitor through a 1.5 kΩ series resistor; inputs and outputs are protected against electrostatic discharge in normal handling. Normal precautions appropriate to handle MOS devices is recommended (see “Handling MOS Devices”). CHARACTERISTICS VDD1 to VDD3 = 5 V; Tamb = 0 to 70 °C and measurements taken in Fig.1 unless otherwise specified. SYMBOL PARAMETER VDD supply voltage range (pins 11, 34, 44) IDD total supply current (pins 11, 34, 44) CONDITIONS VDD = 5 V; inputs LOW; outputs not connected MIN. TYP. MAX. UNIT 4.5 5.0 5.5 V − 85 180 mA I2C-bus, SDA and SCL (pins 23 and 24) VIL input voltage LOW −0.5 − 1.5 V VIH input voltage HIGH 3 − VDD+0.5 V I23, 24 input current − − ±10 µA IACK output current on pin 23 acknowledge 3 − − mA VOL output voltage at acknowledge I23 = 3 mA − − 0.4 V Data and clock inputs (pins 2 to 10 and pins 13 to 20) VIL LL27 input voltage (pin 2) VIH VIL other input voltages VIH LOW −0.5 − 0.6 V HIGH 2.4 − VDD+0.5 V LOW −0.5 − 0.8 V 2.0 − VDD+0.5 V − − 10 µA data inputs − − 8 pF clock inputs − − 10 pF Fig.8 11 − − ns 3 − − ns HIGH Ileak input leakage current CI input capacitance tSU.DAT input data set-up time tHD.DAT input data hold time August 1996 11 Philips Semiconductors Product specification Digital Video Comb Filter (DCF) SYMBOL SAA7152 PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Data outputs (pins 25 to 32 and pins 35 to 42) VOL output voltage LOW 0 − 0.6 V VOH output voltage HIGH 2.4 − VDD V CL load capacitor 8 − 25 pF Timing of data outputs Fig.8 tOH output signal hold time from positive edge of LL27 CL = 8 pF 3 − − ns tOD output delay from positive edge of LL27 CL = 25 pF − − 32 ns Fig.8 Line locked clock input LL27 (pin 2) tLL27 cycle time note 1 35 − 39 ns tp duty factor tLL27H / tLL27 40 50 60 % tr rise time − − 5 ns tf fall time − − 6 ns Note 1. tSU, tHD, tOH and tOD include tr and tf. t LL27 handbook, full pagewidth t LL27 H 2.4 V clock input LL27 1.5 V 0.6 V t SU tf t HD tr not valid 2.0 V input data 0.8 V t OD t OH not valid 2.4V output data 0.6 V MEH556-1 Fig.8 Data input and output timing. August 1996 12 Philips Semiconductors Product specification Digital Video Comb Filter (DCF) SAA7152 PACKAGE OUTLINE PLCC44: plastic leaded chip carrier; 44 leads SOT187-2 eD eE y X 39 A 29 28 40 ZE bp b1 w M 44 1 E HE pin 1 index A A4 A1 e (A 3) 6 β 18 k 1 Lp k 7 detail X 17 e v M A ZD D B HD v M B 0 5 10 mm scale DIMENSIONS (millimetre dimensions are derived from the original inch dimensions) UNIT A A1 min. A3 A4 max. bp b1 mm 4.57 4.19 0.51 0.25 3.05 0.53 0.33 0.81 0.66 0.180 inches 0.020 0.01 0.165 D (1) E (1) e eD eE HD HE k 16.66 16.66 16.00 16.00 17.65 17.65 1.22 1.27 16.51 16.51 14.99 14.99 17.40 17.40 1.07 k1 max. Lp v w y 0.51 1.44 1.02 0.18 0.18 0.10 Z D(1) Z E (1) max. max. 2.16 β 2.16 45 o 0.630 0.630 0.695 0.695 0.048 0.057 0.021 0.032 0.656 0.656 0.020 0.05 0.007 0.007 0.004 0.085 0.085 0.12 0.590 0.590 0.685 0.685 0.042 0.040 0.013 0.026 0.650 0.650 Note 1. Plastic or metal protrusions of 0.01 inches maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT187-2 112E10 MO-047AC August 1996 EIAJ EUROPEAN PROJECTION ISSUE DATE 92-11-17 95-02-25 13 Philips Semiconductors Product specification Digital Video Comb Filter (DCF) SAA7152 • The package footprint must incorporate solder thieves at the downstream corners. SOLDERING Introduction QFP There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. Wave soldering is not recommended for QFP packages. This is because of the likelihood of solder bridging due to closely-spaced leads and the possibility of incomplete solder penetration in multi-lead devices. If wave soldering cannot be avoided, the following conditions must be observed: This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “IC Package Databook” (order code 9398 652 90011). • A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. • The footprint must be at an angle of 45° to the board direction and must incorporate solder thieves downstream and at the side corners. Reflow soldering Reflow soldering techniques are suitable for all PLCC and QFP packages. Even with these conditions, do not consider wave soldering the following packages: QFP52 (SOT379-1), QFP100 (SOT317-1), QFP100 (SOT317-2), QFP100 (SOT382-1) or QFP160 (SOT322-1). The choice of heating method may be influenced by larger PLCC or QFP packages (44 leads, or more). If infrared or vapour phase heating is used and the large packages are not absolutely dry (less than 0.1% moisture content by weight), vaporization of the small amount of moisture in them can cause cracking of the plastic body. For more information, refer to the Drypack chapter in our “Quality Reference Handbook” (order code 9397 750 00192). METHOD (PLCC AND QFP) During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 °C within 6 seconds. Typical dwell time is 4 seconds at 250 °C. Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 °C. Repairing soldered joints Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. Wave soldering PLCC Wave soldering techniques can be used for all PLCC packages if the following conditions are observed: • A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. • The longitudinal axis of the package footprint must be parallel to the solder flow. August 1996 14 Philips Semiconductors Product specification Digital Video Comb Filter (DCF) SAA7152 DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. PURCHASE OF PHILIPS I2C COMPONENTS Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011. August 1996 15