19-2931; Rev 0; 8/03 -48V Hot-Swap Controller with External RSENSE Features ♦ Allows Safe Board Insertion and Removal from a Live -48V Backplane The MAX5920A/MAX5920B provide a controlled turn-on to circuit cards preventing glitches on the power-supply rail and damage to board connectors and components. The MAX5920A/MAX5920B provide undervoltage, overvoltage, and overcurrent protection. These devices ensure the input voltage is stable and within tolerance before applying power to the load. Both the MAX5920A and MAX5920B protect a system against overcurrent and short-circuit conditions by turning off the external MOSFET in the event of a fault condition. The MAX5920A/MAX5920B also provide protection against input voltage steps. During an input voltage step, the MAX5920A/MAX5920B limit the current drawn by the load to a safe level without turning off power to the load. Both devices feature an open-drain power-good status output (PWRGD for the MAX5920A or PWRGD for the MAX5920B) that can be used to enable downstream converters. A built-in thermal-shutdown feature is also included to protect the external MOSFET in case of overheating. ♦ Pin- and Function-Compatible with LT4250H (MAX5920B) ♦ Pin- and Function-Compatible with LT4250L (MAX5920A) ♦ Pin-Compatible with LT1640L (MAX5920A) ♦ Pin-Compatible with LT1640H (MAX5920B) ♦ Circuit-Breaker Immunity to Input Voltage Steps and Current Spikes ♦ Withstands -100V Input Transients with No External Components ♦ Programmable Inrush and Short-Circuit Current Limits ♦ Operates from -20V to -80V ♦ Programmable Overvoltage Protection ♦ Programmable Undervoltage Lockout ♦ Powers Up into a Shorted Load ♦ Power-Good Control Output ♦ Thermal Shutdown Protects External MOSFET The MAX5920A/MAX5920B are available in an 8-pin SO package. Both devices are specified for the extended -40°C to +85°C temperature range. Applications Telecom Line Cards Ordering Information TEMP RANGE PIN-PACKAGE MAX5920AESA PART -40°C to +85°C 8 SO MAX5920BESA -40°C to +85°C 8 SO Network Switches/Routers Central-Office Line Cards Pin Configuration Server Line Cards Base-Station Line Cards Typical Operating Circuit and Selector Guide appear at end of data sheet. TOP VIEW PWRGD (PWRGD) 1 OV 2 UV 3 MAX5920A MAX5920B VEE 4 8 VDD 7 DRAIN 6 GATE 5 SENSE SO ( ) FOR MAX5920B. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX5920 General Description The MAX5920A/MAX5920B are hot-swap controllers that allow a circuit card to be safely hot plugged into a live backplane. The MAX5920A/MAX5920B operate from -20V to -80V and are well-suited for -48V power systems. These devices are pin and function compatible with the LT4250 and pin compatible with the LT1640. MAX5920 -48V Hot-Swap Controller with External RSENSE ABSOLUTE MAXIMUM RATINGS All Voltages are Referenced to VEE, Unless Otherwise Noted. Supply Voltage (VDD - VEE ) .................................-0.3V to +100V DRAIN, PWRGD, PWRGD ....................................-0.3V to +100V PWRGD to DRAIN .............................................… -0.3V to +95V PWRGD to VDD ........................................................-95V to +85V SENSE (Internally Clamped) .................................-0.3V to +1.0V GATE (Internally Clamped) ....................................-0.3V to +18V UV and OV..............................................................-0.3V to +60V Current Through SENSE ...................................................±40mA Current into GATE...........................................................±300mA Current into Any Other Pin................................................±20mA Continuous Power Dissipation (TA = +70°C) 8-Pin SO (derate 5.9mW/°C above +70°C)..................471mW Operating Temperature Range ...........................-40°C to +85°C Junction Temperature .....................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VEE = 0V, VDD = 48V, TA = -40°C to +85°C. Typical values are at TA = +25°C, unless otherwise noted.) (Notes 1, 4) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS POWER SUPPLIES Operating Input Voltage Range VDD Supply Current IDD 20 (Note 2) 80 V 0.7 2 mA GATE DRIVER AND CLAMPING CIRCUITS Gate Pin Pullup Current IPU GATE drive on, VGATE = VEE -30 -45 -60 µA Gate Pin Pulldown Current IPD GATE drive off , VGATE = 2V 24 50 70 mA VGATE - VEE, 20V ≤ VDD ≤ 80V 10 13.5 18 V VGATE - VEE, IGS = 30mA 15 16.4 18 V External Gate Drive GATE to VEE Clamp Voltage ∆VGATE VGSCLMP CIRCUIT BREAKER Current-Limit Trip Voltage VCL SENSE Input Bias Current VCL = VSENSE - VEE 40 50 60 mV VSENSE = 50mV -1 -0.2 0 µA UNDERVOLTAGE LOCKOUT Internal Undervoltage Lockout Voltage High VUVLOH VDD increasing 13.8 15.4 17.0 V Internal Undervoltage Lockout Voltage Low VUVLOL VDD decreasing 11.8 13.4 15.0 V UV PIN UV High Threshold VUVH UV voltage increasing 1.240 1.255 1.270 V UV Low Threshold VUVL UV voltage decreasing 1.105 1.125 1.145 V UV Hysteresis UV Input Bias Current VUVHY_ 130 IINUV -0.5 mV 0 µA V OV PIN OV High Threshold VOVH OV voltage increasing 1.235 1.255 1.275 OV Low Threshold VOVL OV voltage decreasing 1.189 1.205 1.221 OV Voltage Reference Hysteresis OV Input Bias Current VOVHY IINOV 50 VOV = VEE -0.5 V mV 0 µA 250 µA PWRGD OUTPUT SIGNAL REFERENCED TO DRAIN DRAIN Input Bias Current 2 IDRAIN VDRAIN = 48V 10 80 _______________________________________________________________________________________ -48V Hot-Swap Controller with External RSENSE MAX5920 ELECTRICAL CHARACTERISTICS (continued) (VEE = 0V, VDD = 48V, TA = -40°C to +85°C. Typical values are at TA = +25°C, unless otherwise noted.) (Notes 1, 4) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 1.1 1.7 2.0 V 1.0 1.6 2.0 V 10 µA DRAIN Threshold for Power-Good VDL VDRAIN - VEE threshold for power-good condition, DRAIN decreasing GATE High Threshold VGH ∆VGATE - VGATE threshold for power-good condition, ∆VGATE - VGATE decreasing PWRGD, PWRGD Output Leakage IOH PWRGD (MAX5920A) = 80V, VDRAIN = 48V, PWRGD (MAX5920B) = 80V, VDRAIN = 0V PWRGD Output Low Voltage VOL VPWRGD - VEE; VDRAIN - VEE < VDL, ISINK = 5mA (MAX5920A) 0.11 0.4 V PWRGD Output Low Voltage VOL VPWRGD - VDRAIN; VDRAIN = 5V, ISINK = 5mA (MAX5920B) 0.11 0.4 V Overtemperature Threshold TOT Junction temperature, temperature rising 135 °C Overtemperature Hysteresis THYS 20 °C OVERTEMPERATURE PROTECTION AC PARAMETERS OV High to GATE Low tPHLOV Figures 1a, 2 0.5 µs UV Low to GATE Low tPHLUV Figures 1a, 3 0.4 µs OV Low to GATE High tPLHOV Figures 1a, 2 3.3 µs UV High to GATE High tPLHVL Figures 1a, 3 3.4 µs SENSE High to GATE Low tPHLSENSE Figures 1a, 4a Current Limit to GATE Low tPHLCL Figures 1b, 4b DRAIN Low to PWRGD Low DRAIN Low to (PWRGD - DRAIN) High tPHLDL GATE High to PWRGD Low GATE High to (PWRGD-DRAIN) High tPHLGH 350 1 3 µs 500 650 µs MAX5920A, Figures 1a, 5a 1.8 MAX5920B, Figures 1a, 5a 3.4 MAX5920A, Figures 1a, 5b 1.6 MAX5920B, Figures 1a, 5b 2.5 µs µs TURN-OFF Latch-Off Period Note 1: Note 2: Note 3: Note 4: tOFF (Note 3) 128 x tPHLCL ms All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to VEE, unless otherwise specified. Current into VDD with UV = 3V, OV, DRAIN, PWRGD, SENSE = VEE, GATE = floating. Minimum duration of GATE pulldown following a circuit-breaker fault. The circuit breaker can be reset during this time by toggling UV low, but the GATE pulldown does not release until tOFF has elapsed. Limits are 100% tested at TA = +25°C and +85°C. Limits at -40°C are guaranteed by design. _______________________________________________________________________________________ 3 Typical Operating Characteristics (VDD = 48V, VEE = 0V, TA = +25°C, unless otherwise noted.) 14 TA = -40°C 400 300 12 11 10 200 9 100 8 0 50 49 48 47 46 7 20 40 60 80 100 0 20 40 60 -40 100 80 10 35 60 TEMPERATURE (°C) GATE PULLUP CURRENT vs. TEMPERATURE GATE PULLDOWN CURRENT vs. TEMPERATURE GATE PULLDOWN CURRENT vs. OVERDRIVE 44.4 44.2 44.0 43.8 43.6 43.4 65 200 60 55 50 45 40 35 43.0 150 125 100 50 0 25 -15 10 35 60 85 -40 TEMPERATURE (°C) -15 10 35 100 PWRGD OUTPUT LEAKAGE CURRENT vs. TEMPERATURE (MAX5920B) 40 35 30 25 20 15 10 5 100 PWRGD OUTPUT LEAKAGE CURRENT (nA) IOUT = 1mA 1000 OVERDRIVE (mV) TEMPERATURE (°C) MAX5920 toc07 PWRGD OUTPUT LOW VOLTAGE (mV) 45 10 85 60 PWRGD OUTPUT LOW VOLTAGE vs. TEMPERATURE (MAX5920A) 50 MAX5920 75 25 30 43.2 VGATE = 2V 175 VDRAIN - VEE > 2.4V 10 1 0.1 0.01 0.001 0 -40 -15 10 35 TEMPERATURE (°C) 60 85 MAX5920 toc06 VGATE = 2V GATE PULLDOWN CURRENT (mA) 44.6 70 MAX5920 toc05 MAX5920 toc04 SUPPLY VOLTAGE (V) VGATE = 0V -40 -15 SUPPLY VOLTAGE (V) GATE PULLDOWN CURRENT (mA) 0 4 51 TRIP VOLTAGE (mV) GATE VOLTAGE (V) 500 44.8 52 13 600 45.0 53 MAX5920 toc03 700 TA = +25°C MAX5920 toc08 800 SUPPLY CURRENT (µA) TA = +25°C TA = +85°C 15 MAX5920 toc01 900 CURRENT-LIMIT TRIP VOLTAGE vs. TEMPERATURE GATE VOLTAGE vs. SUPPLY VOLTAGE MAX5920 toc02 SUPPLY CURRENT vs. SUPPLY VOLTAGE GATE PULLUP CURRENT (µA) MAX5920 -48V Hot-Swap Controller with External RSENSE 85 -40 -15 10 35 60 TEMPERATURE (°C) _______________________________________________________________________________________ 85 -48V Hot-Swap Controller with External RSENSE MAX5920 R 5kΩ V+ 5V PWRGD/PWRGD OV VDD VS DRAIN VOV 48V VDRAIN MAX5920A MAX5920B VUV UV GATE VEE SENSE VSENSE Figure 1a. Test Circuit 1 PWRGD/PWRGD VDD DRAIN OV VS 48V VS 20V 10kΩ UV MAX5920A MAX5920B 10Ω GATE 0.1µF N IRF530 VUV VEE SENSE 10Ω Figure 1b. Test Circuit 2 _______________________________________________________________________________________ 5 -48V Hot-Swap Controller with External RSENSE MAX5920 Timing Diagrams 2V 1.255V 2V 1.205V OV 1.255V 1.125V UV 0V 0V tPLHUV tPHLUV tPHLOV tPLHOV GATE GATE Figure 2. OV to GATE Timing 100mV 1V 1V 1V 1V Figure 3. UV to GATE Timing 60mV SENSE UV VEE tPHLCL tPHLSENSE GATE GATE 1V 1V Figure 4a. SENSE to GATE Timing 6 Figure 4b. Active Current-Limit Threshold _______________________________________________________________________________________ 1V -48V Hot-Swap Controller with External RSENSE DRAIN 1.4V 1.4V ∆VGATE - VGATE = 0V VEE tPHLDL GATE tPHLGH PWRGD 1V PWRGD 1V VEE VEE 1.4V DRAIN VGATE - VGATE = 0V 1.4V GATE VEE VEE tPHLDL tPHLGH PWRGD PWRGD 1V VPWRGD - VDRAIN = 0V 1V VPWRGD - VDRAIN = 0V Figure 5a. DRAIN to PWRGD/PWRGD Timing Figure 5b. GATE to PWRGD/PWRGD Timing Block Diagram VDD UVLO VCC AND REFERENCE GENERATOR UV MAX5920A MAX5920B VCC REF PWRGD PWRGD OUTPUT DRIVE REF LOGIC GATE DRIVER OV 50mV VGH VDL ∆VGATE VEE VEE SENSE GATE DRAIN _______________________________________________________________________________________ 7 MAX5920 Timing Diagrams (continued) MAX5920 -48V Hot-Swap Controller with External RSENSE Pin Description PIN MAX5920A MAX5920B 1 — NAME FUNCTION PWRGD Power-Good Signal Output. PWRGD is an active-low open-drain status output referenced to VEE. PWRGD is latched low when VDRAIN - VEE ≤ VDL and VGATE > (∆VGATE - VGH), indicating a power-good condition. PWRGD is open drain otherwise. — 1 PWRGD Power-Good Signal Output. PWRGD is an active-high open-drain status output referenced to DRAIN. PWRGD latches in a high-impedance state when VDRAIN - VEE ≤ VDL and VGATE > (∆VGATE - VGH), indicating a power-good condition. PWRGD is pulled low to DRAIN otherwise. 2 2 OV Input Pin for Overvoltage Detection. OV is referenced to VEE. When OV is pulled above VOVH voltage, the GATE pin is immediately pulled low. The GATE pin remains low until the OV pin voltage reduces to VOVL. 3 3 UV 4 4 VEE Input Pin for Undervoltage Detection. UV is referenced to VEE. When UV is pulled above VUVH voltage, the GATE is enabled. When UV is pulled below VUVL, GATE is pulled low. UV is also used to reset the circuit breaker after a fault condition. To reset the circuit breaker, pull UV below VUVL. The reset command can be issued immediately after a fault condition; however, the device does not restart until a tOFF delay time has elapsed after the fault. Device Negative Power-Supply Input. Connect to the negative power-supply rail. 5 5 SENSE Current-Sense Voltage Input. Connect to an external sense resistor and the external MOSFET source. The voltage drop across the external sense resistor is monitored to detect overcurrent or short-circuit fault conditions. Connect SENSE to VEE to disable the currentlimiting feature. 6 6 GATE Gate Drive Output. Connect to gate of the external N-channel MOSFET. 7 7 DRAIN Output-Voltage Sense Input. Connect to the output-voltage node (drain of external N-channel MOSFET). Place the MAX5920_ so the DRAIN pin is close to the DRAIN of the external MOSFET for the best thermal protection. 8 8 VDD Positive Power-Supply Rail Input. This is the power ground in the negative-supply voltage system. Connect to the higher potential of the power-supply inputs. Detailed Description The MAX5920A/MAX5920B are integrated hot-swap controllers for -48V power systems. They allow circuit boards to be safely hot plugged into a live backplane without causing a glitch on the power-supply rail. When circuit boards are inserted into a live backplane, the bypass capacitors at the input of the board’s power module or switching power supply can draw large inrush currents as they charge. The inrush currents can cause glitches on the system power-supply rail and damage components on the board. 8 The MAX5920A/MAX5920B provide a controlled turn-on to circuit cards preventing glitches on the power-supply rail and damage to board connectors and components. Both the MAX5920A and MAX5920B provide undervoltage, overvoltage, and overcurrent protection. The MAX5920A/MAX5920B ensure the input voltage is stable and within tolerance before applying power to the load. The devices also provide protection against input voltage steps. During an input voltage step, the MAX5920A/MAX5920B limit the current drawn by the load to a safe level without turning off power to the load. _______________________________________________________________________________________ -48V Hot-Swap Controller with External RSENSE Power-Supply Ramping The MAX5920A/MAX5920B can reside either on the backplane or the removable circuit board (Figure 6a). Power is delivered to the load by placing an external N-channel MOSFET pass transistor in the power-supply path. After the circuit board is inserted into the backplane and the supply voltage at VEE is stable and within the undervoltage and overvoltage tolerance, the MAX5920A/MAX5920B turn on Q1. The MAX5920A/ MAX5920B gradually turn on the external MOSFET by charging the gate of Q1 with a 45µA current source. Capacitor C2 provides a feedback signal to accurately limit the inrush current. The inrush current can be calculated: IINRUSH = IPU x CL / C2 where CL is the total load capacitance, C3 + C4, and IPU is the MAX5920_ gate pullup current. Figure 6b shows the inrush current waveform. The current through C2 controls the GATE voltage. At the end of the DRAIN ramp, the GATE voltage is charged to its final value. The GATE-to-SENSE clamp limits the maximum VGS to about 18V under any condition. Board Removal If the circuit card is removed from the backplane, the voltage at the UV pin falls below the UVLO detect threshold, and the MAX5920_ turns off the external MOSFET. Current Limit and Electronic Circuit Breaker The MAX5920_ provides current-limiting and circuitbreaker features that protect against excessive load current and short-circuit conditions. The load current is monitored by sensing the voltage across an external sense resistor connected between VEE and SENSE. -48V RTN (SHORT PIN) -48V RTN R4 549kΩ 1% VDD UV R5 6.49kΩ 1% * 10nF R6 10kΩ 1% PWRGD MAX5920B OV VEE SENSE GATE DRAIN R3 1kΩ 5% R1 0.02Ω 5% C1** 470nF 25V R2 10Ω 5% C2 15nF 100V GATE IN VIN+ C3 0.1µF 100V C4 100µF 100V VICOR VI-J3D-CY -48V *DIODES INC. SMAT70A. **OPTIONAL. Q1 IRF530 VIN- Figure 6a. Inrush Control Circuitry _______________________________________________________________________________________ 9 MAX5920 Board Insertion Figure 6a shows a typical hot-swap circuit for -48V systems. When the circuit board first makes contact with the backplane, the DRAIN to GATE capacitance (Cgd) of Q1 pulls up the GATE voltage to roughly IVEE x Cgd / Cgd + CgsI. The MAX5920_ features an internal dynamic clamp between GATE and VEE to keep the gate-tosource voltage of Q1 low during hot insertion, preventing Q1 from passing an uncontrolled current to the load. For most applications, the internal clamp between GATE and VEE of the MAX5920A/MAX5920B eliminates the need for an external gate-to-source capacitor. Resistor R3 limits the current into the clamp circuitry during card insertion. MAX5920 -48V Hot-Swap Controller with External RSENSE INRUSH CURRENT 1A/div voltage of the external MOSFET, thereby reducing the load current. When V SENSE - V EE < V CL , the MAX5920A/MAX5920B pull the GATE pin high by a 45µA (IPU) current. Driving into a Shorted Load GATE - VEE 10V/div DRAIN 50V/div VEE 50V/div CONTACT BOUNCE 4ms/div Figure 6b. Input Inrush Current If the voltage between VEE and SENSE reaches the current-limit trip voltage (VCL), the MAX5920_ pulls down the GATE pin and regulates the current through the external MOSFET so VSENSE - VEE < VCL. If the current drawn by the load drops below VCL / RSENSE limit, the GATE pin voltage rises again. However, if the load current is at the regulation limit of VCL / RSENSE for a period of tPHLCL, the electronic circuit breaker trips, causing the MAX5920A/MAX5920B to turn off the external MOSFET. After an overcurrent fault condition, the circuit breaker is reset by pulling the UV pin low and then pulling UV high or by cycling power to the MAX5920A/MAX5920B. Unless power is cycled to the MAX5920A/MAX5920B, the device waits until tOFF has elapsed before turning on the gate of the external FET. Overcurrent Fault Integrator The MAX5920_ feature an overcurrent fault integrator. When an overcurrent condition exists, an internal digital counter increments its count. When the counter reaches 500µs (the maximum current-limit duration) for the MAX5920_, an overcurrent fault is generated. If the overcurrent fault does not last 500µs, then the counter begins decrementing at a rate 128 (maximum currentlimit duty cycle) times slower than the counter was incrementing. Repeated overcurrent conditions will generate a fault if duty cycle of the overcurrent condition is greater than 1/128. Load-Current Regulation The MAX5920A/MAX5920B accomplish load-current regulation by pulling current from the GATE pin whenever V SENSE - V EE > V CL (see Typical Operating Characteristics). This decreases the gate-to-source In the event of a permanent short-circuit condition, the MAX5920A/MAX5920B limit the current drawn by the load to VCL / RSENSE for a period of tPHLCL, after which the circuit breaker trips. Once the circuit breaker trips, the GATE of the external FET is pulled low by 50mA (IPD) turning off power to the load. Immunity to Input Voltage Steps The MAX5920A/MAX5920B guard against input voltage steps on the input supply. A rapid increase in the input supply voltage (VDD - VEE increasing) causes a current step equal to I = CL x ∆VIN / ∆T, proportional to the input voltage slew rate (∆VIN / ∆T). If the load current exceeds V CL / R SENSE during an input voltage step, the MAX5920A/MAX5920B current limit activates, pulling down the gate voltage and limiting the load current to VCL / RSENSE. The DRAIN voltage (VDRAIN) then slews at a slower rate than the input voltage. As the drain voltage starts to slew down, the drain-to-gate feedback capacitor C2 pushes back on the gate, reducing the gate-tosource voltage (VGS) and the current through the external MOSFET. Once the input supply reaches its final value, the DRAIN slew rate (and therefore the inrush current) is limited by the capacitor C2 just as it is limited in the startup condition. To ensure correct operation, RSENSE must be chosen to provide a current limit larger than the sum of the load current and the dynamic current into the load capacitance in the slewing mode. If the load current plus the capacitive charging current is below the current limit, the circuit breaker does not trip. INRUSH CURRENT 2A/div GATE - VEE 4V/div CONTACT BOUNCE 4ms/div Figure 7a. Startup Into a Short Circuit 10 ______________________________________________________________________________________ VEE 50V/div -48V Hot-Swap Controller with External RSENSE MAX5920 DRAIN 50V/div VEE 20V/div GATE - VEE 10V/div DRAIN 20V/div ID (Q1) 5A/div ID (Q1) 5A/div 400µs/div 1ms/div Figure 7b. Short-Circuit Protection Waveform Figure 8. Voltage Step-On Input Supply -48V RTN (SHORT PIN) -48V RTN R4 549kΩ 1% VDD UV R5 6.49kΩ 1% * R6 10kΩ 1% PWRGD MAX5920A OV VEE SENSE GATE DRAIN R3 1kΩ 5% R7 220Ω 5% R1 0.02Ω 5% -48V *DIODES INC. SMAT70A. D1 BAT85 C2 3.3nF 100V C3 0.1µF 100V C4 22µF 100V R2 10Ω 5% C1 150nF 25V Q1 IRF530 Figure 9. Circuit for Input Steps with Small C1 For C2 values less than 10nF, a positive voltage step on the input supply can result in Q1 turning off momentarily, which can shut down the output. By adding an additional resistor and diode, Q1 remains on during the voltage step. This is shown as D1 and R7 in Figure 9. The purpose of D1 is to shunt current around R7 when the power pins first make contact and allow C1 to hold the GATE low. The value of R7 should be sized to generate an R7 x C1 time constant of 33µs. internally connected to analog comparators with 130mV (UV) and 50mV (OV) of hysteresis. When the UV voltage falls below its threshold or the OV voltage rises above its threshold, the GATE pin is immediately pulled low. The GATE pin is held low until UV goes high and OV is low, indicating that the input supply voltage is within specification. The MAX5920_ includes an internal lockout (UVLO) that keeps the external MOSFET off until the input supply voltage exceeds 15.4V, regardless of the UV input. Undervoltage and Overvoltage Protection The UV pin is also used to reset the circuit breaker after a fault condition has occurred. The UV pin can be pulled below VUVL to reset the circuit breaker. The UV and OV pins can be used to detect undervoltage and overvoltage conditions. The UV and OV pins are ______________________________________________________________________________________ 11 MAX5920 -48V Hot-Swap Controller with External RSENSE -48V RTN (SHORT PIN) -48V RTN R7 1MΩ 5% C4 1µF 100V R6 549kΩ 1% R4 549kΩ 1% VDD UV NODE1 50V/div NODE1 PWRGD MAX5920A * R6 10kΩ 1% Q2 2N2222 D1 1N4148 OV VEE R5 6.49kΩ 1% SENSE DRAIN R3 1kΩ 5% Q3 ZVN3310 R8 510kΩ 5% GATE P R1 0.02Ω 5% -48V C1 470nF 25V R2 10Ω 5% C3 100µF 100V C2 3.3nF 100V GATE 2V/div 1s/div N Q1 IRF530 *DIODES INC. SMAT70A. Figure 10. Automatic Restart After Current Fault Figure 11 shows how to program the undervoltage and overvoltage trip thresholds using three resistors. With R4 = 549kΩ, R5 = 6.49kΩ, and R6 = 10kΩ, the undervoltage threshold is set to 38.5V (with a 43V release from undervoltage), and the overvoltage is set to 71V. The resistordivider also increases the hysteresis and overvoltage lockout to 4.5V and 2.8V at the input supply, respectively. -48V RTN (SHORT PIN) -48V RTN R4 VUV = 1.255 8 3 R4 + R5 + R6 R5 + R6 VDD UV R5 R4 + R5 + R6 VOV = 1.255 R6 2 MAX5920A MAX5920B OV VEE R6 4 -48V Figure 11. Undervoltage and Overvoltage Sensing 12 PWRGD/PWRGD Output The PWRGD (PWRGD) output can be used directly to enable a power module after hot insertion. The MAX5920A (PWRGD) can be used to enable modules with an active-low enable input (Figure 13), while the MAX5920B (PWRGD) is used to enable modules with an active-high enable input (Figure 12). The PWRGD signal is referenced to the DRAIN terminal, which is the negative supply of the power module. The PWRGD signal is referenced to VEE. When the DRAIN voltage of the MAX5920A is high with respect to VEE or the GATE voltage is low, the internal pulldown MOSFET Q2 is off and the PWRGD pin is in a high-impedance state (Figure 13). The PWRGD pin is ______________________________________________________________________________________ -48V Hot-Swap Controller with External RSENSE MAX5920 ACTIVE-HIGH ENABLE MODULE -48V RTN (SHORT PIN) -48V RTN VIN+ VOUT+ VDD R4 MAX5920B PWRGD I1 ON/OFF UV N C3 N VGH R5 Q2 Q3 * VIN- VOUT- VEE ∆VGATE VDL OV DRAIN R6 VEE SENSE GATE R3 C2 R2 C1 R1 -48V Q1 *DIODES INC. SMAT70A. Figure 12. Active-High Enable Module ACTIVE-LOW ENABLE MODULE -48V RTN (SHORT PIN) -48V RTN VIN+ VOUT+ VDD R4 MAX5920A PWRGD I1 ON/OFF UV C3 N VGH R5 Q2 VIN- * OV VOUT- VEE ∆VGATE VDL DRAIN R6 VEE SENSE GATE R3 C2 R2 C1 R1 -48V *DIODES INC. SMAT70A. Q1 Figure 13. Active-Low Enable Module ______________________________________________________________________________________ 13 MAX5920 -48V Hot-Swap Controller with External RSENSE -48V RTN (SHORT PIN) PWRGD -48V RTN R7** 51kΩ 5% R4 549kΩ 1% VDD UV R5 6.49kΩ 1% * R6 10kΩ 1% PWRGD MAX5920A OV VEE SENSE GATE DRAIN R3 1kΩ 5% R1 0.02Ω 5% C1** 470nF 25V R2 10Ω 5% MOC207 C2 15nF 100V C3 100µF 100V -48V *DIODES INC. SMAT70A. **OPTIONAL. Q1 IRF530 Figure 14. Using PWRGD to Drive an Optoisolator pulled high by the module’s internal pullup current source, turning the module off. When the DRAIN voltage drops below VDL and the GATE voltage is greater than ∆VGATE - VGH, Q2 turns on and the PWRGD pin pulls low, enabling the module. The PWRGD signal can also be used to turn on an LED or optoisolator to indicate that the power is good (Figure 14) (see the Component Selection Procedure section). When the DRAIN voltage of the MAX5920B is high with respect to VEE (Figure 12) or the GATE voltage is low, the internal MOSFET Q3 is turned off so that I1 and the internal MOSFET Q2 clamp the PWRGD pin to the DRAIN pin. MOSFET Q2 sinks the module’s pullup current, and the module turns off. When the DRAIN voltage drops below V DL and the GATE voltage is greater than ∆VGATE - VGH, MOSFET Q3 turns on, shorting I1 to VEE and turning Q2 off. The pullup current in the module pulls the PWRGD pin high, enabling the module. GATE Pin Voltage Regulation The GATE pin goes high when the following startup conditions are met: the UV pin is high, the OV pin is low, the supply voltage is above VUVLOH, and (VSENSE - VEE) is less than 50mV. The gate is pulled up with a 45µA current source and is regulated at 13.5V above V EE . The 14 MAX5920A/MAX5920B include an internal clamp that ensures the GATE voltage of the external MOSFET never exceeds 18V. During a fast-rising VDD, the clamp also keeps the GATE and SENSE potentials as close as possible to prevent the FET from accidentally turning on. When a fault condition is detected, the GATE pin is pulled low with a 50mA current. Thermal Shutdown The MAX5920A/MAX5920B include internal die-temperature monitoring. When the die temperature reaches the thermal-shutdown threshold, T OT , the MAX5920A/ MAX5920B pull the GATE pin low and turn off the external MOSFET. If a good thermal path is provided between the MOSFET and the MAX5920A/MAX5920B, the device offers thermal protection for the external MOSFET. Placing the MAX5920A/MAX5920B near the drain of the external MOSFET offers the best thermal protection because most of the power is dissipated in its drain. After a thermal shutdown fault has occurred, the MAX5920A/MAX5920B turn the external FET off. To clear a thermal shutdown fault condition, toggle the UV pin or cycle the power to the device. The device keeps the external FET off for a minimum time of tOFF after UV is toggled, allowing the MOSFET to cool down. The device restarts after the temperature drops 20°C below the thermal-shutdown threshold. ______________________________________________________________________________________ -48V Hot-Swap Controller with External RSENSE Sense Resistor The circuit-breaker current-limit threshold is set to 50mV (typically). Select a sense resistor that causes a drop equal to or above the current-limit threshold at a current level above the maximum normal operating current. Typically, set the overload current to 1.5 to 2.0 times the nominal load current plus the load-capacitance charging current during startup. Choose the sense resistor power rating to be greater than (VCL)2 / RSENSE. Component Selection Procedure • Determine load capacitance: CL = C2 + C3 + module input capacitance • • Determine load current, ILOAD. Select circuit-breaker current, for example: ICB = 2 x ILOAD • Calculate RSENSE: 50mV ICB Realize that ICB varies ±20% due to trip-voltage tolerance. RSENSE = • Set allowable inrush current: 40mV − ILOAD or RSENSE IINRUSH + ILOAD ≤ 0.8 x ICB(MIN) IINRUSH ≤ 0.8 x • Determine value of C2: 45µA x CL C2 = IINRUSH • Calculate value of C1: − VGS(TH) V C1 = (C2 + Cgd) x IN(MAX) VGS(TH) • Determine value of R3: 150µs (typically 1kΩ) R3 ≤ C2 • Set R2 = 10Ω. • If an optocoupler is utilized as in Figure 14, determine the LED series resistor: V − 2V R7 = IN(NOMINAL) 3mA ≤ ILED ≤ 5mA Although the suggested optocoupler is not specified for operation below 5mA, its performance is adequate for 36V temporary low-line voltage where LED current would then be ≈2.2mA to 3.7mA. If R7 is set as high as 51kΩ, optocoupler operation should be verified over the expected temperature and input voltage range to ensure suitable operation when LED current ≈0.9mA for 48V input and ≈0.7mA for 36V input. If input transients are expected to momentarily raise the input voltage to >100V, select an input transient-voltage-suppression diode (TVS) to limit maximum voltage on the MAX5920 to less than 100V. A suitable device is the Diodes Inc. SMAT70A telecom-specific TVS. Select Q1 to meet supply voltage, load current, efficiency, and Q1 package power-dissipation requirements: BVDSS ≥ 100V ID(ON) ≥ 3 x ILOAD DPAK, D2PAK, or TO-220AB The lowest practical RDS(ON), within budget constraints and with values from 14mΩ to 540mΩ, are available at 100V breakdown. Ensure that the temperature rise of Q1 junction is not excessive at normal load current for the package selected. Ensure that ICB current during voltage transients does not exceed allowable transient-safe operating-area limitations. This is determined from the SOA and transient-thermal-resistance curves in the Q1 manufacturer’s data sheet. Example 1: ILOAD = 2.5A, efficiency = 98%, then VDS = 0.96V is acceptable, or RDS(ON) ≤ 384mΩ at operating temperature is acceptable. An IRL520NS 100V NMOS with R DS(ON) ≤ 180mΩ and I D(ON) = 10A is available in D2PAK. (A Vishay Siliconix SUD40N10-25 100V NMOS with RDS(ON) ≤ 25mΩ and ID(ON) = 40A is available in DPAK, but may be more costly because of a larger die size). Using the IRL520NS, VDS ≤ 0.625V even at +80°C so efficiency ≥ 98.6% at 80°C. PD ≤ 1.56W and junction temperature rise above case temperature would be 5°C due to the package θJC = 3.1°C/W thermal resistance. Of course, using the SUD40N10-25 would yield an efficiency greater than 99.8% to compensate for the increased cost. ______________________________________________________________________________________ 15 MAX5920 Applications Information MAX5920 -48V Hot-Swap Controller with External RSENSE If ICB is set to twice ILOAD, or 5A, VDS momentarily doubles to ≤ 1.25V. If COUT = 4000µF, transient-line input voltage is ∆36V, the 5A charging-current pulse is: 4000µF x 1.25V t= = 1ms 5A Entering the data sheet transient-thermal-resistance curves at 1ms provides a θJC = 0.9°C/W. PD = 6.25W, so ∆tJC = 5.6°C. Clearly, this is not a problem. Example 2: ILOAD = 10A, efficiency = 98%, allowing VDS = 0.96V but RDS(ON) ≤ 96mΩ. An IRF530 in a D2PAK exhibits RDS(ON) ≤ 90mΩ at +25°C and ≤ 135mΩ at +80°C. Power dissipation is 9.6W at +25°C or 14.4W at +80°C. Junction-to-case thermal resistance is 1.9W/°C, so the junction temperature rise would be approximately 5°C above the +25°C case temperature. For higher efficiency, consider IRL540NS with R DS(ON) ≤ 44mΩ. This allows η = 99%, PD ≤ 4.4W, and TJC = +4°C (θJC = 1.1°C/W) at +25°C. Thermal calculations for the transient condition yield I CB = 20A, V DS = 1.8V, t = 0.5ms, transient θ JC = 0.12°C/W, PD = 36W and ∆tJC = 4.3°C. HIGH-CURRENT PATH SENSE RESISTOR SENSE VEE MAX5920A MAX5920B Figure 15. Recommended Layout for Kelvin-Sensing Current Through Sense Resistor Layout Guidelines Good thermal contact between the MAX5920A/ MAX5920B and the external MOSFET is essential for the thermal-shutdown feature to operate effectively. Place the MAX5920A/MAX5920B as close as possible to the drain of the external MOSFET and use wide circuit-board traces for good heat transfer (see Figure 15). Selector Guide 16 PART PWRGD POLARITY MAX5920AESA Active low (PWRGD) FAULT MANAGEMENT Latched MAX5920BESA Active high (PWRGD) Latched ______________________________________________________________________________________ -48V Hot-Swap Controller with External RSENSE BACKPLANE CIRCUIT CARD -48V RTN -48V RTN (SHORT PIN) VDD UV PWRGD MAX5920A OV VEE SENSE GATE DRAIN VIN+ -48V (INPUT1) LUCENT JW050A1-E INPUT1 N VIN- -48V (INPUT2) INPUT2 Chip Information TRANSISTOR COUNT: 2645 PROCESS: BiCMOS ______________________________________________________________________________________ 17 MAX5920 Typical Operating Circuit Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) DIM A A1 B C e E H L N E H INCHES MILLIMETERS MAX MIN 0.069 0.053 0.010 0.004 0.014 0.019 0.007 0.010 0.050 BSC 0.150 0.157 0.228 0.244 0.016 0.050 MAX MIN 1.35 1.75 0.10 0.25 0.35 0.49 0.19 0.25 1.27 BSC 3.80 4.00 5.80 6.20 0.40 SOICN .EPS MAX5920 -48V Hot-Swap Controller with External RSENSE 1.27 VARIATIONS: 1 INCHES TOP VIEW DIM D D D MIN 0.189 0.337 0.386 MAX 0.197 0.344 0.394 MILLIMETERS MIN 4.80 8.55 9.80 MAX 5.00 8.75 10.00 N MS012 8 AA 14 AB 16 AC D C A B e 0 -8 A1 L FRONT VIEW SIDE VIEW PROPRIETARY INFORMATION TITLE: PACKAGE OUTLINE, .150" SOIC APPROVAL DOCUMENT CONTROL NO. 21-0041 REV. B 1 1 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 18 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2003 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.