MAXIM MAX8722EEG

19-3321; Rev 0; 6/04
KIT
ATION
EVALU
E
L
B
A
IL
AVA
Low-Cost CCFL Backlight Controller
The MAX8722 integrated backlight controller is optimized to drive cold-cathode fluorescent lamps (CCFLs)
using a full-bridge resonant inverter architecture.
Resonant operation maximizes striking capability and
provides near-sinusoidal waveforms over the entire
input range to improve CCFL lifetime. The controller
operates over a wide input voltage range (4.6V to 28V)
with high power to light efficiency. The device also
includes safety features that effectively protect against
many single-point fault conditions including lamp-out
and short-circuit faults.
The MAX8722 achieves 10:1 dimming range by “chopping” the lamp current on and off using a digital pulsewidth modulation (DPWM) method. The DPWM frequency
can be accurately adjusted with a resistor or synchronized to an external signal. The brightness is controlled
by an analog voltage on the CNTL pin. The device directly drives the four external n-channel power MOSFETs of
the full-bridge inverter. An internal 5.3V linear regulator
powers the MOSFET drivers, the DPWM oscillator, and
most of the internal circuitry. The MAX8722 is available in
a low-cost, 24-pin QSOP package and operates over a
-40°C to +85°C temperature range.
Features
♦ Synchronized to Resonant Frequency
Longer Lamp Life
Guaranteed Striking Capability
High Power to Light Efficiency
♦ Wide Input Voltage Range (4.6V to 28V)
♦ Input-Voltage Feed-Forward for Excellent Line
Rejection
♦ Accurate Dimming Control with Analog Interface
♦ 10:1 Dimming Range
♦ Adjustable Accurate DPWM Frequency with Sync
Function
♦ Adjustable Lamp Current Rise and Fall Time
♦ Secondary Voltage Limit Reduces Transformer
Stress
♦ Lamp-Out Protection with Adjustable Timeout
♦ Secondary Overcurrent Protection with
Adjustable Timeout
♦ Low-Cost 24-Pin QSOP Package
Ordering Information
Applications
Notebook Computer Displays
LCD Monitors
PART
MAX8722EEG
LCD TVs
TEMP RANGE
PIN-PACKAGE
-40°C to +85°C
24 QSOP
Minimal Operating Circuit
Pin Configuration
VIN
VCC
VDD
BATT
TOP VIEW
GND
BATT 1
24 GND
SHDN 2
23 VCC
ILIM 3
22 VDD
TFLT 4
CNTL 5
VCC
VCC
BST1
GH1
ILIM
21 PGND
MAX8722
BST2
MAX8722 LX1
20 GL2
DPWM 6
19 GL1
SYNC 7
18 GH1
FREQ 8
17 LX1
COMP 9
16 BST1
LX2
FREQ
GL1
PGND
SHDN
CNTL
SYNC
IFB 10
15 BST2
VFB 11
14 LX2
ISEC 12
13 GH2
GL2
GH2
VFB
DPWM
ISEC
COMP
IFB
TFLT
QSOP
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1
MAX8722
General Description
MAX8722
Low-Cost CCFL Backlight Controller
ABSOLUTE MAXIMUM RATINGS
SHDN to GND...........................................................-0.3V to +6V
PGND to GND .......................................................-0.3V to +0.3V
Continuous Power Dissipation (TA = +70°C)
24-Pin QSOP (derate 9.5mW/°C above +70°C)........761.9mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
BATT to GND..........................................................-0.3V to +30V
BST1, BST2 to GND ...............................................-0.3V to +36V
BST1 to LX1, BST2 to LX2 ........................................-0.3V to +6V
CNTL, FREQ, SYNC, VCC, VDD to GND ...................-0.3V to +6V
COMP, DPWM, ILIM, TFLT to GND ............-0.3V to (VCC + 0.3V)
GH1 to LX1 ..............................................-0.3V to (VBST1 + 0.3V)
GH2 to LX2 ..............................................-0.3V to (VBST2 + 0.3V)
GL1, GL2 to GND .......................................-0.3V to (VDD + 0.3V)
IFB, ISEC, VFB to GND................................................-3V to +6V
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 1. VBATT = 12V, VCC = VDD, VSHDN = 5.3V, TA = 0°C to +85°C. Typical values are at TA = +25°C, unless otherwise noted.)
PARAMETER
BATT Input Voltage Range
CONDITIONS
MIN
TYP
MAX
VCC = VDD = VBATT
4.6
5.5
VCC = VDD = open
5.5
28.0
VBATT = 28V
BATT Quiescent Current
VSHDN = VCC, VIFB = 1V
BATT Quiescent Current,
Shutdown
SHDN = GND
VCC Output Voltage, Normal
Operation
VSHDN = 5.5V, 6V < VBATT < 28V,
0 < ILOAD < 10mA
VCC Output Voltage, Shutdown
SHDN = GND, no load
VCC Undervoltage-Lockout
Threshold
VCC rising (leaving lockout)
1
VBATT = VCC = 5V
VCC falling (entering lockout)
2
2
UNITS
V
mA
6
20
µA
5.25
5.40
5.55
V
3.5
4.6
5.5
V
4.58
4.0
VCC Undervoltage-Lockout
Hysteresis
200
V
mV
GH1, GH2, GL1, GL2 OnResistance, High
ITEST = 10mA, VCC = VDD = 5.3V
20
37
Ω
GH1, GH2, GL1, GL2 OnResistance, Low
ITEST = 10mA, VCC = VDD = 5.3V
10
20
Ω
GH1, GH2, GL1, GL2 Maximum
Output Current
0.3
BST1, BST2 Leakage Current
VBST_ = 12V, VLX_ = 7V
Resonant Frequency Range
Guaranteed by design
30
A
5
µA
80
kHz
Minimum Off-Time
340
470
600
ns
Maximum Off-Time
24
33
43
µs
ILIM = VCC
180
200
220
mV
VILIM = 0.5V
80
100
120
VILIM = 2.0V
370
400
430
Current-Limit Threshold
LX1 to PGND, LX2 to PGND
(Fixed)
Current-Limit Threshold
LX1 to PGND, LX2 to PGND
(Adjustable)
2
mV
_______________________________________________________________________________________
Low-Cost CCFL Backlight Controller
(Circuit of Figure 1. VBATT = 12V, VCC = VDD, VSHDN = 5.3V, TA = 0°C to +85°C. Typical values are at TA = +25°C, unless otherwise noted.)
PARAMETER
CONDITIONS
Zero-Current Crossing Threshold
LX1 to GND, LX2 to GND
Current-Limit Leading Edge
Blanking
IFB Input Voltage Range
MAX
UNITS
1
6
12
mV
240
350
460
ns
+2
V
790
810
mV
770
0 < VIFB < 2V
-2
-2V < VIFB < 0
-150
IFB Lamp-Out Threshold
IFB to COMP Transconductance
TYP
-2
IFB Regulation Point
IFB Input Bias Current
MIN
0.5V < VCOMP < 4V
COMP Output Impedance
+2
µA
560
600
640
mV
60
100
160
µS
7
10
18
MΩ
COMP Discharge Current During
Overvoltage or Overcurrent Fault
VIFB = 800mV, VISEC = 2V
400
µA
COMP Discharge Current During
DPWM Off-Time
CNTL = GND, VCOMP = 2V
100
µA
DPWM Rising to Falling Ratio
VIFB = 0
2.5
ISEC Overcurrent Threshold
1.28
V
ISEC Input Bias Current
0 < VISEC < 2V
1.15
-0.3
+0.3
µA
VFB Input Bias Current
VVFB = 0.5V
-0.3
+0.3
µA
2.4
V
214
Hz
0.8
V
VFB Overvoltage Threshold
2.2
RFREQ = 100kΩ
DPWM Chopping Frequency
RFREQ = 169kΩ
2.3
343
204
RFREQ = 340kΩ
DPWM Input Low Voltage
1.21
209
106
SYNC = VCC, RFREQ = 169kΩ
DPWM Input High Voltage
SYNC = VCC, RFREQ = 169kΩ
DPWM Input Hysteresis
SYNC = VCC, RFREQ = 169kΩ
DPWM Input Bias Current
SYNC = VCC, RFREQ = 169kΩ
DPWM Output Low Resistance
DPWM Output High Resistance
2.1
V
100
-0.3
+0.3
µA
SYNC = GND, FREQ = VCC
2.4
kΩ
SYNC = VCC, FREQ = VCC
2.4
kΩ
0.8
V
SYNC Input Low Voltage
SYNC Input High Voltage
2.1
SYNC Input Hysteresis
SYNC Input Bias Current
mV
V
100
VSYNC = 2V
SYNC Input Frequency Range
mV
-0.3
+0.3
µA
10
50
kHz
CNTL Minimum Duty-Cycle
Threshold
0.20
0.23
0.26
V
CNTL Maximum Duty-Cycle
Threshold
1.9
2.0
2.1
V
+0.1
µA
CNTL Input Current
0 < VCNTL < VCC
DPWM ADC Resolution
Guaranteed monotonic
-0.1
5
Bits
_______________________________________________________________________________________
3
MAX8722
ELECTRICAL CHARACTERISTICS (continued)
MAX8722
Low-Cost CCFL Backlight Controller
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1. VBATT = 12V, VCC = VDD, VSHDN = 5.3V, TA = 0°C to +85°C. Typical values are at TA = +25°C, unless otherwise noted.)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
0.8
V
SHDN Input Low Voltage
SHDN Input High Voltage
2.1
SHDN Input Bias Current
-1
FREQ Dual Mode Input High
Level
FREQ = VCC
VISEC < 1.25V and VIFB < 600mV; VFLT = 2V
TFLT Charge Current
+1
VCC 0.35
FREQ Input Regulation Level
FREQ Input Bias Current
V
0.95
V
VCC / 2
V
230
µA
1.00
VISEC < 1.25V and VIFB > 600mV; VFLT = 2V
-1
VISEC > 1.25V and VIFB < 600mV; VFLT = 2V
116
TFLT Trip Threshold
3.95
µA
1.05
µA
4.10
4.20
V
MAX
UNITS
Dual Mode is a trademark of Maxim Integrated Products, Inc.
ELECTRICAL CHARACTERISTIC
(Circuit of Figure 1. VBATT = 12V, VCC = VDD, V SHDN = 5.3V, TA = -40°C to +85°C, unless otherwise noted.) (Note 1)
PARAMETER
BATT Input Voltage Range
CONDITIONS
MIN
TYP
VCC = VDD = VBATT
4.6
5.5
VCC = VDD = open
5.5
28.0
VBATT = 28V
2
VBATT = VCC = 5V
2
BATT Quiescent Current
VSHDN = VCC, VIFB = 1V
BATT Quiescent Current,
Shutdown
SHDN = GND
VCC Output Voltage, Normal
Operation
VSHDN = 5.5V, 6V < VBATT < 28V
0 < ILOAD < 20mA
5.25
VCC Output Voltage, Shutdown
SHDN = GND, no load
3.5
VCC Undervoltage-Lockout
Threshold
VCC rising (leaving lockout)
VCC falling (entering lockout)
V
mA
20
µA
5.55
V
5.5
V
4.58
4.0
V
GH1, GH2, GL1, GL2 OnResistance, High
ITEST =10mA, VCC = VDD = 5.3V
37
Ω
GH1, GH2, GL1, GL2 OnResistance, Low
ITEST =10mA, VCC = VDD = 5.3V
20
Ω
BST1, BST2 Leakage Current
VBST_ = 12V, VLX_ = 7V
5
µA
Resonant Frequency Range
Guaranteed by design
30
80
kHz
Minimum Off-Time
340
600
ns
Maximum Off-Time
24
43
µs
180
220
mV
Current-Limit Threshold
LX1 - PGND, LX2 - PGND (Fixed)
4
ILIM = VCC
_______________________________________________________________________________________
Low-Cost CCFL Backlight Controller
(Circuit of Figure 1. VBATT = 12V, VCC = VDD, V SHDN = 5.3V, TA = -40°C to +85°C, unless otherwise noted.) (Note 1)
PARAMETER
Current-Limit Threshold
LX1 - PGND, LX2 - PGND
(Adjustable)
CONDITIONS
MIN
MAX
UNITS
VILIM = 0.5V
80
120
VILIM = 2.0V
370
430
1
12
mV
240
460
ns
-2
+2
V
mV
mV
Zero-Current Crossing Threshold
LX1 - GND, LX2 - GND
Current-Limit Leading Edge
Blanking
IFB Input Voltage Range
IFB Regulation Point
IFB Input Bias Current
TYP
770
810
0 < VIFB < 2V
-2
+2
-2V < VIFB < 0
-150
IFB Lamp-Out Threshold
µA
560
640
60
160
µS
7
18
MΩ
ISEC Overcurrent Threshold
1.15
1.28
V
VFB Overvoltage Threshold
2.2
2.4
V
200
218
Hz
0.8
V
IFB to COMP Transconductance
0.5V < VCOMP < 4V
COMP Output Impedance
mV
DPWM Chopping Frequency
RFREQ = 169kΩ
DPWM Input Low Voltage
SYNC = VCC, RFREQ = 169kΩ
DPWM Input High Voltage
SYNC = VCC, RFREQ = 169kΩ
DPWM Output Low Resistance
SYNC = GND, FREQ = VCC
2.4
kΩ
DPWM Output High Resistance
SYNC = VCC, FREQ = VCC
2.4
kΩ
0.8
V
-0.3
+0.3
µA
10
50
kHz
CNTL Minimum Duty-Cycle
Threshold
0.20
0.26
V
CNTL Maximum Duty-Cycle
Threshold
1.9
2.1
V
0.8
V
2.1
SYNC Input Low Voltage
SYNC Input High Voltage
SYNC Input Bias Current
V
2.1
VSYNC = 2V
SYNC Input Frequency Range
SHDN Input Low Voltage
SHDN Input High Voltage
V
2.1
V
FREQ Dual-Mode Input High
Level
VCC 0.35
V
TFLT Trip Threshold
3.95
4.20
V
Note 1: Specifications to -40°C are guaranteed by design based on final characterization results.
_______________________________________________________________________________________
5
MAX8722
ELECTRICAL CHARACTERISTICS (continued)
MAX8722
Low-Cost CCFL Backlight Controller
Typical Operating Characteristics
(Circuit of Figure 1. VBATT = 12V, VCC = VDD, VSHDN = 5.3V, TA = +25°C, unless otherwise noted.)
HIGH INPUT-VOLTAGE
OPERATION (VBATT = 20V)
LOW INPUT-VOLTAGE
OPERATION (VBATT = 8V)
LINE-TRANSIENT RESPONSE
MAX8722 toc02
MAX8722 toc01
MAX8722 toc03
0V A
0V A
0V A
0V B
0V B
0V B
C
C
C
0V
20V
0V
0V
D
10V D
D
0V
0V
A: VIFB, 2V/div
B: VVFB, 2V/div
A: VIFB, 2V/div
B: VVFB, 2V/div
C: VLX1, 10V/div
D: VLX2, 10V/div
20µs/div
C: VLX1, 10V/div
D: VLX2, 10V/div
MINIMUM BRIGHTNESS DIGITAL
PWM OPERATION (VCNTL = 0V)
MAX8722 toc05
MAX8722 toc04
MAX8722 toc06
0V A
0V A
0V A
0V B
0V B
0V B
C
C
C
0V
20V
0V
6
D
0V
0V
C: VLX1, 10V/div
D: VBATT, 10V/div
0V
D
10V D
20µs/div
C: VLX1, 10V/div
D: VBATT, 10V/div
A: VVFB, 2V/div
B: VIFB, 2V/div
MINIMUM BRIGHTNESS STARTUP
WAVEFORM (VCNTL = 0V)
LINE-TRANSIENT RESPONSE
A: VVFB, 2V/div
B: VIFB, 2V/div
0V
10µs/div
10µs/div
2ms/div
A: VIFB, 2V/div
B: VVFB, 2V/div
C: VCOMP, 1V/div
D: VSHDN, 5V/div
0V
2ms/div
A: VIFB, 2V/div
B: VVFB, 2V/div
_______________________________________________________________________________________
C: VCOMP, 1V/div
D: VDPWM, 5V/div
Low-Cost CCFL Backlight Controller
50% BRIGHTNESS DIGITAL
PWM OPERATION (VCNTL = 1V)
DIGITAL PWM SOFT-START
DIGITAL PWM SOFT-STOP
MAX8722 toc08
MAX8722 toc07
MAX8722 toc09
0V A
0V A
0V A
0V B
0V B
0V B
C
C
C
0V
0V
D
D
D
0V
0V
0V
40µs/div
2ms/div
A: VIFB, 2V/div
B: VVFB, 2V/div
C: VCOMP, 1V/div
D: VDPWM, 5V/div
40µs/div
C: VCOMP, 1V/div
D: VDPWM, 5V/div
SECONDARY OVERCURRENT
PROTECTION AND TIMEOUT
SWITCHING FREQUENCY
vs. INPUT VOLTAGE
MAX8722 toc11
MAX8722 toc10
60
A
A
0V
0V
B
0V
B
MAX8722 toc12
LAMP-OUT VOLTAGE LIMITING
AND TIMEOUT
C: VCOMP, 1V/div
D: VDPWM, 5V/div
A: VIFB, 2V/div
B: VVFB, 2V/div
SWITCHING FREQUENCY (kHz)
A: VIFB, 2V/div
B: VVFB, 2V/div
0V
57
54
51
48
C
0V
0V
4ms/div
200ms/div
A: VIFB, 2V/div
B: VVFB, 2V/div
C: VTFLT, 5V/div
A: VISEC, 500mV/div
B: VTFLT, 2V/div
45
8
12
16
20
24
INPUT VOLTAGE (V)
_______________________________________________________________________________________
7
MAX8722
Typical Operating Characteristics (continued)
(Circuit of Figure 1. VBATT = 12V, VCC = VDD, VSHDN = 5.3V, TA = +25°C, unless otherwise noted.)
Typical Operating Characteristics (continued)
(Circuit of Figure 1. VBATT = 12V, VCC = VDD, VSHDN = 5.3V, TA = +25°C, unless otherwise noted.)
250
200
6.05
209
206
203
150
100
150
200
250
300
10
5.90
NOMINAL CURRENT SET POINT
13
16
19
22
12
8
25
16
NORMALIZED BRIGHTNESS
vs. CNTL VOLTAGE
VCC LINE REGULATION
0.2
0
VCC ACCURACY (%)
80
60
40
MAX8722 toc17
0.4
MAX8722 toc16
100
20
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
RFREQ (Ω)
NORMALIZED BRIGHTNESS (%)
5.95
5.80
7
350
6.00
5.85
200
100
MAX8722 toc15
212
RMS LAMP CURRENT (mA)
300
6.10
MAX8722 toc14
350
215
DIGITAL PWM FREQUENCY (Hz)
MAX8722 toc13
400
RMS LAMP CURRENT
vs. INPUT VOLTAGE
DIGITAL PWM FREQUENCY
vs. INPUT VOLTAGE
DIGITAL PWM FREQUENCY vs. RFREQ
DIGITAL PWM FREQUENCY (Hz)
-0.2
-0.4
-0.6
20
-0.8
0
-1.0
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
4
8
CNTL VOLTAGE (V)
16
20
24
VCC ACCURACY vs. TEMPERATURE
VCC LOAD REGULATION
0.03
VCC ACCURACY (%)
-0.2
-0.3
-0.4
MAX8722 toc19
0.04
MAX8722 toc18
-0.1
0.02
0.01
0
-0.01
-0.02
-0.5
0
2
4
6
LOAD CURRENT (mA)
8
12
INPUT VOLTAGE (V)
0
VCC ACCURACY (%)
MAX8722
Low-Cost CCFL Backlight Controller
8
10
-40
-20
0
20
40
60
80
TEMPERATURE (°C)
_______________________________________________________________________________________
100
24
Low-Cost CCFL Backlight Controller
PIN
NAME
1
BATT
Supply Input. BATT is the input to the internal 5.4V linear regulator that powers the device. Bypass BATT to
GND with a 0.1µF ceramic capacitor.
2
SHDN
Shutdown Control Input. The device shuts down when SHDN is pulled to GND.
3
ILIM
Primary Current-Limit Adjustment Input. Connect a resistive voltage-divider between VCC and GND to set
the primary current limit. The current-limit threshold is 1/5 of the voltage at ILIM. Connect it to VCC with a
pullup resistor to select the default current-limit threshold of 0.2V.
4
TFLT
Fault Timer Adjustment Pin. Connect a capacitor from TFLT to GND to set the timeout periods for openlamp and secondary overcurrent faults.
5
CNTL
Brightness Control Input. Varying VCNTL between 0 and 2V varies the DPWM duty cycle (brightness)
between 10% (minimum) and 100% (maximum). The brightness remains at maximum for VCNTL greater
than 2V.
6
DPWM
Dual-Function DPWM Signal Pin. The DPWM pin can be used either as the DPWM signal output or as a
low-frequency sync input. See the Digital PWM Dimming Control and Digital PWM Frequency Setting
sections.
7
SYNC
DPWM High-Frequency Sync Input. The DPWM chopping frequency can be synchronized to an external
high-frequency signal by connecting FREQ to VCC and SYNC to the external signal source. The DPWM
chopping frequency is 1/128 of the frequency of the external signal.
8
FREQ
DPWM Frequency Dual-Mode Adjustment Pin. Connect a resistor from FREQ to GND to set the DPWM
frequency. Connect FREQ to VCC to set DPWM frequency using SYNC.
fDPWM = 209Hz x 169kΩ / RFREQ
9
COMP
Transconductance Error-Amplifier Output. A compensation capacitor connected between COMP and GND
sets the rise and fall time of the lamp current in DPWM operation.
10
IFB
Lamp-Current Feedback Input. The average voltage on IFB is regulated to 0.8V by controlling the on-time
of high-side switches. If VIFB falls below 0.6V for a period longer than the timeout period set by TFLT, the
MAX8722 activates the fault latch.
VFB
Transformer Secondary Voltage Feedback Input. A capacitive voltage-divider between the high-voltage
terminal of the CCFL tube and GND sets the maximum average lamp voltage during lamp strike and openlamp conditions. When the average voltage on VFB exceeds the internal overvoltage threshold, the
controller turns on an internal current sink discharging the COMP capacitor.
12
ISEC
Transformer Secondary Current Feedback Input. A current-sense resistor connected between the lowvoltage end of the transformer secondary and ground sets the maximum secondary current during faults.
When the average voltage on ISEC exceeds the internal overcurrent threshold, the controller turns on an
internal current sink discharging the COMP capacitor.
13
GH2
High-Side MOSFET NH2 Gate-Driver Output
14
LX2
GH2 Gate-Driver Return. LX2 is the input to the current-limit and zero-crossing comparators. The device
senses the voltage across the low-side MOSFET NL2 to detect primary current zero-crossing and primary
overcurrent.
15
BST2
GH2 Gate-Driver Supply Input. Connect a 0.1µF capacitor from LX2 to BST2 and a diode from VDD to BST2
to form a bootstrap circuit.
16
BST1
GH1 Gate-Driver Supply Input. Connect a 0.1µF capacitor from LX1 to BST1 and a diode from VDD to BST1
to form a bootstrap circuit.
17
LX1
11
FUNCTION
GH1 Gate-Driver Return. LX1 is the input to the current-limit and zero-crossing comparators. The device
senses the voltage across the low-side MOSFET NL1 to detect primary current zero-crossing and primary
overcurrent.
_______________________________________________________________________________________
9
MAX8722
Pin Description
MAX8722
Low-Cost CCFL Backlight Controller
Pin Description (continued)
PIN
NAME
18
GH1
High-Side MOSFET NH1 Gate-Driver Output
19
GL1
Low-Side MOSFET NL1 Gate-Driver Output
20
GL2
Low-Side MOSFET NL2 Gate-Driver Output
21
PGND
22
VDD
Low-Side Gate-Driver Supply Input. Connect VDD to the output of the internal linear regulator (VCC). Bypass
VDD with a 0.1µF capacitor to PGND.
23
VCC
5.3V/10mA Internal Linear-Regulator Output. VCC is the supply voltage for the device. Bypass VCC with a
1µF ceramic capacitor to GND.
24
GND
Analog Ground. The ground return for VCC, REF, and other analog circuitry. Connect GND to PGND under
the IC at the IC’s backside exposed metal pad.
VIN
FUNCTION
Power Ground. PGND is the return for the GL1 and GL2 gate drivers.
F1
C1
4.7µF
25V
VCC
2A
GND
VDD
C8
0.1µF
GND
MAX8722
D1
VCC
C9
0.47µF
C7
0.47µF
BATT
VCC
BST2
BST1
R4
100kΩ
GH1
ILIM
NH1
NH2
C2
1µF
C6
0.1µF
R5
200kΩ
LX2
CCFL
T1
LX1
C5
0.1µF
FREQ
R6
169kΩ
1%
NL1
GL1
NL2
C3
18pF
3kV
PGND
ON/OFF
SHDN
GL2
BRIGHTNESS
GH2
CNTL
SYNC
VFB
ISEC
SYNC
IFB
COMP
DPWM
DPWM
TFLT
C11
0.22µF
C10
0.01µF
R3
40.2Ω
1%
C4
15nF
Figure 1. Typical Operating Circuit of the MAX8722
10
______________________________________________________________________________________
R1
150Ω
1%
Low-Cost CCFL Backlight Controller
MAX8722
BIAS
SUPPLY
EN
LINEAR
REGULATOR
BATT
SHDN
GND
MAX8722
FLT
BST1
VCC
OVERVOLTAGE
COMPARATOR
RAMP
UVLO
4.2V
2.3V
GH1
UVLO
COMPARATOR
LX1
BST2
OVERCURRENT
VFB
COMP
PWM
COMPARATOR
400µA
100µA
GATE-DRIVER
CONTROL
STATE
MACHINE
PWM CONTROL
LOGIC
GH2
LX2
VDD
GL1
PGND
IFB
PRIMARY
OVERCURRENT
AND ZEROCROSSING
F.W. RECT
800mV
FREQ
DPWM
GL2
ERROR
AMPLIFIER
DPWM OSCILLATOR
AND DIMMING
CONTROL LOGIC
SYNC
MUX
ILIM
CNTL
OPEN-LAMP
COMPARATOR
600mV
ISEC
H.W. RECT
OVERCURRENT
FAULT DELAY
BLOCK
FAULT
LATCH
S
SHDN
1.25V
TFLT
SECONDARY
OVERCURRENT
COMPARATOR
UVLO
Q
RESET
FLT
R
Figure 2. MAX8722 Functional Diagram
______________________________________________________________________________________
11
MAX8722
Low-Cost CCFL Backlight Controller
Typical Operating Circuit
The typical operating circuit of the MAX8722 (Figure 1)
is a complete CCFL backlight inverter for TFT-LCD panels. The input voltage range of the circuit is from 8V to
24V. The maximum RMS lamp current is set to 6mA,
and the maximum RMS striking voltage is set to 1600V.
Table 1 lists some important components, and Table 2
lists the component suppliers’ contact information.
Detailed Description
The MAX8722 controls a full-bridge resonant inverter to
convert an unregulated DC input into a near-sinusoidal,
high-frequency AC output for powering CCFLs. The
lamp brightness is adjusted by turning the lamp on and
off with a digital pulse-width-modulation (DPWM) signal. The brightness of the lamp is proportional to the
Table 1. List of Important Components
DESIGNATION
DESCRIPTION
C1
4.7µF ±20%, 25V X5R ceramic capacitor
Murata GRM32RR61E475K
Taiyo Yuden TMK325BJ475MN
TDK C3225X7R1E475M
C2
1µF ±10%, 25V X7R ceramic capacitor
C3
18pF ±1pF, 3kV, high-voltage ceramic
capacitor
Murata GRM42D1X3F180J
TDK C4520C0G3F180F
D1
Dual silicon switching diode, common
anode, SOT-323
Central Semiconductor CMSD2836
Diodes, Inc. BAW56W
NH1/2, NL1/2
Dual n-channel MOSFETs, 30V, 0.095,
SOT23-6
Fairchild FDC6561AN
T1
CCFL transformer, 1:93 turns ratio
TOKO T912MG-1018
Table 2. Component Suppliers
SUPPLIER
WEBSITE
Central Semiconductor
www.centralsemi.com
Diodes Inc.
www.diodes.com
Fairchild Semiconductor
www.fairchildsemi.com
Murata
www.murata.com
Sumida
www.sumida.com
Taiyo Yuden
www.t-yuden.com
TDK
www.components.tdk.com
TOKO
www.tokoam.com
12
duty cycle of the DPWM signal, which is set through an
analog voltage on the CNTL pin. Figure 2 shows the
functional diagram of the MAX8722.
Resonant Operation
The MAX8722 drives the four n-channel power
MOSFETs that make up the zero-voltage-switching
(ZVS) full-bridge inverter as shown in Figure 3. Assume
that NH1 and NL2 are turned on at the beginning of a
switching cycle as shown in Figure 3(a). The primary
current flows through MOSFET NH1, DC blocking
capacitor C2, the primary side of transformer T1, and
MOSFET NL2. During this interval, the primary current
ramps up until the controller turns off NH1. When NH1
turns off, the primary current forward biases the body
diode of NL1, which clamps the LX1 voltage just below
ground as shown in Figure 3(b). When the controller
turns on NL1, its drain-to-source voltage is near zero
because its forward-biased body diode clamps the
drain. Since NL2 is still on, the primary current flows
through NL1, C2, the primary side of T1, and NL2.
Once the primary current drops to the minimum current
threshold (6mV/RDS(ON)), the controller turns off NL2.
The remaining energy in T1 charges up the LX2 node
until the body diode of NH2 is forward biased. When
NH2 turns on, it does so with near-zero drain-to-source
voltage. The primary current reverses polarity as shown
in Figure 3(c), beginning a new cycle with the current
flowing in the opposite direction, with NH2 and NL1 on.
The primary current ramps up until the controller turns
off NH2. When NH2 turns off, the primary current forward biases the body diode of NL2, which clamps the
LX2 voltage just below ground as shown in Figure 3(d).
After the LX2 node goes low, the controller losslessly
turns on NL2. Once the primary current drops to the
minimum current threshold, the controller turns off NL1.
The remaining energy charges up the LX1 node until
the body diode of NH1 is forward biased. Finally, NH1
losslessly turns on, beginning a new cycle as shown in
Figure 3(a). Note that switching transitions on all four
power MOSFETs occur under ZVS condition, which
reduces transient power losses and EMI.
A simplified CCFL inverter circuit is shown in Figure
4(a). The full-bridge power stage is simplified and represented as a square-wave AC source. The resonant
tank circuit can be further simplified to Figure 4(b) by
removing the transformer. CS is the primary series
capacitor, C’S is the series capacitance reflected to the
secondary, CP is the secondary parallel capacitor, N is
the transformer turns ratio, L is the transformer secondary leakage inductance, and RL is an idealized
resistance that models the CCFL in normal operation.
______________________________________________________________________________________
Low-Cost CCFL Backlight Controller
MAX8722
VBATT
VBATT
NH1
ON
NH2
OFF
NH1
OFF
NH2
ON
T1
T1
C2
C2
LX1
LX2
NL1
OFF
LX1
NL2
ON
LX2
NL1
ON
NL2
OFF
(a)
(c)
VBATT
VBATT
NH1
OFF
NH2
OFF
NH1
OFF
NH2
OFF
T1
T1
C2
C2
LX1
LX2
NL1
ON
LX1
NL2
ON
LX2
NL1
ON
NL2
ON
(BODY DIODE TURNS ON FIRST)
(BODY DIODE TURNS ON FIRST)
(b)
(d)
Figure 3. Resonant Operation
______________________________________________________________________________________
13
MAX8722
Low-Cost CCFL Backlight Controller
CS
L
1:N
4
AC
SOURCE
CCFL
fP
VOLTAGE GAIN (V/V)
CP
(a)
C
C'S = S2
N
L
3
RL INCREASING
2
fS
1
0
AC
SOURCE
CP
RL
0
20
40
60
80
100
FREQUENCY (kHz)
(b)
Figure 4. Equivalent Resonant Tank Circuit
Figure 5. Frequency Response of the Resonant Tank
Figure 5 shows the frequency response of the resonant
tank’s voltage gain under different load conditions.
The primary series capacitor is 1µF, the secondary parallel capacitor is 15pF, the transformer turns ratio is
1:93, and the secondary leakage inductance is 260mH.
Notice that there are two peaks, fS and fP, in the frequency response. The first peak, fS, is the series resonant peak determined by the secondary leakage
inductance (L) and the series capacitor reflected to the
secondary (C’S):
displays the characteristics of a parallel-loaded resonant
converter. While in parallel-loaded resonant operation,
the inverter behaves like a voltage source to generate
the necessary striking voltage. Theoretically, the output
voltage of the resonant converter will increase until the
lamp is ionized or until it reaches the IC’s secondary voltage limit, without regard to the transformer turns ratio or
the input voltage level. Once the lamp is ionized, the
equivalent load resistance decreases rapidly and the
operating point moves toward the series resonant peak.
While in series resonant operation, the inverter behaves
like a current source.
1
fS =
2π LC'S
The second peak, fP , is the parallel resonant peak
determined by the secondary leakage inductance (L),
the parallel capacitor (CP), and the series capacitor
reflected to the secondary (C’S):
1
fP =
2π L
C'S CP
C'S + CP
The inverter is designed to operate between these two
resonant peaks. When the lamp is off, the operating
point of the resonant tank is close to the parallel resonant
peak due to the lamp’s infinite impedance. The circuit
14
Lamp-Current Regulation
The MAX8722 uses a lamp-current control loop to regulate the current delivered to the CCFL. The heart of the
control loop is a transconductance error amplifier. The
AC lamp current is sensed with a resistor connected in
series with the low-voltage terminal of the lamp. The
voltage across this resistor is fed to the IFB input and is
internally full-wave rectified. The transconductance
error amplifier compares the rectified IFB voltage with a
790mV (typ) internal threshold to generate an error current. The error current charges and discharges a
capacitor connected between COMP and ground to
create an error voltage (VCOMP). VCOMP is then compared with an internal ramp signal to set the high-side
MOSFET switch on-time (tON).
______________________________________________________________________________________
Low-Cost CCFL Backlight Controller
Feed-Forward Control and
Dropout Operation
The MAX8722 is designed to maintain tight control of
the lamp current under all transient conditions. The
feed-forward control instantaneously adjusts the ontime for changes in input voltage (VBATT). This feature
provides immunity to input-voltage variations and simplifies loop compensation over wide input voltage
ranges. The feed-forward control also improves the line
Digital PWM Dimming Control
The MAX8722 controls the brightness of the CCFL by
chopping the lamp current on and off using a low-frequency (between 100Hz and 350Hz) digital PWM signal either from the internal oscillator or from an external
signal source. The CCFL brightness is proportional to
the digital PWM duty cycle, which can be adjusted from
9.375% to 100% by the CNTL pin. CNTL is an analog
input with a usable input voltage range between 0 and
2000mV, which is digitized to select one of 128 brightness levels. As shown in Figure 6, the MAX8722
ignores the first twelve steps, so the first twelve steps
all represent the same brightness. When V CNTL is
between 0 and 187.5mV, the digital PWM duty cycle is
always 9.375%. When V CNTL is above 187.5mV, a
15.625mV change on CNTL results in a 0.78125%
change in the digital PWM duty cycle. When VCNTL is
equal to or above 2000mV, the digital PWM duty cycle
is always 100%.
100
90
80
BRIGHTNESS (%)
Lamp Startup
A CCFL is a gas discharge lamp that is normally driven
in the avalanche mode. To start ionization in a nonionized lamp, the applied voltage (striking voltage) must
be increased to the level required for the start of
avalanche. At low temperatures, the striking voltage
can be several times the typical operating voltage.
Because of the MAX8722’s resonant topology, the striking voltage is guaranteed. Before the lamp is ionized, the
lamp impedance is infinite. The transformer secondary
leakage inductance and the high-voltage parallel capacitor determine the unloaded resonant frequency. Since
the unloaded resonant circuit has a high Q, it can generate very high voltages across the lamp.
Upon power-up, two soft-start features acting together
smooth the startup behavior. First, VCOMP slowly rises,
increasing the duty cycle of the high-side MOSFET
switches and providing a measure of soft-start.
Second, the MAX8722 charges VFB to the overvoltage
threshold (2.3V typ) immediately after the device is
enabled. The DC voltage on VFB is gradually discharged through an internal 300kΩ (typ) resistor during
startup. This feature is equivalent to slowly raising the
overvoltage threshold during startup, so it further
improves the soft-start behavior.
regulation for short on-times and makes startup transients less dependent on the input voltage.
Feed-forward control is implemented by increasing
the internal voltage ramp rate for higher VBATT. This
has the effect of varying t ON as a function of the input voltage while maintaining approximately the same
signal levels at V COMP . Since the required voltage
change across the compensation capacitor is minimal,
the controller’s response to input voltage changes is
essentially instantaneous.
60
70
50
40
30
20
10
0
0
400
800
1200
1600
2000
CONTROL VOLTAGE (mV)
Figure 6. Theoretical Brightness vs. Control Voltage
______________________________________________________________________________________
15
MAX8722
Transformer Secondary Voltage Limiting
The MAX8722 reduces the voltage stress on the transformer’s secondary winding by limiting the secondary
voltage during startup and open-lamp faults. The AC
voltage across the transformer secondary winding is
sensed through a capacitive voltage-divider. The small
voltage across the larger capacitor of the divider is fed
to the VFB input and is internally half-wave rectified. An
overvoltage comparator compares the VFB voltage with
a 2.3V (typ) internal threshold. Once the sense voltage
exceeds the overvoltage threshold, the MAX8722 turns
on a 400µA current source that discharges the COMP
capacitor. The high-side MOSFET on-time shortens as
the COMP voltage decreases, reducing the transformer
secondary’s peak voltage below the threshold set by
the capacitive voltage-divider.
MAX8722
Low-Cost CCFL Backlight Controller
In digital PWM operation, COMP controls the rise and
fall time of the lamp-current envelope. At the beginning
of the digital PWM on-cycle, VCOMP rises linearly, gradually increasing tON, which provides soft-start. At the
end of the digital PWM on-cycle, the COMP capacitor
discharges linearly, gradually decreasing tON and providing soft-stop.
3) The digital PWM frequency can be synchronized to
an external low-frequency signal. To enable this
mode, connect SYNC to V CC , connect FREQ to
GND through a 100kΩ resistor, and connect DPWM
to the external low-frequency signal. The digital
PWM frequency and duty cycle are equal to those
of the external signal.
Digital PWM Frequency Setting
The frequency range of the external signal is between
100Hz and 350Hz. In this mode, the brightness control
input CNTL is disabled, and the brightness is proportional to the duty cycle of the external signal.
Table 3 summarizes the three ways of setting the digital
PWM frequency.
There are three ways to set the digital PWM frequency.
1) The digital PWM frequency can be set with an
external resistor. Connect SYNC to GND and connect a resistor between FREQ and GND. The digital
PWM frequency is given by the following equation:
UVLO
fDPWM = 209Hz × 169kΩ / RFREQ
The adjustable range of the digital PWM frequency
is between 100Hz and 350Hz (RFREQ is between
353kΩ and 101kΩ). CNTL controls the digital PWM
duty cycle.
2) The digital PWM frequency can be clocked by an
external high-frequency signal. Connect FREQ to
VCC and connect SYNC to the external high-frequency signal. The digital PWM frequency is 1/128
of the frequency of the external signal:
fDPWM =
The MAX8722 includes an undervoltage-lockout
(UVLO) circuit. The UVLO circuit monitors the VCC voltage. When VCC is below 4.2V (typ), the MAX8722 disables both high-side and low-side MOSFET drivers and
resets the fault latch.
Low-Power Shutdown
When the MAX8722 is placed in shutdown, all functions
of the IC are turned off except for the 5.4V linear regulator. In shutdown, the linear-regulator output voltage
drops to about 4.5V and the supply current is 6µA (typ).
While in shutdown, the fault latch is reset. The device
can be placed into shutdown by pulling SHDN to its
logic-low level.
fEXT
Lamp-Out Protection
128
where fEXT is the frequency of the external signal.
The frequency range of the external signal should
be between 13kHz and 45kHz, resulting in a digital
PWM frequency range between 100Hz and 350Hz.
CNTL controls the DPWM duty cycle.
For safety, the MAX8722 monitors the lamp-current
feedback (IFB) to detect faulty or open CCFL tubes and
secondary short circuits in the lamp and IFB sense
resistor. As described in the Lamp-Current Regulation
section, the voltage on IFB is internally full-wave rectified. If the rectified IFB voltage is below 600mV, the
MAX8722 charges the TFLT capacitor with 1µA. The
Table 3. Digital PWM Frequency Setting
FREQ
SYNC
DPWM
DIGITAL PWM
FREQUENCY/DUTY CYCLE
Connect FREQ to GND
through an external resistor.
Connect SYNC to GND.
DPWM is used as the digital PWM
signal output.
The resistor value sets the frequency.
CNTL controls the duty cycle.
Connect FREQ to VCC.
Connect SYNC to an
external high-frequency
signal.
DPWM is used as the digital PWM
signal output.
The frequency is 1/128 of the
frequency of the external signal. CNTL
controls the duty cycle.
Connect FREQ to GND
through a 100kΩ resistor.
Connect SYNC to VCC.
Connect DPWM to an external
low-frequency signal.
The frequency and duty cycle are
equal to those of the external signal.
16
______________________________________________________________________________________
Low-Cost CCFL Backlight Controller
During the delay period, the current control loop tries to
maintain lamp-current regulation by increasing the
high-side MOSFET on-time. Because the open-circuit
lamp impedance is very high, the transformer secondary voltage rises as a result of the high Q-factor of
the resonant tank. Once the secondary voltage
exceeds the overvoltage threshold, the MAX8722 turns
on a 400µA current source that discharges the COMP
capacitor. The on-time of the high-side MOSFET is
reduced, lowering the secondary voltage, as the COMP
voltage decreases. Therefore, the peak voltage of the
transformer secondary winding never exceeds the limit
set by a capacitive voltage-divider during the lamp-out
delay period.
Primary Overcurrent Protection (ILIM)
The MAX8722 senses transformer primary current in
each switching cycle. When the regulator turns on the
low-side MOSFET, a comparator monitors the voltage
drop from LX_ to GND. If the voltage exceeds the current-limit threshold, the regulator turns off the high-side
switch at the opposite side of the primary to prevent
further increasing the transformer primary current.
The current-limit threshold can be adjusted using the
ILIM input. Connect a resistive voltage-divider between
VCC and GND with the midpoint connected to ILIM. The
current-limit threshold measured between LX_ and
GND is 1/5 of the voltage at ILIM. The ILIM adjustment
range is 0 to 3V. Connect ILIM to VCC to select the
default current-limit threshold of 0.2V.
Secondary Current Limit (ISEC)
The secondary current limit provides fail-safe current
limiting in case a failure, such as a short circuit or leakage from the lamp high-voltage terminal to ground, prevents the current control loop from functioning properly.
ISEC monitors the voltage across a sense resistor
placed between the transformer’s low-voltage secondary terminal and ground. The ISEC voltage is internally half-wave rectified and continuously compared to
the ISEC regulation threshold (1.25V typ). Any time the
ISEC voltage exceeds the threshold, a controlled current is drawn from COMP to reduce the on-time of the
bridge’s high-side switches. At the same time, the
MAX8722 charges the TFLT capacitor with a 116µA current source. The MAX8722 latches off when the voltage
on TFLT exceeds 4V. Unlike the normal shutdown
mode, the linear-regulator output (VCC) remains at 5.3V.
Toggling SHDN or cycling the input power reactivates
the device.
Linear-Regulator Output (VCC)
The internal linear regulator steps down the DC input
voltage to 5.4V (typ). The linear regulator supplies
power to the internal control circuitry of the MAX8722
and is also used to power the MOSFET drivers by connecting VCC to VDD. The VCC voltage drops to 4.5V in
shutdown.
Applications Information
MOSFETs
The MAX8722 requires four external n-channel power
MOSFETs NL1, NL2, NH1, and NH2 to form a fullbridge inverter circuit to drive the transformer primary.
The regulator senses the on-state drain-to-source voltage of the two low-side MOSFETs NL1 and NL2 to
detect the transformer primary current, so the RDS(ON)
of NL1 and NL2 should be matched. For instance, if
dual MOSFETs are used to form the full bridge, NL1
and NL2 should be in one package. Since the
MAX8722 uses the low-side MOSFET RDS(ON) for primary overcurrent protection, the lower the MOSFET
RDS(ON), the higher the current limit. Therefore, the
user should select a dual, logic-level n-channel
MOSFET with low RDS(ON) to minimize conduction loss,
and keep the primary current limit at a reasonable level.
The regulator uses zero-voltage switching (ZVS) to softly turn on each of the four switches in the full bridge.
ZVS occurs when the external power MOSFETs are
turned on when their respective drain-to-source voltages are near 0V (see the Resonant Operation section).
ZVS effectively eliminates the instantaneous turn-on
loss of MOSFETs caused by C OSS (drain-to-source
capacitance) and parasitic capacitance discharge, and
improves efficiency and reduces switching-related EMI.
Setting the Lamp Current
The MAX8722 senses the lamp current flowing through
resistor R1 (Figure 1) connected between the low-voltage terminal of the lamp and ground. The voltage
across R1 is fed to IFB and is internally full-wave rectified. The MAX8722 controls the desired lamp current
by regulating the average of the rectified IFB voltage.
To set the RMS lamp current, determine R1 as follows:
R1 =
π × 790mV
2 2 × ILAMP(RMS)
where ILAMP(RMS) is the desired RMS lamp current and
790mV is the typical value of the IFB regulation point
______________________________________________________________________________________
17
MAX8722
MAX8722 latches off if the voltage on TFLT exceeds
4V. Unlike the normal shutdown mode, the linear-regulator output (VCC) remains at 5.4V. Toggling SHDN or
cycling the input power reactivates the device.
MAX8722
Low-Cost CCFL Backlight Controller
specified in the Electrical Characteristics table. To set
the RMS lamp current to 6mA, the value of R1 should
be 148Ω. The closest standard 1% resistors are 147Ω
and 150Ω. The precise shape of the lamp-current
waveform, which is dependent on lamp parasitics, influences the actual RMS lamp current. Use a true RMS
current meter connected between the R1/IFB junction
and the low-voltage side of the lamp to make final
adjustments to R1.
Setting the Secondary Voltage Limit
The MAX8722 limits the transformer secondary voltage
during startup and lamp-out faults. The secondary voltage is sensed through the capacitive voltage-divider
formed by C3 and C4 (Figure 1). The voltage on VFB is
proportional to the CCFL voltage. The selection of
the parallel resonant capacitor C3 is described in
the Transformer Design and Resonant Component
Selection section. C3 is usually between 10pF and
22pF. After the value of C3 is determined, select C4
using the following equation to set the desired maximum RMS secondary voltage VLAMP(RMS)_MAX:
C4 =
2 × VLAMP(RMS)_ MAX
2.3V
× C3
where 2.3V is the typical value of the VFB overvoltage
threshold specified in the Electrical Characteristics table.
To set the maximum RMS secondary voltage to 1600V
using 18pF for C3, use approximately 15nF for C4.
Setting the Secondary Current Limit
The MAX8722 limits the secondary current even if the
IFB sense resistor (R1) is shorted or transformer secondary current finds its way to ground without passing
through R1. ISEC monitors the voltage across the
sense resistor R3, connected between the low-voltage
terminal of the transformer secondary winding and
ground. Determine the value of R3 using the following
equation:
R3 =
1.217V
2 × ISEC(RMS)_ MAX
where ISEC(RMS)_MAX is the desired maximum RMS
transformer secondary current during fault conditions,
and 1.217V is the typical value of the ISEC regulation
point specified in the Electrical Characteristics table. To
set the maximum RMS secondary current in the circuit
of Figure 1 to 22mA, use approximately 40.2Ω for R3.
18
Transformer Design and Resonant
Component Selection
The transformer is the most important component of the
resonant tank circuit. The first step in designing the
transformer is to determine the turns ratio (N). The ratio
must be high enough to support the CCFL operating
voltage at the minimum supply voltage. N can be calculated as follows:
N ≥
VLAMP(RMS)
0.9 × VIN(MIN)
where VLAMP(RMS) is the maximum RMS lamp voltage
in normal operation, and VIN(MIN) is the minimum DC
input voltage. If the maximum RMS lamp voltage in normal operation is 650V and the minimum DC input voltage is 8V, the turns ratio should be greater than 90. The
turns ratio of the transformer used in the circuit of
Figure 1 is 93.
The next step in the design procedure is to determine
the desired operating frequency range. The MAX8722
is synchronized to the natural resonant frequency of the
resonant tank. The resonant frequency changes with
operating conditions, such as the input voltage, lamp
impedance, etc.; therefore, the switching frequency
varies over a certain range. To ensure reliable operation, the resonant frequency range must be within the
operating frequency range specified by the CCFL
transformer manufacturer. As discussed in the
Resonant Operation section, the resonant frequency
range is determined by the transformer secondary leakage inductance L, the primary series DC blocking
capacitor C2, and the secondary parallel resonant
capacitor C3. Since it is difficult to control the transformer leakage inductance, the resonant tank design
should be based on the existing secondary leakage
inductance of the selected CCFL transformer. Leakageinductance values can have large tolerance and significant variations among different batches, so it is best to
work directly with transformer vendors on leakageinductance requirements. The MAX8722 works best
when the secondary leakage inductance is between
250mH and 350mH. The series capacitor C2 sets the
minimum operating frequency, which is approximately
two times the series resonant peak frequency. Choose:
C2 ≤
N2
2
π 2 × fMIN
× L
______________________________________________________________________________________
Low-Cost CCFL Backlight Controller
C3 ≥
C2
(4π 2 × fMAX 2 × L × C2) − N2
In the circuit of Figure 1, to set the maximum operating
frequency to 65kHz, use 18pF for C3.
The transformer core saturation should also be considered when selecting the operating frequency. The primary winding should have enough turns to prevent
transformer saturation under all operating conditions.
Use the following expression to calculate the minimum
number of turns N1 of the primary winding:
N1 >
DMAX × VIN(MAX)
BS × S × fMIN
where DMAX is the maximum duty cycle (approximately
0.8) of the high-side switches, VIN(MAX) is the maximum
DC input voltage, BS is the saturation flux density of the
core, and S is the minimal cross-section area of the core.
COMP Capacitor Selection
The COMP capacitor sets the speed of the current loop
that is used during startup, while maintaining lamp current regulation, and during transients caused by
changing the input voltage. The typical COMP capacitor value is 0.01µF. Larger values increase the transient-response delays. Smaller values speed up
transient response, but extremely small values can
cause loop instability.
Other Components
The external bootstrap circuits formed by D1 and
C5/C6 in Figure 1 power the high-side MOSFET drivers.
Connect VDD to BST1/BST2 through dual-diode D1 and
couple BST1/BST2 to LX1/LX2 through C5 and C6. C5
= C6 = 0.1µF or greater.
Layout Guidelines
Careful PC board layout is important to achieve stable
operation. The high-voltage section and the switching
section of the circuit require particular attention. The
high-voltage sections of the layout need to be well separated from the control circuit. Most layouts for singlelamp notebook displays are constrained to long and
narrow form factors, so this separation occurs naturally.
Follow these guidelines for good PC board layout:
1) Keep the high-current paths short and wide, especially at the ground terminals. This is essential for
stable, jitter-free operation and high efficiency.
2) Use a star-ground configuration for power and analog grounds. The power and analog grounds
should be completely isolated—meeting only at the
center of the star. The center should be placed at
the analog ground pin (GND). Using separate copper islands for these grounds may simplify this task.
Quiet analog ground is used for V CC , COMP,
FREQ, TFLT, and ILIM (if a resistive voltage-divider
is used).
3) Route high-speed switching nodes away from sensitive analog areas (VCC, COMP, FREQ, TFLT, and
ILIM). Make all pin-strap control input connections
(ILIM, etc.) to analog ground or V CC rather than
power ground or VDD.
4) Mount the decoupling capacitor from VCC to GND
as close as possible to the IC with dedicated traces
that are not shared with other signal paths.
5) The current-sense paths for LX1 and LX2 to GND
must be made using Kelvin sense connections to
guarantee the current-limit accuracy.
6) Ensure the feedback connections are short and
direct. To the extent possible, IFB, VFB, and ISEC
connections should be far away from the high-voltage traces and the transformer.
7) To the extent possible, high-voltage trace clearance
on the transformer’s secondary should be widely
separated. The high-voltage traces should also be
separated from adjacent ground planes to prevent
lossy capacitive coupling.
8) The traces to the capacitive voltage-divider on the
transformer’s secondary need to be widely separated
to prevent arcing. Moving these traces to opposite
sides of the board can be beneficial in some cases.
Chip Information
TRANSISTOR COUNT: 2985
PROCESS: BiCMOS
______________________________________________________________________________________
19
MAX8722
where fMIN is the minimum operating frequency range.
In the circuit of Figure 1, the transformer’s turns ratio is
93 and its secondary leakage inductance is approximately 300mH. To set the minimum operating frequency to 45kHz, use 1µF for C2.
The parallel capacitor C3 sets the maximum operating
frequency, which is also the parallel resonant peak frequency. Choose C3 with the following equation:
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
QSOP.EPS
MAX8722
Low-Cost CCFL Backlight Controller
PACKAGE OUTLINE, QSOP .150", .025" LEAD PITCH
21-0055
E
1
1
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
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© 2004 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.