PHILIPS 74LVC138A

INTEGRATED CIRCUITS
74LVC138A
3-to-8 line decoder/demultiplexer;
inverting
Product specification
1998 Apr 28
Philips Semiconductors
Product specification
3-to-8 line decoder/demultiplexer; inverting
FEATURES
74LVC138A
DESCRIPTION
• Wide supply voltage range of 1.2 to 3.6 V
• In accordance with JEDEC standard no. 8-1A
• Inputs accept voltages up to 5.5 V
• CMOS lower power consumption
• Direct interface with TTL levels
• Demultiplexing capability
• Multiple input enable for easy expansion
• Ideal for memory chip select decoding
• Active LOW mutually exclusive outputs
• Output drive capability 50 transmission lines at 85°C
The 74LVC138A is a low-voltage, low-power, high-performance
Si-gate CMOS device, superior to most advanced CMOS
compatible TTL families.
The 74LVC138A accepts three binary weighted address inputs (A0,
A1, A2) and when enabled, provides 8 mutually exclusive active
LOW outputs (Y0 to Y7).
The 74LVC138A features three enable inputs: two active LOW (E1
and E2) and one active HIGH (E3). Every output will be HIGH unless
E1 and E2 are LOW and E3 is HIGH.
This multiple enable function allows easy parallel expansion of the
74LV138A to a 1-of-32 (5 lines to 32 lines) decoder with just four
74LV138A ICs and one inverter. The 74LV138A can be used as an
eight output demultiplexer by using one of the active LOW enable
inputs as the data input and the remaining enable inputs as strobes.
Unused enable inputs must be permanently tied to their appropriate
active HIGH or LOW state.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25°C; tr = tf ≤ 2.5 ns
PARAMETER
SYMBOL
tPHL/tPLH
Propagation delay
An to Yn,
E3 to Yn, En to Yn
CI
Input capacitance
Power dissipation capacitance per
package
CPD
CONDITIONS
TYPICAL
UNIT
3.5
3.5
ns
5.0
pF
44
pF
CL = 50 pF;
VCC = 3.3 V
VCC = 3.3 V
Notes 1 and 2
NOTES:
1. CPD is used to determine the dynamic power dissipation (PD in µW)
PD = CPD × VCC2 × fi (CL × VCC2 × fo) where:
fi = input frequency in MHz; CL = output load capacity in pF;
fo = output frequency in MHz; VCC = supply voltage in V;
(CL × VCC2 × fo) = sum of the outputs.
2. The condition is VI = GND to VCC
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
PKG. DWG. #
16-Pin Plastic SO
–40°C to +85°C
74LVC138A D
74LVC138A D
SOT109-1
16-Pin Plastic SSOP Type II
–40°C to +85°C
74LVC138A DB
74LVC138A DB
SOT338-1
16-Pin Plastic TSSOP Type I
–40°C to +85°C
74LVC138A PW
74LVC138APW DH
SOT403-1
PIN CONFIGURATION
A0
1
LOGIC DIAGRAM
16
VCC
A1
2
15
Y0
A2
3
14
Y0
E1
4
13
Y0
E2
5
12
Y0
E3
6
11
Y0
7
10
Y0
GND 8
9
Y0
Y7
A0
Y0
15
2
A1
Y1
14
3
A2
Y2
13
Y3
12
Y4
11
4
5
6
SV00553
1998 Apr 28
1
E1
E2
E3
Y5
10
Y6
9
Y7
7
SV00554
2
853–1943 19308
Philips Semiconductors
Product specification
3-to-8 line decoder/demultiplexer; inverting
PIN DESCRIPTION
PIN NUMBER
74LVC138A
FUNCTIONAL DIAGRAM
SYMBOL
NAME AND FUNCTION
1, 2, 3
A0 to A2
Address inputs
4, 5
E1, E2
Enable inputs (active LOW)
6
E3
Enable inputs (active HIGH)
1
A1
2
A2
3
A3
Y0
15
Y1
14
Y2
13
Y3
12
Y4
11
15, 14, 13, 12,
Y0 to Y7
11, 10, 9, 7
Outputs
8
GND
Ground (0 V)
Y5
10
16
VCC
Positive supply voltage
Y6
9
Y7
7
3-to-8
DECODER
ENABLE
EXITING
LOGIC SYMBOL (IEEE/IEC)
DX
1
0
2
3
4
2
&
5
6
X/Y
0
15
1
14
1
1
2
13
2
2
3
12
3
4
4
11
5
10
6
9
7
7
4
5
&
E1
15
5
E2
1
14
6
E3
2
13
3
12
4
11
5
10
EN 6
9
7
7
6
(a)
4
0
SV00556
(b)
SV00555
FUNCTION TABLE
INPUTS
OUTPUTS
E1
E2
E3
A0
A1
A2
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
H
X
X
X
X
X
H
H
H
H
H
H
H
H
X
H
X
X
X
X
H
H
H
H
H
H
H
H
X
X
L
X
X
X
H
H
H
H
H
H
H
H
L
L
H
L
L
L
L
H
H
H
H
H
H
H
L
L
H
H
L
L
H
L
H
H
H
H
H
H
L
L
H
L
H
L
H
H
L
H
H
H
H
H
L
L
H
H
H
L
H
H
H
L
H
H
H
H
L
L
H
L
L
H
H
H
H
H
L
H
H
H
L
L
H
H
L
H
H
H
H
H
H
L
H
H
L
L
H
L
H
H
H
H
H
H
H
H
L
H
L
L
H
H
H
H
H
H
H
H
H
H
H
L
NOTES:
H = HIGH voltage level
L = LOW voltage level
X = don’t care
1998 Apr 28
3
Philips Semiconductors
Product specification
3-to-8 line decoder/demultiplexer; inverting
74LVC138A
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
VCC
VI
VI/O
Tamb
tr, tf
PARAMETER
CONDITIONS
MIN
MAX
DC supply voltage (for max. speed performance)
2.7
3.6
DC supply voltage (for low-voltage applications)
1.2
3.6
UNIT
V
DC input voltage range
0
5.5
DC output voltage range; output HIGH or LOW state
0
VCC
DC input voltage range; output 3-State
0
5.5
–40
+85
°C
0
0
20
10
ns/V
Operating free-air temperature range
VCC = 1.2 to 2.7V
VCC = 2.7 to 3.6V
Input rise and fall times
V
V
ABSOLUTE MAXIMUM RATINGS1
In accordance with the Absolute Maximum Rating System (IEC 134).
Voltages are referenced to GND (ground = 0V).
SYMBOL
VCC
PARAMETER
CONDITIONS
DC supply voltage
RATING
UNIT
–0.5 to +6.5
V
IIK
DC input diode current
VI t 0
–50
mA
VI
DC input voltage
Note 2
–0.5 to +6.5
V
IOK
DC output diode current
VO uVCC or VO t 0
"50
mA
DC output voltage; output HIGH or LOW
Note 2
–0.5 to VCC +0.5
DC input voltage; output 3-State
Note 2
–0.5 to 6.5
DC output source or sink current
VO = 0 to VCC
VI/O
IO
IGND, ICC
Tstg
PTOT
DC VCC or GND current
Storage temperature range
Power dissipation per package
– plastic mini-pack (SO)
– plastic shrink mini-pack (SSOP and TSSOP)
above +70°C derate linearly with 8 mW/K
above +60°C derate linearly with 5.5 mW/K
V
"50
mA
"100
mA
–65 to +150
°C
500
500
mW
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
1998 Apr 28
4
Philips Semiconductors
Product specification
3-to-8 line decoder/demultiplexer; inverting
74LVC138A
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions. Voltages are referenced to GND (ground = 0V).
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Temp = -40°C to +85°C
TYP1
MIN
VIH
HIGH level input voltage
VIL
LOW level input voltage
VOH
O
VCC = 1.2V
VCC
VCC = 2.7 to 3.6V
2.0
V
VCC = 1.2V
GND
V
VCC = 2.7 to 3.6V
HIGH level output voltage
0.8
VCC = 2.7V; VI = VIH or VIL; IO = –12mA
VCC*0.5
VCC = 3.0V; VI = VIH or VIL; IO = –100µA
VCC*0.2
VCC = 3.0V; VI = VIH or VIL; IO = –12mA
VCC*0.6
VCC = 3.0V; VI = VIH or VIL; IO = –24mA
VCC*1.0
VCC
V
VCC = 2.7V; VI = VIH or VIL; IO = 12mA
VOL
LOW level output voltage
0.40
VCC = 3.0V; VI = VIH or VIL; IO = 100µA
GND
0.20
VCC = 3.0V; VI = VIH or VIL; IO = 24mA
II
ICC
∆ICC
UNIT
MAX
Input leakage current
VCC = 3
3.6V;
6V; VI = 5
5.5V
5V or GND
Quiescent supply current
VCC = 3.6V; VI = VCC or GND; IO = 0
Additional quiescent supply current per
input pin
VCC = 2.7V to 3.6V; VI = VCC –0.6V; IO = 0
V
0.55
"0 1
"0.1
"5
µA
0.1
10
µA
5
500
µA
NOTE:
1. All typical values are at VCC = 3.3V and Tamb = 25°C.
AC CHARACTERISTICS
GND = 0 V; tr = tf v 2.5 ns; CL = 50 pF; RL = 500; Tamb = –40C to +85C
LIMITS
SYMBOL
PARAMETER
VCC = 3.3V ±0.3V
WAVEFORM
VCC = 2.7V
MIN
TYP1
MAX
MIN
MAX
UNIT
tPHL/tPLH
Propagation delay
An to Yn
Figure 1, 3
1.5
3.5
5.8
1.5
6.8
ns
tPHL/tPLH
Propagation delay
E3 to Yn
Figure 1, 3
1.5
3.6
5.8
1.5
6.8
ns
tPHL/tPLH
Propagation delay
En to Yn
Figure 2, 3
1.5
3.5
5.8
1.5
6.8
ns
NOTE:
1. These typical values are at VCC = 3.3V and Tamb = 25°C.
1998 Apr 28
5
Philips Semiconductors
Product specification
3-to-8 line decoder/demultiplexer; inverting
AC WAVEFORMS
74LVC138A
TEST CIRCUIT
VM = 1.5 V at VCC 2.7 V
VM = 0.5 S VCC at VCC < 2.7 V
VOL and VOH are the typical output voltage drop that occur with the
output load.
S1
VCC
2 * VCC
Open
GND
500Ω
VO
VI
VCC
An, E 3
PULSE
GENERATOR
VM
INPUT
D.U.T.
50pF
RT
GND
t PHL
CL
500Ω
t PLH
VOH
Yn OUTPUT
SWITCH POSITION
VM
TEST
V OL
tPLH/tPHL
SV00557
Figure 1. Input (nA) to output (nY) propagation delays.
S1
Open
VCC
VI
< 2.7V
VCC
2.7–3.6V
2.7V
SV00903
Figure 3. Load circuitry for switching times.
V CC
E1, E 2
INPUT
VM
GND
t PHL
t PLH
V OH
Y n OUTPUT
VM
V OL
SV00558
Figure 2. 3-State enable and disable times.
1998 Apr 28
6
Philips Semiconductors
Product specification
3-to-8 line decoder/demultiplexer; inverting
SO16: plastic small outline package; 16 leads; body width 3.9 mm
1998 Apr 28
7
74LVC138A
SOT109-1
Philips Semiconductors
Product specification
3-to-8 line decoder/demultiplexer; inverting
SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm
1998 Apr 28
8
74LVC138A
SOT338-1
Philips Semiconductors
Product specification
3-to-8 line decoder/demultiplexer; inverting
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm
1998 Apr 28
9
74LVC138A
SOT403-1
Philips Semiconductors
Product specification
3-to-8 line decoder/demultiplexer; inverting
74LVC138A
Data sheet status
Data sheet
status
Product
status
Definition [1]
Objective
specification
Development
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
Preliminary
specification
Qualification
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
Product
specification
Production
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
 Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
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Document order number:
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Date of release: 07-98
9397-750-04493