19-2135; Rev 1; 8/02 315MHz Low-Power, +3V Superheterodyne Receiver Features ♦ Operates from a Single +3.0V to +3.6V Supply ♦ Built-In 53dB RF Image Rejection ♦ -115dBm Receive Sensitivity* ♦ 250µs Startup Time ♦ Low 5.5mA Operating Supply Current ♦ 1.25µA Low-Current Power-Down Mode for Efficient Power Cycling ♦ 250MHz to 500MHz Operating Band (Image Rejection Optimized at 315MHz) The MAX1470 is available in a 28-pin TSSOP package. ♦ Integrated PLL with On-Board Voltage-Controlled Oscillator (VCO) and Loop Filter Applications ♦ Selectable IF Bandwidth Through External Filter Remote Keyless Entry Garage Door Openers ♦ Complete Receive System from RF to Digital Data Out Remote Controls Wireless Sensors *See Note 2, AC Electrical Characteristics. Ordering Information Wireless Computer Peripherals Security Systems Toys Video Game Controllers PART TEMP RANGE PIN-PACKAGE MAX1470EUI -40°C to +85°C 28 TSSOP Typical Application Circuit appears at end of data sheet. Pin Configuration appears at end of data sheet. Medical Systems Functional Diagram LNAOUT MIXIN1 6 LNAIN 3 MIXIN2 8 9 MIXOUT IFIN1 IFIN2 12 17 18 IF LIMITING AMPS LNA 0° Q MAX1470 LNASRC 4 90° RSSI I DVDD 14 DIVIDE BY 64 VCO DATA FILTER AVDD DGND AGND 2,7 PHASE DETECTOR LOOP FILTER CRYSTAL DRIVER SHUTDOWN RDF2 100kΩ RDF1 100kΩ 13 DATA SLICER PEAK DETECTOR 5,10 1 28 XTAL1 XTAL2 27 PWRDN 25 DATAOUT 20 19 DSN DSP 26 PDOUT 21 22 OPP DF ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX1470 General Description The MAX1470 is a fully integrated low-power CMOS superheterodyne receiver for use with amplitude-shiftkeyed (ASK) data in the 315MHz band. With few required external components, and a low-current power-down mode, it is ideal for cost- and power-sensitive applications in the automotive and consumer markets. The chip consists of a 315MHz low-noise amplifier (LNA), an image rejection mixer, a fully integrated 315MHz phase-lock-loop (PLL), a 10.7MHz IF limiting amplifier stage with received-signal-strength indicator (RSSI) and an ASK demodulator, and analog baseband data-recovery circuitry. MAX1470 315MHz Low-Power, +3V Superheterodyne Receiver ABSOLUTE MAXIMUM RATINGS AVDD to AGND ......................................................-0.3V to +4.0V DVDD to DGND......................................................-0.3V to +4.0V All Other Pins Referenced to AGND...........-0.3V to (VDD + 0.3V) Continuous Power Dissipation (TA = +70°C) 28-Pin TSSOP (derate 13mW/°C above +70°C) .........1039mW Operating Temperature Range MAX1470EUI ...................................................-40°C to +85°C Storage Temperature Range .............................-60°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC ELECTRICAL CHARACTERISTICS (Typical Application Circuit, VDD = +3.0V to +3.6V, no RF signal applied, TA = -40°C to +85°C. Typical values are at VDD = +3.3V, TA = +25°C, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP Supply Voltage VDD Supply Current IDD PWRDN = VDD 5.5 Shutdown Supply Current ISHUTDOWN PWRDN = GND 1.25 PWRDN Voltage Input Low VIL PWRDN Voltage Input High VIH DATAOUT Voltage Output Low VOL DATAOUT Voltage Output High VOH 3.0 MAX 3.6 V mA µA 0.4 VDD 0.4 V V IDATAOUT = 100µA IDATAOUT = -100µA UNITS 0.4 VDD 0.4 V V AC ELECTRICAL CHARACTERISTICS (Typical Application Circuit, all RF inputs and outputs are referenced to 50Ω, VDD = +3.3V, TA = +25°C, fRFIN = 315MHz, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS GENERAL CHARACTERISTICS Maximum Startup Time Maximum Receiver Input Level Minimum Receiver Input Level, 315MHz TON RFINMAX RFINMIN Minimum Receiver Input Level, 433.92MHz Receivers Time from PWRDN deasserting to valid data out Modulation depth ≥ 60dB 250 µs 0 dBm Average carrier power level (Note 2) -115 Peak power level (Note 2) -109 Average carrier power level (Note 2) -110 Peak power level (Note 2) -104 fRFIN 250 to 500 dBm dBm MHz LOW-NOISE AMPLIFIER (LNA) Input Impedance 1dB Compression Point Input-Referred 3rd-Order Intercept S11LNA Normalized to 50Ω (Note 3) P1dBLNA -22 dBm IIP3LNA -18 dBm -95 dBm LO Signal Feedthrough to Antenna Output Impedance 2 1 - j4 S22LNA Normalized to 50Ω 0.12 j4.4 _______________________________________________________________________________________ 315MHz Low-Power, +3V Superheterodyne Receiver (Typical Application Circuit, all RF inputs and outputs are referenced to 50Ω, VDD = +3.3V, TA = +25°C, fRFIN = 315MHz, unless otherwise noted.) (Note 1) PARAMETER Noise Figure SYMBOL CONDITIONS MIN NFLNA Power Gain TYP MAX UNITS 2.0 dB 16 dB MIXER Input Impedance S11MIX Input-Referred 3rd-Order Intercept IIP3MIX Output Impedance 0.25 j2.4 Normalized to 50Ω ZOUT_MIX fRFIN = 315MHz, fRF_IMAGE = 293.6MHz (Note 4) Image Rejection fRFIN = 433.92MHz, fRF_IMAGE = 412.52MHz Noise Figure NFMIX 40 -18 dBm 330 Ω 53 39 dB 16 dB 13 dB ZIN_IF 330 Ω fIF 10.7 MHz ±1 dB 65 dB Conversion Gain 330Ω IF filter load INTERMEDIATE-FREQUENCY DEMODULATOR BLOCK Input Impedance Operating Frequency RSSI Linearity RSSI Dynamic Range RSSI Level PRFIN < -120dBm 1.2 PRFIN > -50dBm 2.0 V DATA FILTER Maximum Bandwidth BWDF 100 kHz Comparator Bandwidth BWCMP 100 kHz Maximum Load Capacitance CLOAD 10 pF fREF 4.7547 MHz DATA SLICER CRYSTAL OSCILLATOR Reference Frequency Note 1: Parts are production tested at TA = +25°C; Min and Max values are guaranteed by design and characterization. Note 2: BER = 2E-3, Manchester encoded, data rate = 4kbps, IF bandwidth = 350kHz. Note 3: Input impedance is measured at the LNAIN pin. Note that the impedance includes the 15nH inductive degeneration connected from the LNASRC. Note 4: Guaranteed by production test. _______________________________________________________________________________________ 3 MAX1470 AC ELECTRICAL CHARACTERISTICS (continued) Typical Operating Characteristics (VDD = +3.3V, TA = +25°C, unless otherwise noted. Typical Application Circuit.) BIT-ERROR RATE vs. AVERAGE RF INPUT POWER 5.5 TA = +25°C 5.1 MAX1470 toc02 1.8 1 1.6 1.4 TA = -40°C 1.2 4.7 0.1 2.7 2.9 3.1 3.3 3.5 1.0 -120 SUPPLY VOLTAGE (V) -116 -118 -114 -140 -120 AVERAGE RF INPUT POWER (dBm) RECEIVER SENSITIVITY vs. TEMPERATURE -117.0 40 50 30 53dB IMAGE REJECTION 20 10 LOWER SIDEBAND 0 -10 45 -20 0 20 40 60 80 -40 -20 0 20 40 60 TEMPERATURE (°C) TEMPERATURE (°C) LNA GAIN vs. RF FREQUENCY SUPPLY CURRENT vs. LO FREQUENCY 6.7 SUPPLY CURRENT (mA) 25 20 6.2 5.7 5.2 15 4.7 250 275 300 325 RF FREQUENCY (MHz) 4 350 375 20 30 IF FREQUENCY (MHz) 40 MAX1470 toc09 -100 REAL IMPEDANCE 50 40 -150 30 -200 20 -250 -300 IMAGINARY IMPEDANCE -350 0 150 200 250 300 350 400 LO FREQUENCY (MHz) 450 500 0 -50 60 10 4.2 10 10 70 REAL IMPEDANCE (Ω) LC TANK FILTER TUNED TO 315MHz 0 INPUT IMPEDANCE vs. INDUCTIVE DEGENERATION 7.2 MAX1470 toc07 30 80 MAX1470 toc08 -40 -20 UPPER SIDEBAND 55 -117.5 -118.0 -40 FROM RFIN TO MIXOUT fLO = 304.3MHz 50 SYSTEM GAIN (dB) IMAGE REJECTION (dB) -116.5 -60 60 MAX1470 toc05 60 MAX1470 toc04 AVERAGE RF INPUT POWER 1% BER IF BANDWIDTH = 350kHz -80 SYSTEM GAIN vs. IF FREQUENCY IMAGE REJECTION vs. TEMPERATURE -116.0 -100 AVERAGE RF INPUT POWER (dBm) 1 10 INDUCTIVE DEGENERATION (nH) _______________________________________________________________________________________ 100 IMAGINARY IMPEDANCE (Ω) 4.9 RECEIVER SENSITIVITY (dBm) IF BANDWIDTH = 350kHz 2.0 MAX1470 toc06 5.3 2.2 RSSI (V) TA = +85°C 5.7 BIT-ERROR RATE (%) SUPPLY CURRENT (mA) 5.9 RSSI vs. AVERAGE RF INPUT POWER 10 MAX1470 toc01 6.1 MAX1470 toc03 SUPPLY CURRENT vs. SUPPLY VOLTAGE LNA GAIN (dB) MAX1470 315MHz Low-Power, +3V Superheterodyne Receiver 315MHz Low-Power, +3V Superheterodyne Receiver NORMALIZED IF GAIN vs. IF FREQUENCY IMAGE REJECTION vs. RF FREQUENCY IMAGE REJECTION (dB) 0 -5 -10 MAX1470 toc11 3dB BANDWIDTH = 11.7MHz NORMALIZED IF GAIN (dB) 60 MAX1470 toc10 5 50 40 30 -15 -20 20 1 10 100 IF FREQUENCY (MHz) 150 200 250 300 350 400 450 500 RF FREQUENCY (MHz) S11 MAGNITUDE-LOG PLOT OF RFIN S11 SMITH PLOT OF RFIN MAX1470 toc13 MAX1470 toc12 315MHz 0dB 50MHz 10dB/ div 315MHz, -29.5dB 1GHz 50MHz 1GHz _______________________________________________________________________________________ 5 MAX1470 Typical Operating Characteristics (continued) (VDD = +3.3V, TA = +25°C, unless otherwise noted. Typical Application Circuit.) 315MHz Low-Power, +3V Superheterodyne Receiver MAX1470 Pin Description PIN NAME 1 XTAL1 1st Crystal Input FUNCTION 2, 7 AVDD Positive Analog Supply Voltage for RF Sections. Decouple to AGND with 0.01µF capacitors. 3 LNAIN Low-Noise Amplifier Input 4 LNASRC Low-Noise Amplifier Source. Connect inductor to ground to set LNA input impedance (see LowNoise Amplifier section). 5, 10 AGND 6 LNAOUT Analog Ground 8 MIXIN1 1st Differential Mixer Input. Must be AC-coupled to driving input. 9 MIXIN2 2nd Differential Mixer Input. Must be AC-coupled to driving input. 11, 15, 16, 23, 24 I.C. 12 MIXOUT 13 DGND Digital Ground 14 DVDD Positive Digital Supply Voltage. Decouple to DGND with a 0.01µF capacitor. 17 IFIN1 1st Differential Intermediate Frequency Limiter Amplifier Input 18 IFIN2 2nd Differential Intermediate Frequency Limiter Amplifier Input 19 DSP Positive Data Slicer Input 20 DSN Negative Data Slicer Input 21 OPP 22 DF 25 DATAOUT 26 PDOUT Peak Detector Output 27 PWRDN Power-Down Select Input. Drive this pin with a logic low to shut down the IC. 28 XTAL2 Low-Noise Amplifier Output Internally Connected. Do not make connection to these pins. 330Ω Mixer Output Noninverting Op Amp. Input for the Sallen-Key data filter. Data Filter Feedback Node. Input for the feedback of the Sallen-Key data filter. Digital Baseband Data Output 2nd Crystal Input Detailed Description The MAX1470 CMOS superheterodyne receiver and a few external components provide the complete receive chain from the antenna to the digital output data. Depending on signal power and component selection, data rates as high as 100kbps can be achieved. The MAX1470 is designed to receive binary ASK data on a 315MHz carrier. ASK modulation uses a difference in amplitude of the carrier to represent logic 0 and logic 1 data. Low-Noise Amplifier The LNA is a cascode amplifier with off-chip inductive degeneration that achieves approximately 16dB of power gain with a 2.0dB noise figure and an IIP3 of -18dBm. The gain and noise figure is dependent on both the antenna matching network at the LNA input, 6 and the LC tank network between the LNA output and the mixer inputs. The off-chip inductive degeneration is achieved by connecting an inductor from LNASRC to AGND. This inductor sets the real part of the input impedance at LNAIN, allowing for a more flexible match for low-input impedance such as a PC board trace antenna. A nominal value for this inductor with a 50Ω input impedance is 15nH, but is affected by PC board trace. See Typical Operating Characteristics for the relationship between the inductance and input impedance. The LC tank filter connected to LNAOUT comprises L1 and C9 (see Typical Applications Circuit). L1 and C9 values are selected to resonate at the RF input frequency of 315MHz. The resonant frequency is given by: _______________________________________________________________________________________ 315MHz Low-Power, +3V Superheterodyne Receiver 2π L TOTAL × CTOTAL Intermediate Frequency where: L TOTAL = L1+ LPARASITICS CTOTAL = C9 + CPARASITICS LPARASITICS and CPARASITICS include inductance and capacitance of the PC board traces, package pins, mixer input impedance, LNA output impedance, etc. These parasitics at high frequencies cannot be ignored and can have a dramatic effect on the tank filter center frequency. Lab experimentation should be done to optimize the center frequency of the tank. Mixer A unique feature of the MAX1470 is the integrated image rejection of the mixer. This device was designed to eliminate the need for a costly front-end SAW filter for many applications. The advantage of not using a SAW filter is increased sensitivity, simplified antenna matching, less board space, and lower cost. The mixer cell is a pair of double-balanced mixers that perform an IQ downconversion of the 315MHz RF input to the 10.7MHz IF with low-side injection (i.e., fLO = fRF - fIF). The image rejection circuit then combines these signals to achieve ~50dB of image rejection over the full temperature range. Low-side injection is required due to the on-chip image-rejection architecture. The IF output is driven by a source-follower, biased to create a driving impedance of 330Ω to interface with an off-chip 330Ω ceramic IF filter. The voltage conversion gain driving a 330Ω load is approximately 13dB. Phase-Lock Loop The PLL block contains a phase detector, charge pump/integrated loop filter, VCO, asynchronous 64x clock divider, and crystal oscillator. This PLL does not require any external components. The quadrature VCO is centered at the nominal LO frequency of 304.3MHz. For an input RF frequency of 315MHz, a reference frequency of 4.7547MHz is needed for a 10.7MHz IF frequency (low-side injection is required). The relationship between the RF, IF, and reference frequencies is given by: fREF = (fRF - fIF) / 64 The IF section presents a differential 330Ω load to provide matching for the off-chip ceramic filter. The internal five AC-coupled limiting amplifiers produce an overall gain of approximately 65dB, with a bandpass-filter-type response centered near the 10.7MHz IF frequency with a 3dB bandwidth of approximately 11.5MHz. The RSSI circuit demodulates the IF to baseband by producing a DC output proportional to the log of the IF signal level with a slope of approximately 15mV/dB (see Typical Operating Characteristics). Applications Information Crystal Oscillator The XTAL oscillator in the MAX1470 is designed to present a capacitance of approximately 3pF between XTAL1 and XTAL2. If a crystal designed to oscillate with a different load capacitance is used, the crystal is pulled away from its stated operating frequency, introducing an error in the reference frequency. Crystals designed to operate with higher differential load capacitance always pull the reference frequency higher. For example, a 4.7547MHz crystal designed to operate with a 10pF load capacitance oscillates at 4.7563MHz with the MAX1470, causing the receiver to be tuned to 315.1MHz rather than 315.0MHz, an error of about 100kHz, or 320ppm. In actuality, the oscillator pulls every crystal. The crystal’s natural frequency is really below its specified frequency, but when loaded with the specified load capacitance, the crystal is pulled and oscillates at its specified frequency. This pulling is already accounted for in the specification of the load capacitance. Additional pulling can be calculated if the electrical parameters of the crystal are known. The frequency pulling is given by: ƒp = Cm 1 1 6 − × 10 2 Ccase + Cload Ccase + Cspec where: fp is the amount the crystal frequency is pulled in ppm. Cm is the motional capacitance of the crystal. Ccase is the case capacitance. Cspec is the specified load capacitance. Cload is the actual load capacitance. _______________________________________________________________________________________ 7 MAX1470 ƒ = To allow the smallest possible IF bandwidth (for best sensitivity), the tolerance of the reference must be minimized. 1 MAX1470 315MHz Low-Power, +3V Superheterodyne Receiver When the crystal is loaded as specified, i.e., Cload = Cspec, the frequency pulling equals zero. MAX1470 Data Filter The data filter is implemented as a 2nd-order lowpass Sallen-Key filter. The pole locations are set by the combination of two on-chip resistors and two external capacitors. Adjusting the value of the external capacitors changes the corner frequency to optimize for different data rates. The corner frequency should be set to approximately 1.5 times the fastest expected data rate from the transmitter. Keeping the corner frequency near the data rate rejects any noise at higher frequencies, resulting in an increase in receiver sensitivity. The configuration shown in Figure 1 can create a Butterworth or Bessel response. The Butterworth filter offers a very flat amplitude response in the passband and a roll-off rate of 40dB/decade for the two-pole filter. The Bessel filter has a linear phase response, which works well for filtering digital data. To calculate the value of C5 and C6, use the following equations along with the coefficients in Table 1: C5 = C6 = ( b )( )( ) a 100kΩ π fc a ( )( )( ) 4 100kΩ π fc where fC is the desired 3dB corner frequency. For example, to choose a Butterworth filter response with a corner frequency of 5kHz: C5 = C6 = 1.000 (1.414)(100kΩ)(3.14)(5kHz) 1.414 (4)(100kΩ)(3.14)(5kHz) ≈ 450pF ≈ 225pF Table 1. Coefficents to Calculate C5 and C6 FILTER TYPE a b Butterworth (Q = 0.707) 1.414 1.000 Bessel (Q = 0.577) 8 1.3617 0.618 19 DSP RSSI RDF2 100kΩ RDF1 100kΩ 21 OPP 22 DF C6 C5 Figure 1. Sallen-Key Lowpass Data Filter Choosing standard capacitor values changes C5 to 470pF and C6 to 220pF, as shown in the Typical Application Circuit. Data Slicer The purpose of the data slicer is to take the analog output of the data filter and convert it to a digital signal. This is achieved by using a comparator and comparing the analog input to a threshold voltage. The threshold voltage is set by the voltage on DSN, which is connected to the negative input of the data slicer comparator. The positive input is connected to the output of the data filter internally, and also the DSP pin for use with some data slicer configurations. The suggested data slicer configuration uses a resistor (R1) connected between DSN and DSP with a capacitor (C4) from DSN to DGND (Figure 2). This configuration averages the analog output of the filter and sets the threshold to approximately 50% of that amplitude. With this configuration, the threshold automatically adjusts as the analog signal varies, minimizing the possibility for errors in the digital data. The sizes of R1 and C4 affect how fast the threshold tracks the analog amplitude. Be sure to keep the corner frequency of the RC circuit lower than the lowest expected data rate. Note that a long string of zeros or ones can cause the threshold to drift. This configuration works best if a coding scheme, such as Manchester code, which has an equal number of zeros and ones, is used. Peak Detector The peak detector output (PDOUT), in conjunction with an external RC filter, creates a DC output voltage equal to the peak value of the data signal. The resistor provides a path for the capacitor to discharge, allowing the _______________________________________________________________________________________ 315MHz Low-Power, +3V Superheterodyne Receiver MAX1470 MAX1470 DATA FILTER MAX1470 DATA FILTER DATA SLICER DATA SLICER 25 20 DSN DATA OUT C4 19 DSP R1 25 20 DSN DATA OUT 47nF Figure 2. Generating Data Slicer Threshold 19 DSP 25kΩ 26 PDOUT 250kΩ 47nF Figure 3. Using PDOUT for Faster Startup peak detector to dynamically follow peak changes of the data filter output voltage. For faster receiver startup, the circuit shown in Figure 3 can be used. 433.92MHz Band The MAX1470 can be configured to receive ASK modulated data with carrier frequency ranging from 250MHz to 500MHz. Only a small number of components need to be changed to retune the RF section to the desired RF frequency. Table 2 shows a list of changed components and their values for a 433.92MHz RF; all other components remain unchanged. The integrated image rejection of the MAX1470 is specifically designed to function with a 315MHz input frequency by attenuating any signal at 293.6MHz. The benefit of the on-chip image rejection is that an external SAW filter is not needed, reducing cost and the insertion loss associated with SAW filters. The image rejection cannot be retuned for different RF input frequencies and therefore is degraded. The image rejection at 433.92MHz is typically 39dB. Table 2. Changed Component Values for 433.92MHz COMPONENT VALUE FOR 433MHz RF C9 1.0pF L1 15nH L2 56nH Y1 6.6128MHz Layout Considerations A properly designed PC board is an essential part of any RF/microwave circuit. On high-frequency inputs and outputs, use controlled-impedance lines and keep them as short as possible to minimize losses and radiation. At high frequencies, trace lengths that are approximately 1/20 the wavelength or longer become antennas. For example, a 2in trace at 315MHz can act as an antenna. Keeping the traces short also reduces parasitic inductance. Generally, 1in of a PC board trace adds about 20nH of parasitic inductance. The parasitic inductance can have a dramatic effect on the effective inductance. For example, a 0.5in trace connecting a 100nH inductor adds an extra 10nH of inductance or 10%. To reduce the parasitic inductance, use wider traces and a solid ground or power plane below the signal traces. Using a solid ground plane can reduce the parasitic inductance from approximately 20nH/in to 7nH/in. Also, use low-inductance connections to ground on all GND pins, and place decoupling capacitors close to all VDD connections. Chip Information TRANSISTOR COUNT: 1835 PROCESS: CMOS Note: These values are affected by PC board layout. _______________________________________________________________________________________ 9 MAX1470 315MHz Low-Power, +3V Superheterodyne Receiver Typical Application Circuit +3.3V Y1 4.7547MHz C12 0.01µF ANTENNA (RFIN) C7 100pF 1 XTAL1 XTAL2 28 2 AVDD PWRDN 27 3 LNAIN PDOUT 26 4 LNASRC 5 AGND I.C. 24 6 LNAOUT I.C. 23 7 AVDD 8 MIXIN1 SHUTDOWN L2 100nH L3 15nH +3.3V L1 27nH DATAOUT 25 DATAOUT C2 0.01µF C9 2.2pF MAX1470 DF 22 C11 100pF OPP 21 C5 470pF 9 C10 220pF DSN 20 10 AGND C1 0.01µF 10 MIXIN2 C8 100pF DSP 19 11 I.C. IFIN2 18 12 MIXOUT IFIN1 17 13 DGND I.C. 16 14 DVDD I.C. 15 C3 1500pF C6 220pF R1 5kΩ C4 0.47µF U1 10.7MHz ______________________________________________________________________________________ 315MHz Low-Power, +3V Superheterodyne Receiver MAX1470 Pin Configuration TOP VIEW XTAL1 1 28 XTAL2 AVDD 2 27 PWRDN LNAIN 3 26 PDOUT 25 DATAOUT LNASRC 4 24 I.C. AGND 5 LNAOUT 6 MAX1470 23 I.C. 22 DF AVDD 7 MIXIN1 8 21 OPP MIXIN2 9 20 DSN AGND 10 19 DSP I.C. 11 18 IFIN2 MIXOUT 12 17 IFIN1 DGND 13 16 I.C. DVDD 14 15 I.C. TSSOP ______________________________________________________________________________________ 11 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) TSSOP4.40mm.EPS MAX1470 315MHz Low-Power, +3V Superheterodyne Receiver Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2002 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.