19-0554; Rev 0; 5/06 Complete VGA 1:2 or 2:1 Multiplexer The MAX4885 integrates high-bandwidth analog switches and level-translating buffers to implement a complete 1:2 or 2:1 multiplexer for VGA signals. The device provides switching for RGB, display data channel (DDC), and horizontal and vertical synchronization (HSYNC, VSYNC) signals. A low-noise charge pump with internal capacitors provides a boosted gate-drive voltage to improve performance of the RGB switches. In the 1:2 multiplexer mode, HSYNC/VSYNC inputs feature level-shifting buffers to support low-voltage CMOS or standard TTL-compatible graphics controllers. In the 2:1 multiplexer mode, the output buffers for the HSYNC/VSYNC inputs are disabled, allowing bidirectional signaling. In both modes, DDC signals are voltage-clamped to an external voltage to provide level translation and protection. The MAX4885 features a 5µA shutdown mode and is ESD protected to ±8kV Human Body Model (HBM) on externally routed pins. Features ♦ +5V Single-Supply Operation ♦ Programmable Voltage Clamp for Open-Drain DDC Signals ♦ Low 5Ω (typ) On-Resistance (R, G, B Signals) ♦ Low 13pF (typ) On-Capacitance (R, G, B Signals) ♦ Break-Before-Make Switching Protects Against Circuit Shorts ♦ ±8kV HBM ESD Protection on Externally Routed Pins ♦ Low 300µA Supply Current (Lower than 1µA with Charge Pump Disabled) ♦ Space-Saving, Lead-Free, 32-Pin (5mm x 5mm) TQFN Package The MAX4885 is specified over the extended (-40°C to +85°C) temperature range, and is available in the 32pin, 5mm x 5mm TQFN package. Applications Ordering Information PART TEMP RANGE PKG CODE PIN-PACKAGE Notebook Computers MAX4885ETJ+ Digital Projectors -40°C to +85°C 32 TQFN-EP* T3255-4 *EP = Exposed pad. +Denotes lead-free package. Computer Monitors Servers KVM Switches H1 V1 V+ GND V2 H2 B2 TOP VIEW B1 Pin Configuration 24 23 22 21 20 19 18 17 +3.3V 16 G1 25 G2 R1 26 15 R2 DDCB1 27 14 DDCB2 13 DDCA2 12 GND 11 V+ 10 VCL 9 EN DDCA1 28 MAX4885 GND 29 V+ 30 *EP M 31 TQFN 6 7 8 DDCB0 5 V0 R0 G0 4 DDCA0 3 B0 2 H0 1 QP SEL 32 Typical Operating Circuit +5V 0.1µF VCL MAX4885 3 GRAPHICS CONTROLLER DOCKING STATION R0, B0, G0 2 2 0.1µF V+ H0, V0 DDCA0, DDCB0 SEL M EN R1, G1, B1 H1, V1 DDCA1, DDCB1 R2, G2, B2 H2, V2 DDCA2, DDCB2 GND 3 2 VGA PORT 1 2 VGA PORT 2 2 3 2 *EXPOSED PADDLE CONNECTED TO GND ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX4885 General Description MAX4885 Complete VGA 1:2 or 2:1 Multiplexer ABSOLUTE MAXIMUM RATINGS (All voltages referenced to GND.) V+, VCL .....................................................................-0.3V to +6V R_, G_, B_, DDCA_, DDCB_, SEL, M, EN, QP (Note 1) ...........................................-0.3V to V+ + 0.3V H_, V_ .......................................................................-0.3V to +6V Continuous Current Through RGB Switches ....................±70mA Continuous Current Through HV, DDC Switches…..........±50mA Peak Current Through RGB Switches (pulsed at 1ms, 10% duty cycle).................................±140mA Peak Current Through HV, DDC Switches (pulsed at 1ms, 10% duty cycle)..............................................................±100mA Continuous Power Dissipation (TA = +70°C) 32-Pin TQFN (derate 21.3mW/°C above +70°C) ........1702mW Operating Temperature Range ...........................-40°C to +85°C Storage Temperature Range .............................-65°C to +150°C Junction Temperature ......................................................+150°C Lead Temperature (soldering, 10s) .................................+300°C Note 1: Signals exceeding V+ or GND are clamped by internal diodes. Limit forward-diode current to maximum current rating. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (V+ = +5.0V ±10%, VCL = +3.3V ±10%, TA = TMIN to TMAX, QP = GND, unless otherwise noted. Typical values are at V+ = +5.0V, VCL = +3.3V and TA = +25°C.) PARAMETER SYMBOL Supply Voltage Range V+ Clamp Voltage Range VCL V+ Quiescent Supply Current VCL Quiescent Supply Current CONDITIONS MIN TYP 4.5 2.7 I+ V+ = +5.5V ICL QP = GND 0.3 QP = V+ MAX UNITS 5.5 V V+ V 0.5 mA 1 µA VCL = V+ = +5.5V 1 µA V+ Shutdown Current I+SHDN V+ = +5.5V, all digital inputs to V+ or GND 5 µA VCL Shutdown Current ICLSHDN VCL = V+ = +5.5V, all digital inputs to V+ or GND 1 µA RGB ANALOG SWITCHES On-Resistance RON 0V < VIN < +2.5V, IIN = -40mA QP = GND 5 7.5 QP = V+ 6 10 Ω On-Resistance Matching ∆RON 0V < VIN < +2.5V, IIN = -40mA 0.5 1.5 Ω On-Resistance Flatness RFLAT(ON) 0V < VIN < +2.5V, IIN = -40mA 0.02 0.75 Ω Off-Leakage Current IL(OFF) R_, G_, B_ = 0V or +5.5V, EN = GND -1 +1 µA On-Leakage Current IL(ON) R_, G_, B_ = 0V or +5.5V, EN = V+ -1 +1 µA Charge Injection Q R_, G_, B_ = 0V, CL = 1000pF QP = GND 10 QP = V+ 8 pC HV MULTIPLEXER Input-Voltage Low VILHV M = GND Input-Voltage High VIHHV M = GND 2.0 V High-Output Drive Current IOHHV VOUT = V+ - 0.5V, M = GND -16 mA Low-Output Drive Current IOLHV VOUT = +0.5V, M = GND On-Resistance RONHV H_ = V_ = +2.5V, IIN = -40mA, M = V+ Charge Injection 2 Q H_, V_ = 0V, M = V+, CL = 1000pF 0.8 +16 15 21 _______________________________________________________________________________________ V mA Ω pC Complete VGA 1:2 or 2:1 Multiplexer (V+ = +5.0V ±10%, VCL = +3.3V ±10%, TA = TMIN to TMAX, QP = GND, unless otherwise noted. Typical values are at V+ = +5.0V, VCL = +3.3V and TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 20 Ω DDC MULTIPLEXER On-Resistance RON(DDC) DDC Leakage IL(DDC) VCL - 0.4V < VOUT < VCL, VIN = V+ Q DDCA_, DDCB_ = 0V, CL = 1000pF Input-Low Voltage VIL V+ = +5.5V Input-High Voltage VIH V+ = +4.5V 2.0 VIN = V+ -1 Charge Injection VIN < +0.4V, VCL = +3.0V, IIN = -20mA -1 +1 10 µA pC SWITCH LOGIC (SEL, M, EN, QP) Input Leakage Current ILEAK 0.8 V V +1 µA ESD PROTECTION ESD Protection Human Body Model, all pins ±2 kV Human Body Model, R_, G_, B_, H_, V_, DDCA_, DDCB_ ±8 kV AC ELECTRICAL CHARACTERISTICS (V+ = +5.0V ±10%, VCL = +3.3V ±10%, TA = TMIN to TMAX, QP = GND. Typical values are at V+ = +5.0V, VCL = +3.3V and TA = +25°C, unless otherwise noted.) (Note 2) PARAMETER SYMBOL CONDITIONS Bandwidth fMAX RS = RL = 50Ω Insertion Loss ILOS 1MHz < f < 50MHz, RS = RL = 50Ω Crosstalk VCT 1MHz < f < 50MHz, VIN = 0.7VP-P, RS = RL = 50Ω Off-Capacitance COFF f = 1MHz, QP = GND or V+ On-Capacitance CON f = 1 MHz Charge-Pump Noise VNQP VIN = +1.0V, RS = RL = 50Ω MIN TYP MAX QP = GND 350 QP = V+ 350 QP = GND 0.85 1.2 1 1.6 QP = V+ UNITS MHz dB -40 dB 5 pF QP = GND 13 QP = V+ 17 50 pF 200 µV _______________________________________________________________________________________ 3 MAX4885 ELECTRICAL CHARACTERISTICS (continued) TIMING CHARACTERISTICS (V+ = +5.0V ±10%, VCL = +3.3V ±10%, TA = TMIN to TMAX, QP = GND. Typical values are at V+ = +5.0V, VCL = +3.3V and TA = +25°C, unless otherwise noted.) (Note 2) PARAMETER SYMBOL Charge-Pump Startup Time CONDITIONS MIN TYP tQPON MAX UNITS 150 µs RGB ANALOG SWITCHES Turn-On Time tON VIN = +1.0V, RL = 100Ω, Figure 1 Turn-Off Time tOFF VIN = +1.0V, RL = 100Ω, Figure 1 0.1 µs Propagation Delay tPD CL = 10pF, Figure 2, RL = RS = 50Ω 0.1 ns CL = 10pF, Skew between any two ports: R, G, B. Figure 2, RS = RL = 50Ω 30 ps Output Skew Between Ports tSKEW 7 µs HV MULTIPLEXER Turn-On Time tON M = 0, Figure 1 Turn-Off Time tOFF M = 0, Figure 1 Propagation Delay 5 µs 0.1 M = GND µs 6 16 tPD CL = 10pF Turn-On Time tON VIN = +1.0V, RL = 100Ω, Figure 1 Turn-Off Time tOFF VIN = +1.0V, RL = 100Ω, Figure 1 0.1 µs Propagation Delay tPD CL = 10pF, Figure 2 0.25 ns M = V+ ns 0.1 DDC MULTIPLEXER 5 µs Note 2: Timing parameters are guaranteed by design and correlation over the full operating temperature range. Typical Operating Characteristics (V+ = +5.0V, VCL = +3.3V and TA = +25°C, unless otherwise noted.) 8 QP = 1 30 10 RON (Ω) TA = +85°C TA = +25°C 6 5 4 3 RON (Ω) 25 7 20 15 TA = +25°C TA = -40°C TA = -40°C 0 0 0 1 2 3 VR0 (V) *R0, G0, B0 ARE INTERCHANGEABLE. 4 5 8 TA = +25°C 6 TA = -40°C 2 5 1 TA = +85°C 4 TA = +85°C 10 2 4 12 MAX4885 toc03 QP = 0 OR 1 MAX4885 toc02 35 MAX4885 toc01 10 9 RON vs. VR0* (HV SWITCHES) RON vs. VR0* (RGB SWITCHES) RON vs. VR0* (RGB SWITCHES) RON (Ω) MAX4885 Complete VGA 1:2 or 2:1 Multiplexer 0 1 2 VR0 (V) *R0, G0, B0 ARE INTERCHANGEABLE. 3 0 4 0 1 2 3 VR0 (V) *R0, G0, B0 ARE INTERCHANGEABLE. _______________________________________________________________________________________ 4 5 Complete VGA 1:2 or 2:1 Multiplexer HV BUFFER OUTPUT VOLTAGE HIGH vs. TEMPERATURE TA = +85°C TA = +25°C TA = -40°C 15 TA = +85°C TA = +25°C TA = -40°C 0 4.0 3.8 3.6 1.0 1.5 2.0 2.5 3.0 -15 0.7 0.6 0.5 0.4 0.3 10 60 85 -40 MAX4885 toc08 1.0 0.9 0.8 2.0 1.5 ON LEAKAGE 1.0 OFF LEAKAGE 10 35 0.5 0.4 0.3 ON LEAKAGE OFF LEAKAGE 0 -40 85 -15 10 35 60 85 -40 -15 10 35 60 TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C) RGB CHARGE INJECTION vs. COM VOLTAGE SUPPLY CURRENT vs. TEMPERATURE tON vs. TEMPERATURE (RGB SWITCHES) 0.45 0.40 9 6 QP = 1 3 6.0 0.35 5.0 TURN-ON TIME (µs) SUPPLY CURRENT (mA) 12 QP = 0 MAX4885 toc11 0.50 MAX4885 toc10 15 0.30 0.25 0.20 0.15 0.10 85 QP = 0 4.0 3.0 QP = 1 2.0 1.0 0.05 QP = 0 0 0 0 0.6 0.1 60 85 0.7 0.2 0 -15 60 DDC LEAKAGE CURRENT vs. TEMPERATURE 2.5 0 35 HV LEAKAGE CURRENT vs TEMPERATURE 0.5 -40 10 TEMPERATURE (°C) OFF LEAKAGE 0.1 -15 TEMPERATURE (°C) ON LEAKAGE 0.2 35 3.0 LEAKAGE CURRENT (nA) LEAKAGE CURRENT (nA) 0.8 0.6 0 -40 MAX4885 toc07 QP = 0 0.8 0.2 RGB LEAKAGE CURRENT vs. TEMPERATURE 0.9 1.0 0.4 VDDAC0 (V) *DDAC0 AND DDCB0 ARE INTERCHANGEABLE. 1.0 1.2 3.2 LEAKAGE CURRENT (nA) 0.5 1.4 3.4 3.0 0 CHARGE INJECTION (pC) MAX4885 toc05 4.2 1.6 MAX4885 toc12 30 VCL = +5.0V 4.4 I = 16mA 1.8 MAX4885 toc09 VCL = +3.3V 4.6 2.0 OUTPUT VOLTAGE LOW (V) 45 I = 16mA 4.8 OUTPUT VOLTAGE HIGH (V) 60 RON (Ω) 5.0 MAX4885 toc04 75 HV BUFFER OUTPUT VOLTAGE LOW vs. TEMPERATURE MAX4885 toc06 RON vs. VDDAC0* (DDC SWITCHES) 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 VCOM (V) 0 -40 -15 10 35 TEMPERATURE (°C) 60 85 -40 -15 10 35 60 85 TEMPERATURE (°C) _______________________________________________________________________________________ 5 MAX4885 Typical Operating Characteristics (continued) (V+ = +5.0V, VCL = +3.3V and TA = +25°C, unless otherwise noted.) Typical Operating Characteristics (continued) (V+ = +5.0V, VCL = +3.3V and TA = +25°C, unless otherwise noted.) 1.0 0.5 QP = 1 100 75 50 QP = 0 25 0 10 35 60 85 -15 TEMPERATURE (°C) 10 10 35 60 85 -40 TEMPERATURE (°C) RGB PROPAGATION DELAY vs. TEMPERATURE -1 ON-RESPONSE (dB) QP = 1 600 tPHL tPLH 10 60 85 0 QP = 0 QP = 0 OR 1 -10 -20 -2 -3 -4 -30 -40 -50 -60 -70 200 -5 0 -40 -15 10 35 60 -80 -90 -6 85 0 TEMPERATURE (°C) 100 200 300 400 0 50 100 150 200 250 300 350 400 450 500 FREQUENCY (MHz) FREQUENCY (MHz) QP = 0 OR 1 -10 OFF-ISOLATION (dB) -20 MAX4885 toc19 OFF-ISOLATION vs. FREQUENCY 0 -30 -40 -50 -60 -70 -80 -90 0 50 100 150 200 250 300 350 400 450 500 FREQUENCY (MHz) 6 35 CROSSTALK vs. FREQUENCY ON-RESPONSE vs. FREQUENCY MAX4885 toc17 800 -15 TEMPERATURE (°C) 0 MAX4885 toc16 1000 400 DDC 15 0 -40 CROSSTALK (dB) -15 20 5 0 -40 HV 25 MAX4885 toc18 1.5 30 TURN-OFF TIME (ns) 2.0 tOFF vs. TEMPERATURE (HV, DDC SWITCHES) MAX4885 toc14 125 TURN-OFF TIME (ns) 2.5 TURN-ON TIME (µs) 150 MAX4885 toc13 3.0 tOFF vs. TEMPERATURE (RGB SWITCHES) MAX4885 toc15 tON vs. TEMPERATURE (HV, DDC SWITCHES) PROPAGATION DELAY (ps) MAX4885 Complete VGA 1:2 or 2:1 Multiplexer _______________________________________________________________________________________ Complete VGA 1:2 or 2:1 Multiplexer V+ MAX4885 R1, G1, B1 R2, G2, B2 VN_ LOGIC INPUT V+ R0, G0, B0 50% 0V VOUT RL t OFF CL SEL VOUT GND LOGIC INPUT SWITCH OUTPUT ( 0.9 x V0UT 0.9 x VOUT 0V t ON CL INCLUDES FIXTURE AND STRAY CAPACITANCE. RL RL + RON VOUT = VN_ t r < 5ns t f < 5ns 50% V+ IN DEPENDS ON SWITCH CONFIGURATION; INPUT POLARITY DETERMINED BY SENSE OF SWITCH. ) Figure 1. Switching Time 1V 50% RS = RL = 50Ω CL = 10pF 50% INPUT 0V VOH tPHL tPLH 0.9V 50% 50% OUTPUT 0V tSKEW = | tPLH - tPHL | tPD = MAX (tPLH, tPHL) Figure 2. Propagation Delay and Skew Waveforms V+ MAX4885 ∆VOUT V+ VOUT RGEN R1, G1, B1 R2, G2, B2 R0, G0, B0 VOUT IN OFF CL V GEN GND ON OFF SEL VIL TO VIH IN OFF ON OFF Q = (∆V OUT )(C L ) LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES THAT HAVE THE OPPOSITE LOGIC SENSE. Figure 3. Charge Injection _______________________________________________________________________________________ 7 MAX4885 Timing Circuits/Timing Diagrams Complete VGA 1:2 or 2:1 Multiplexer MAX4885 Timing Circuits/Timing Diagrams (continued) +5V 10nF V OFF-ISOLATION = 20log ✕ OUT VIN NETWORK ANALYZER 0V OR V+ V+ SEL 50Ω VIN 50Ω ON-LOSS = 20log ✕ R0, G0, B0 MAX4885 R1, G1, B1 50Ω R2, G2, B2 GND VOUT MEAS 50Ω REF VOUT VIN V CROSSTALK = 20log ✕ OUT VIN 50Ω MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS. OFF-ISOLATION IS MEASURED BETWEEN R0 AND R1 OR R2 ON EACH SWITCH. ON-LOSS IS MEASURED BETWEEN R0 AND R1 OR R2 ON EACH SWITCH. CROSSTALK IS MEASURED FROM ONE CHANNEL TO THE OTHER CHANNEL. SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED. Figure 4. On-Loss, Off-Isolation, and Crosstalk Pin Description PIN 1 8 NAME QP FUNCTION Charge-Pump Enable, Active Low. Drive QP low for normal operation. Drive QP high to disable the internal charge pump. 2 R0 RGB Analog I/O 3 G0 RGB Analog I/O 4 B0 RGB Analog I/O 5 H0 Horizontal Sync I/O 6 V0 Vertical Sync I/O 7 DDCA0 DDC I/O 8 DDCB0 DDC I/O 9 EN Enable Input, Active Low. Drive EN low for normal operation. Drive EN high to disable the device. All I/Os are high-impedance and charge pump is off when the device is disabled. 10 VCL DDC Clamp Voltage. Open-drain DDCA_ and DDCB_ outputs are clamped to one diode-drop below VCL. +2.7V < VCL < V+. Connect VCL to +3.3V for voltage clamping, or connect to V+ to disable clamping. Bypass VCL to GND with a 0.1µF or larger ceramic capacitor. 11, 21, 30 V+ Supply Voltage. V+ = +5.0V ± 10%. Bypass each to GND with a 0.1µF or larger ceramic capacitor. 12, 20, 29 GND Ground 13 DDCA2 DDC I/O 14 DDCB2 15 R2 RGB Analog I/O 16 G2 RGB Analog I/O 17 B2 RGB Analog I/O DDC I/O _______________________________________________________________________________________ Complete VGA 1:2 or 2:1 Multiplexer PIN NAME 18 H2 Horizontal Sync I/O FUNCTION 19 V2 Vertical Sync I/O 22 V1 Vertical Sync I/O 23 H1 Horizontal Sync I/O 24 B1 RGB Analog I/O 25 G1 RGB Analog I/O 26 R1 RGB Analog I/O 27 DDCB1 DDC I/O 28 DDCA1 DDC I/O 31 M 32 SEL Select. Logic input for switching RGB, HV, and DDC switches. See Tables 1, 2, and 3. EP EP Exposed Pad. Connect exposed pad to ground. Mode Select. Drive M low for 1:2 multiplexer mode. Drive M high for 2:1 multiplexer mode. See Tables 1, 2, and 3. Detailed Description The MAX4885 integrates high-bandwidth analog switches and level-translating buffers to implement a complete 1:2 or 2:1 multiplexer for VGA signals. The device provides switching for RGB, HSYNC, VSYNC, and DDC signals. A low-noise charge pump with internal capacitors provides a boosted gate-drive voltage to improve performance of the RGB switches. The device provides two modes of operation: 1:2 and 2:1. In 1:2 mode (M = 0), the HSYNC and VSYNC inputs feature level-shifting buffers to support TTL output logic levels from low-voltage graphics controllers. These buffered switches may be driven from as little as +2.0V up to +5.5V. In 2:1 mode (M=1), the output buffers for the HSYNC and VSYNC signals are disabled. In both modes, RGB signals are routed with the same high-performance analog switches, and DDC signals are voltage clamped to a diode drop less than VCL. Voltage clamping provides protection and compatibility with DDC signals and low-voltage ASICs. In keyboard/video/mouse (KVM) applications, VCL is normally set to +5V because low-voltage clamping is not required, as specified by the VESA standard. Drive EN logic high to shut down the MAX4885. In shutdown mode, supply current is reduced to 5µA and all switches are high impedance, providing high-signal rejection. The RGB, HSYNC, VSYNC, and DDC switches are ESD protected to ±8kV by the Human Body Model. Table 1. RGB Truth Table EN SEL 0 0 R0 to R1 G0 to G1 B0 to B1 0 1 R0 to R2 G0 to G2 B0 to B2 1 X R_, B_, and G_, High Impedance FUNCTION X = Don’t Care RGB Switches The MAX4885 provides three SPDT high-bandwidth switches to route standard VGA R, G, and B signals (see Table 1). A boosted gate-drive voltage is generated by an internal charge pump to improve performance of the RGB switches. The R, G, and B analog switches are identical, and any of the three switches can be used to route red, green, or blue video signals. The RGB switches function with reduced performance with the charge pump disabled. Charge Pump A low-noise charge pump with internal capacitors provides a doubled voltage for driving the RGB analog switches. Noise voltage from the charge pump is less than 50µVP-P. The noise level is more than 80dB below the signal level, making the charge pump suitable for _______________________________________________________________________________________ 9 MAX4885 Pin Description (continued) MAX4885 Complete VGA 1:2 or 2:1 Multiplexer standard VGA signals. The charge pump can be disabled to eliminate charge-pump noise; however, RGB switch performance is slightly degraded. Connect QP to ground for normal operation. Horizontal/Vertical Sync Multiplexer 1:2 Multiplexer Mode The MAX4885 provides two modes of operation for the HSYNC and VSYNC signals. In 1:2 mode (M = 0), the HSYNC/VSYNC inputs are buffered to provide level shifting and drive capability to meet the VESA specification. 2:1 Multiplexer Mode In 2:1 mode (M = 1), the HSYNC/VSYNC output buffers are disabled, and switches pass signals directly. The HSYNC and VSYNC switches/buffers are identical, and either input can be used to route HSYNC and VSYNC signals. Table 2. HV Truth Table EN 0 0 0 M SEL 0 0 1 0 1:2 Mode Buffers Enabled H0 to H1 V0 to V1 1 1:2 Mode Buffers Enabled H0 to H2 V0 to V2 0 2:1 Mode Buffers Disabled H0 to H1 V0 to V1 0 1 1 2:1 Mode Buffers Disabled H0 to H2 V0 to V2 1 X X H_, V_ High Impedance Display Data Channel Multiplexer The MAX4885 provides two voltage-clamped switches to route DDC signals (see Table 3). Each switch clamps signals to a diode drop less than the voltage applied on VCL. Supply +3.3V on VCL to provide voltage clamping for VESA I2C-compatible signals. If voltage clamping is not required, connect VCL to V+. The DDCA and DDCB switches are identical, and each switch can be used to route either DDC signal. ESD Protection As with all Maxim devices, ESD-protection structures are incorporated on all pins to protect against electrostatic discharges encountered during handling and assembly. Additionally, the MAX4885 is protected to ±8kV on RGB, HSYNC, VSYNC, and DDC switches by the Human Body Model (HBM). For optimum ESD performance, bypass each V+ pin to ground with a 0.1µF or larger ceramic capacitor. Human Body Model (HBM) Several ESD testing standards exist for measuring the robustness of ESD structures. The ESD protection of the MAX4885 is characterized with the Human Body Model. Figure 5 shows the model used to simulate an ESD event resulting from contact with the human body. The model consists of a 100pF storage capacitor that is charged to a high voltage, then discharged through a 1.5kΩ resistor. Figure 6 shows the current waveform when the storage capacitor is discharged into a low impedance. ESD Test Conditions ESD performance depends on a variety of conditions. Please contact Maxim for a reliability report documenting test setup, methodology, and results. 10 FUNCTION X = Don’t Care Table 3. DDC Truth Table EN SEL FUNCTION 0 0 DDCA0 to DDCA1 DDCB0 to DDCB1 0 1 DDCA0 to DDCA2 DDCB0 to DDCB2 1 X DDCA_, DDCB_ High Impedance X = Don’t Care Applications Information 1:2 Multiplexer for Low-Voltage Graphics Controllers The MAX4885 provides the level shifting necessary to drive two standard VGA ports from a graphics controller as low as +2.2V. In 1:2 mode, internal buffers drive the HSYNC and VSYNC signals to VGA standard TTL levels. The DDC multiplexer provides level shifting by clamping signals to a diode drop less than VCL (see the Typical Operating Circuit). Connect VCL to +3.3V for normal operation, or to V+ to disable voltage clamping for DDC signals. ______________________________________________________________________________________ Complete VGA 1:2 or 2:1 Multiplexer CHARGE-CURRENTLIMIT RESISTOR HIGHVOLTAGE DC SOURCE Cs 100pF RD 1500Ω IP 100% 90% DISCHARGE RESISTANCE STORAGE CAPACITOR MAX4885 RC 1MΩ PEAK-TO-PEAK RINGING (NOT DRAWN TO SCALE) Ir AMPERES DEVICE UNDER TEST 36.8% 10% 0 0 Figure 5. Human Body ESD Test Model tRL TIME tDL CURRENT WAVEFORM Figure 6. HBM Discharge Current Waveform 2:1 Multiplexer PC Board Layout In 2:1 mode, HSYNC and VSYNC buffers are disabled, allowing bidirectional signaling. The DDC multiplexer provides level shifting by clamping signals to a diode drop less than VCL (see the Typical Operating Circuit). Connect VCL to V+ to disable voltage clamping for DDC signals. High-speed switches such as the MAX4885 require proper PC board layout for optimum performance. Ensure that impedance-controlled PC board traces for high-speed signals are matched in length and as short as possible. Connect the exposed pad to a solid ground plane. Power-Supply Decoupling Chip Information Bypass each V+ pin and VCL to ground with a 0.1µF or larger ceramic capacitor as close to the device as possible. PROCESS: BiCMOS CONNECT EXPOSED PAD TO GND ______________________________________________________________________________________ 11 Complete VGA 1:2 or 2:1 Multiplexer MAX4885 Functional Diagram MAX4885 M H0 * V0 * H1 V1 H2 V2 SEL R1 R0 G1 G0 B1 B0 R2 QP RGB CHARGE PUMP G2 B2 EN DDCA1 DDCA0 DDCB1 DDCB0 VCL VOLTAGE CLAMP DDCA2 DDCB2 12 ______________________________________________________________________________________ Complete VGA 1:2 or 2:1 Multiplexer QFN THIN.EPS D2 D MARKING b CL 0.10 M C A B D2/2 D/2 k L AAAAA E/2 E2/2 CL (NE-1) X e E DETAIL A PIN # 1 I.D. E2 PIN # 1 I.D. 0.35x45° e/2 e (ND-1) X e DETAIL B e L1 L CL CL L L e e 0.10 C A C 0.08 C A1 A3 PACKAGE OUTLINE, 16, 20, 28, 32, 40L THIN QFN, 5x5x0.8mm -DRAWING NOT TO SCALE- COMMON DIMENSIONS A1 A3 b D E e 0.70 0.75 0.80 0.70 0.75 0.80 0.70 0.75 0.80 0.70 0.75 0.80 0.70 0.75 0.80 0 0.02 0.05 0 0.02 0.05 0 0.02 0.05 1 2 EXPOSED PAD VARIATIONS PKG. 16L 5x5 20L 5x5 28L 5x5 32L 5x5 40L 5x5 SYMBOL MIN. NOM. MAX. MIN. NOM. MAX. MIN. NOM. MAX. MIN. NOM. MAX. MIN. NOM. MAX. A I 21-0140 0 0.02 0.05 0 0.02 0.05 0.20 REF. 0.20 REF. 0.20 REF. 0.20 REF. 0.20 REF. 0.25 0.30 0.35 0.25 0.30 0.35 0.20 0.25 0.30 0.20 0.25 0.30 0.15 0.20 0.25 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 0.80 BSC. 0.65 BSC. 0.50 BSC. 0.40 BSC. 0.50 BSC. 0.25 - 0.25 - 0.25 - 0.25 - 0.25 0.35 0.45 0.30 0.40 0.50 0.45 0.55 0.65 0.45 0.55 0.65 0.30 0.40 0.50 0.40 0.50 0.60 L1 - 0.30 0.40 0.50 16 40 N 20 28 32 ND 4 10 5 7 8 4 10 5 7 8 NE WHHB ----WHHC WHHD-1 WHHD-2 JEDEC k L NOTES: 1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994. 2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES. 3. N IS THE TOTAL NUMBER OF TERMINALS. PKG. CODES T1655-2 T1655-3 T1655N-1 T2055-3 D2 L E2 exceptions MIN. NOM. MAX. MIN. NOM. MAX. ±0.15 3.00 3.00 3.00 3.00 3.00 T2055-4 T2055-5 3.15 T2855-3 3.15 T2855-4 2.60 T2855-5 2.60 3.15 T2855-6 T2855-7 2.60 T2855-8 3.15 T2855N-1 3.15 T3255-3 3.00 T3255-4 3.00 T3255-5 3.00 T3255N-1 3.00 T4055-1 3.20 3.10 3.10 3.10 3.10 3.10 3.25 3.25 2.70 2.70 3.25 2.70 3.25 3.25 3.10 3.10 3.10 3.10 3.30 3.20 3.20 3.20 3.20 3.20 3.35 3.35 2.80 2.80 3.35 2.80 3.35 3.35 3.20 3.20 3.20 3.20 3.40 3.00 3.00 3.00 3.00 3.00 3.15 3.15 2.60 2.60 3.15 2.60 3.15 3.15 33.00 33.00 3.00 3.00 3.20 3.10 3.10 3.10 3.10 3.10 3.25 3.25 2.70 2.70 3.25 2.70 3.25 3.25 3.10 3.10 3.10 3.10 3.30 3.20 3.20 3.20 3.20 3.20 3.35 3.35 2.80 2.80 3.35 2.80 3.35 3.35 3.20 3.20 3.20 3.20 3.40 ** ** ** ** ** 0.40 ** ** ** ** ** 0.40 ** ** ** ** ** ** DOWN BONDS ALLOWED YES NO NO YES NO YES YES YES NO NO YES YES NO YES NO YES NO YES ** SEE COMMON DIMENSIONS TABLE 4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO JESD 95-1 SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE TERMINAL #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE. 5. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.25 mm AND 0.30 mm FROM TERMINAL TIP. 6. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY. 7. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION. 8. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS. 9. DRAWING CONFORMS TO JEDEC MO220, EXCEPT EXPOSED PAD DIMENSION FOR T2855-3 AND T2855-6. 10. WARPAGE SHALL NOT EXCEED 0.10 mm. 11. MARKING IS FOR PACKAGE ORIENTATION REFERENCE ONLY. 12. NUMBER OF LEADS SHOWN ARE FOR REFERENCE ONLY. 13. LEAD CENTERLINES TO BE AT TRUE POSITION AS DEFINED BY BASIC DIMENSION "e", ±0.05. PACKAGE OUTLINE, 16, 20, 28, 32, 40L THIN QFN, 5x5x0.8mm 21-0140 -DRAWING NOT TO SCALE- I 2 2 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 13 © 2006 Maxim Integrated Products Boblet Printed USA is a registered trademark of Maxim Integrated Products, Inc. MAX4885 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)