19-5022; Rev 0; 10/09 TION KIT EVALUA BLE IL AVA A High-Bandwidth, VGA 2:1 Switch with ±15kV ESD Protection Features The MAX4885AE integrates high-bandwidth analog switches, level-translating buffers, and level-translating FET switches to implement a complete 2:1 multiplexer for VGA signals. The device provides three very highfrequency 900MHz (typ) SPDT switches for RGB signals, two low-frequency clamping switches for the DDC signals, a pair of level-translating buffers for the H_ and V_ signals, and integrated extended ESD protection. S Low 5I (typ) On-Resistance (R_, G_, B_ Signals) Horizontal and vertical synchronization (H_/V_) inputs feature level-shifting buffers to support low-voltage controllers and standard 5V-TTL-compatible monitors, meeting the VESA requirement. Display Data Channel (DDC), consisting of SDA_ and SCL_, are FET switches that protect the low-voltage VGA source from potential damage from high-voltage presence on the monitor while reducing capacitive load. S Q15kV ESD HBM All seven output terminals of the MAX4885AE feature high-ESD protection to Q15kV Human Body Model (HBM) (see the Pin Description). All other pins are protected to Q2kV Human Body Model (HBM). The MAX4885AE is specified over the extended -40NC to +85NC temperature range, and is available in a spacesaving, 28-pin, 4mm x 4mm TQFN package. S Low 5.5pF (typ) On-Capacitance (R_, G_, B_ Signals) S Independent, Selectable Logic Inputs for Switching S Similar Pin Configuration to MAX4885 S Ultra-Small, 28-Pin (4mm x 4mm) TQFN Package Ordering Information PART TEMP RANGE PIN-PACKAGE MAX4885AEETI+ -40NC to +85NC 28 TQFN-EP* +Denotes a lead(Pb)-free/RoHS-compliant package. *EP = Exposed pad. Typical Operating Circuit +3.3V +5V 1µF KVM for Servers 1µF VCC MAX4885AE Applications Notebook Computer—MXM/Switchable Graphics VL 3 MXM MODULE 2 2 3 INTERNAL GRAPHICS CPU 2 2 R1, G1, B1 R0, G0, B0 H0, V0 H1, V1 SDA0, SCL0 SDA1, SCL1 3 2 2 VGA PORT R2, G2, B2 H2, V2 SDA2, SCL2 SEL1 SEL2 GND ________________________________________________________________ Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. MAX4885AE General Description MAX4885AE High-Bandwidth, VGA 2:1 Switch with ±15kV ESD Protection ABSOLUTE MAXIMUM RATINGS (All voltages referenced to GND unless otherwise noted.) VCC. .........................................................................-0.3V to +6V VL.............................................................. -0.3V to (VCC + 0.3V) R_, G_, B_, H0, V0, SDA0, SCL0.............. -0.3V to (VCC + 0.3V) H1, H2, V1, V2, SDA1, SDA2, SCL1, SCL2, SEL1, SEL2.................................... -0.3V to (VL + 0.3V) Continuous Current through R_, G_, B_ Switches........... Q50mA Continuous Current through SDA_, SCL_ Switches ....... Q50mA Continuous Current into SEL1, SEL2, H1, H2, V1, V2..... Q20mA Peak Current through all Switches (pulsed at 1ms, 10% duty cycle)................................ Q100mA Continuous Power Dissipation (TA = +70NC) 28-Pin TQFN (derate 28.6mW/NC above +70NC).....2285.7mW Junction-to-Ambient Thermal Resistance (BJA) (Note 1) 28-Pin TQFN..................................................................35NC/W Junction-to-Ambient Thermal Resistance (BJC) (Note 1) 28-Pin TQFN....................................................................3NC/W Operating Temperature Range........................... -40NC to +85NC Storage Temperature Range............................. -65NC to +150NC Junction Temperature.................................................... +150NC Lead Temperature (soldering, 10s).................................+300NC Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a fourlayer board. For detailed information on package thermal considerations, refer to http://www.maxim-ic.com/thermaltutorial. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VCC = +4.5V to +5.5V, VL = +2.2V to VCC, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25NC.) PARAMETER Supply Voltage SYMBOL CONDITIONS VCC Logic Supply Voltage VL VL P VCC VCC Supply Current ICC VCC = +5.5V, VL = +3.6V, SEL_ = H1 = H2 = V1 = V2 = GND IL VCC = +5.5V, VL = +3.6V, SEL_ = H1 = H2 = V1 = V2 = GND VL Supply Current MAX UNITS +4.5 MIN TYP +5.5 V +2.2 VCC V 5 FA 1 FA 8 I 1 I 1 I +1 FA 2 ANALOG SWITCHES On-Resistance (R_, G_, B_) On-Resistance Match (R_, G_, B_) On-Resistance Flatness (R_, G_, B_) Off Leakage Current (R_, G_, B_) On-Resistance (SDA_, SCL_) Off-Leakage Current (SDA_, SCL_) 2 R-HF-ON DRON 5 VIN = +0.7V, IIN = Q10mA 0 P VIN P +0.7V, IIN = -10mA RFLAT(ON) 0 P VIN P +0.7V, IIN = -10mA IOFF R-DDCON IOFF VR_, VG_, VB_ = 0V or VCC VIN = +0.7V, IIN = Q10mA VSDA_, VSCL_ = 0V or VL, VCC = VL = +5V 0.5 -1 15 -1 I +1 FA High-Bandwidth, VGA 2:1 Switch with ±15kV ESD Protection MAX4885AE ELECTRICAL CHARACTERISTICS (continued) (VCC = +4.5V to +5.5V, VL = +2.2V to VCC, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25NC.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DIGITAL INPUTS (SEL_, H1, H2, V1, V2) Input Threshold Low VIL Input Threshold High VIH Input Hysteresis Input Leakage Current SEL_ Enable/Disable Time 0.25 x VL 0.55 x VL VHYST 100 IL tON, tOFF V -1 mV +1 300 RL= 2.2kI, CL = 10pF, Figure 1 V FA ns DIGITAL OUTPUTS (H0, V0) Output-Voltage Low VOL IOUT = 8mA, VCC = +4.5V Output-Voltage High VOH Rise/Fall Time tR, tF IOUT = -8mA, VCC = +4.5V RL= 2.2kI, CL = 10pF, Figure 2 fMAX RS = RL = 50I 900 MHz ILOSS f = 10MHz, RS = RL = 50I, 0 P V P +0.7V, Figure 3 0.4 dB f = 50MHz, RS = RL = 50I, Figure 3 -40 dB 2.5 pF 2.4 0.8 V V 8 ns RGB AC PERFORMANCE Bandwidth On-Loss Crosstalk R_, G_, B_ VCT Off-Capacitance COFF f = 1MHz, R0 to R1/R2, G0 to G1/G2, B0 to B1/B2 (Note 2) On-Capacitance CON f = 1MHz, R0 to R1/R2, G0 to G1/G2, B0 to B1/B2 (Note 2) 5.5 R0, G0, B0, SDA0, SCL0, H0, V0 VESD HBM (Notes 2, 3) Q15 kV R0, G0, B0, SDA0, SCL0, H0, V0 VESD IEC 61000-4-2 Contact (Notes 2, 3) Q8 kV All Other Terminals VESD HBM (Note 2) Q2 kV 8 pF ESD PROTECTION Note 2: Guaranteed by design. Not production tested. Note 3: Tested terminal to GND, 1µF bypass capacitors on VCC and VL. 3 Typical Operating Characteristics (VCC = +5.0V, VL = +3.3V, TA = 25°C, unless otherwise noted.) 7 6 RON (Ω) RON (Ω) 40 TA = +25°C 5 4 VL = +3.3V 30 TA = +85°C 20 TA = -40°C TA = +85°C TA = +25°C 3 2 VL = +5V TA = +25°C TA = -40°C 10 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0 HV BUFFER OUTPUT-VOLTAGE LOW vs. TEMPERATURE SUPPLY CURRENT vs. TEMPERATURE 0.4 4.0 ICC 3 2 1 0 0 -15 10 35 60 0 MAX4885AE toc05 4 0.2 -40 -1 -2 ON-RESPONSE (dB) 0.6 4.4 85 ON-RESPONSE vs. FREQUENCY 5 SUPPLY CURRENT (µA) 0.8 4.6 TEMPERATURE (°C) VSDA0 (V) IOUT = 8mA 4.8 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 VRO (V) MAX4885AE toc04 1.0 5.0 TA = -40°C 0 0 IOUT = 8mA 4.2 1 0 5.2 MAX4885AE toc03 TA = +85°C *SDA0, SCL0 ARE INTERCHANGEABLE IL MAX4885AE toc06 8 HV BUFFER OUTPUT-VOLTAGE HIGH vs. TEMPERATURE OUTPUT-VOLTAGE HIGH (V) *R0, G0, B0 ARE INTERCHANGEABLE 9 50 MAX4885AE toc01 10 RON vs. VSDA0* (DDC SWITCHES) MAX4885AE toc02 RON vs. VRO* (RGB SWITCHES) OUTPUT-VOLTAGE LOW (V) -3 -4 -5 -6 -7 -8 -9 -40 -15 10 35 60 85 -40 TEMPERATURE (°C) -15 10 35 60 85 TEMPERATURE (°C) MAX4885AE toc07 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 1 10 100 FREQUENCY (MHz) 4 -10 1 10 100 FREQUENCY (MHz) CROSSTALK vs. FREQUENCY 0 CROSSTALK (dB) MAX4885AE High-Bandwidth, VGA 2:1 Switch with ±15kV ESD Protection 1000 1000 High-Bandwidth, VGA 2:1 Switch with ±15kV ESD Protection VL RL = 2.2kΩ CL = 10pF 50% 0V 50% SEL1, SEL2 tOFF VCC 80% 80% RL = 2.2kΩ CL = 10pF tON 50% 0V VCC 0V 50% H0, V0 20% 20% tR tR H0, V0 Figure 1. Enable/Disable Time +3.3V Figure 2. Rise/Fall Time +5V 1µ F 1µ F VL GND OR VL SEL1, SEL2 VCC R0, G0, B0 MAX4885AE R1, G1, B1 50Ω R2, G2, B2 GND NETWORK ANALYZER 50Ω VIN 50Ω INSERTION-LOSS = 20log CROSSTALK = 20log VOUT MEAS 50Ω REF ( ) ( ) VOUT VIN VOUT VIN 50Ω MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS. INSERTION LOSS IS MEASURED BETWEEN R0 AND R1 OR R2 ON EACH SWITCH. CROSSTALK IS MEASURED FROM ONE CHANNEL TO THE OTHER CHANNEL. SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED. Figure 3. Insertion Loss and Crosstalk 5 MAX4885AE Test Circuits/Timing Diagrams High-Bandwidth, VGA 2:1 Switch with ±15kV ESD Protection MAX4885AE Pin Configuration B1 H1 V1 I.C. V2 H2 B2 TOP VIEW 21 20 19 18 17 16 15 14 G1 22 G2 R1 23 13 R2 SCL1 24 12 SCL2 11 SDA2 10 VCC 9 VL 8 SEL2 MAX4885AE SDA1 25 GND 26 VCC 27 *EP + 4 5 6 7 V0 SDA0 SCL0 R0 3 B0 2 H0 1 G0 SEL1 28 TQFN (4mm × 4mm) *EXPOSED PAD. CONNECT TO GROUND OR LEAVE UNCONNECTED. Pin Description 6 PIN NAME 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 R0 G0 B0 H0 V0 SDA0 SCL0 SEL2 VL VCC SDA2 SCL2 R2 G2 B2 H2 V2 I.C. V1 H1 B1 FUNCTION RGB Red Output (Note 4) RGB Green Output (Note 4) RGB Blue Output (Note 4) Horizontal Sync Output (Note 4) Vertical Sync Output (Note 4) I2C Data Output (Note 4) I2C Clock Output (Note 4) Select Input 2. Switches SDA_ and SCL_ signals. Supply Voltage. +2.2V P VL P VCC. Bypass VL to GND with a 1FF or larger ceramic capacitor. Supply Voltage. VCC = +5.0V Q10%. Bypass VCC to GND with a 1FF or larger ceramic capacitor. I2C Input Data 2 (Note 5) I2C Input Clock 2 (Note 5) RGB Red Input 2 (Note 6) RGB Green Input 2 (Note 6) RGB-Blue Input 2 (Note 6) Horizontal Sync Input 2 (Note 7) Vertical Sync Input 2 (Note 7) Internal Connection. Connect to ground or leave unconnected. Vertical Sync Input 1 (Note 7) Horizontal Sync Input 1 (Note 7) RGB Blue Input 1 (Note 6) High-Bandwidth, VGA 2:1 Switch with ±15kV ESD Protection PIN NAME 22 23 24 25 26 27 28 — G1 R1 SCL1 SDA1 GND VCC SEL1 EP Note Note Note Note 4: 5: 6: 7: FUNCTION RGB Green Input 1 (Note 6) RGB Red Input 1 (Note 6) I2C Clock Input 1 (Note 5) I2C Data Input 1 (Note 5) Ground +5V Supply Pin Select Input 1. Switches R_, G_, B_, H_, and V_ signals. Exposed Pad. Connect exposed pad to ground or leave unconnected. Terminal with Q15kV HBM protection. SCL1, SCL2, SDA1, and SDA2 are identical and can be used interchangeably. R1, R2, G1, G2, B1, and B2 are identical and can be used interchangeably. H1, H2, V1, and V2 are identical and can be used interchangeably. Typical Applications Circuit +5.0V +3.3V 0.1µF 3.3kΩ 0.1µF 3.3kΩ 24 25 20 19 SCL SDA H MXM V GRAPHICS R G B 9 23 22 21 10, 27 MAX4885AE +3.3V 3.3kΩ SCL SDA H INTERNAL V GRAPHICS R G B 3.3kΩ 12 11 16 17 13 14 15 26, EP 28 8 SEL1 SEL2 7 SCL 6 SDA 4 H 5 V 1 R 2 G 3 B VGA COMMON OUTPUT NOTE: TWO VIDEO INPUT SOURCES BEING SWITCHED INTO ONE OUTPUT/SINK USING MAX4885AE. 7 MAX4885AE Pin Description (continued) High-Bandwidth, VGA 2:1 Switch with ±15kV ESD Protection MAX4885AE Functional Diagram R1 R0 R2 G1 G0 G2 B1 B0 B2 SCL1 SCL0 VL SCL2 VL SDA1 SDA0 VL SDA2 VL MAX4885AE H1 H0 H2 V1 V0 V2 SEL1 SEL2 8 CONTROL High-Bandwidth, VGA 2:1 Switch with ±15kV ESD Protection The MAX4885AE integrates high-bandwidth analog switches and level-translating buffers to implement a complete 2:1 multiplexer for VGA signals. The device provides switching for RGB, HSYNC, VSYNC, SDA, and SCL signals. These signals are required in notebook VGA switching applications. The HSYNC and VSYNC inputs feature level-shifting buffers to support 5V-TTL output logic levels from lowvoltage graphics controllers. These buffered switches can be driven from +2.0V up to +5.5V. RGB signals are routed with high-performance analog switches. SDA_ and SCL_ are I2C signals with pullups to their respective voltages. The MAX4885AE protects the low-voltage side while effectively translating up to the high-voltage level. Two select inputs are provided to individually select groups of switches. RGB, HSYNC, and VSYNC signals are controlled by SEL1; and both SDA_ and SCL_ signals are controlled by SEL2. Table 1. RGB/HV Truth Table SEL1 FUNCTION 0 R1 to R0 G1 to G0 B1 to B0 H1 to H0 V1 to V0 1 R2 to R0 G2 to G0 B2 to B0 H2 to H0 V2 to V0 FUNCTION 0 SDA1 to SDA0 SCL1 to SCL0 1 SDA2 to SDA0 SCL2 to SCL0 Horizontal/Vertical Sync Level Shifter H1, H2, V1, and V2 inputs are buffered to provide levelshifting and drive capability for horizontal/vertical sync signals that meet the VESA specification. The H_ and V_ level-shifters are identical, and each level-shifter can be used for either horizontal or vertical signals. The SDA0 and SCL0 outputs are ESD protected to Q15kV (HBM). Display-Data Channel Multiplexer The MAX4885AE provides two logic-level translating switches to route DDC signals (see Table 2). VL is normally set to +3.3V to provide logic-shifting for VESA I2C-compatible signals. The MAX4885AE protects the low-voltage graphics controller from +5V that could be present in VESA-compatible monitors. In some applications, such as KVM, where logic-level shifting is not required, then VL can be connected to VCC. The SDA_ and SCL_ switches are identical, and each switch can be used to route either SDA_ or SCL_ signals. The SDA0 and SCL0 outputs are ESD protected to Q15kV (HBM). ESD Protection Table 2. DDC Truth Table SEL2 RGB Switches The MAX4885AE provides three SPDT high-bandwidth switches to route standard VGA R_, G_, and B_ signals (see Table 1). The R_, G_, and B_ analog switches are identical and any of the three switches can be used to route red, green, or blue video signals. The R0, G0, and B0 outputs are ESD protected to Q15kV (HBM). As with all Maxim devices, ESD-protection structures are incorporated on all pins to protect against electrostatic discharges encountered during handling and assembly. Additionally, the R0, G0, B0, H0, V0, SDA0, and SCL0 terminals of the MAX4885AE are designed for protection to the following limit: ±15kV using the HBM. For optimum ESD performance, bypass VCC and VL pins to ground with 1FF or larger ceramic capacitors as close as possible to these supply pins. 9 MAX4885AE Detailed Description MAX4885AE High-Bandwidth, VGA 2:1 Switch with ±15kV ESD Protection RC 1MΩ CHARGE-CURRENTLIMIT RESISTOR HIGHVOLTAGE DC SOURCE CS 100pF RD 1.5kΩ IP 100% 90% DISCHARGE RESISTANCE STORAGE CAPACITOR Ir PEAK-TO-PEAK RINGING (NOT DRAWN TO SCALE) AMPERES DEVICE UNDER TEST Figure 4. Human Body ESD Test Model Human Body Model Figure 4 shows the HBM, and Figure 5 shows the current waveform it generates when discharged into a lowimpedance state. This model consists of a 100pF capacitor charged to the ESD voltage of interest, which is then discharged into the device through a 1.5kI resistor. 36.8% 10% 0 0 TIME tRL tDL CURRENT WAVEFORM Figure 5. Human Body Model Current Waveform Power-Supply Decoupling Bypass each VCC pin and VL pin to ground with a 1FF or larger ceramic capacitor as close as possible to the device. PCB Layout ESD performance depends on a variety of conditions. Contact Maxim for a reliability report, test setup, methodology, and results. High-speed switches such as the MAX4885AE requires proper PCB layout for optimum performance. Ensure that impedance-controlled PCB traces for high-speed signals are matched in length and as short as possible. Connect the exposed pad to ground or leave unconnected. Applications Information Chip Information ESD Test Conditions The MAX4885AE provides the switching and levelshifting necessary to drive a standard VGA port from either an internal graphics controller or an add-in module (MXM or GPU—see Typical Applications Circuit). The R_, G_, and B_ signals are switched through the three low-capacitance SPDT switches. Internal buffers drive the HSYNC and VSYNC signals to VGA standard 5V-TTL levels. The DDC multiplexer provides level-shifting. Connect VL to +3.3V for normal operation, or to VCC to disable level-shifting for DDC signals as for KVM application. PROCESS: BiCMOS Package Information For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE PACKAGE CODE DOCUMENT NO. 28 TQFN-EP T2844+1 21-0139 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 10 © 2009 Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.