SN74LS153 Dual 4-Input Multiplexer The LSTTL/MSI SN74LS153 is a very high speed Dual 4-Input Multiplexer with common select inputs and individual enable inputs for each section. It can select two bits of data from four sources. The two buffered outputs present data in the true (non-inverted) form. In addition to multiplexer operation, the LS153 can generate any two functions of three variables. The LS153 is fabricated with the Schottky barrier diode process for high speed and is completely compatible with all ON Semiconductor TTL families. • • • • http://onsemi.com LOW POWER SCHOTTKY Multifunction Capability Non-Inverting Outputs Separate Enable for Each Multiplexer Input Clamp Diodes Limit High Speed Termination Effects 16 GUARANTEED OPERATING RANGES Symbol VCC Parameter Supply Voltage Min Typ Max Unit 4.75 5.0 5.25 V 0 25 70 °C TA Operating Ambient Temperature Range IOH Output Current – High –0.4 mA IOL Output Current – Low 8.0 mA 1 PLASTIC N SUFFIX CASE 648 16 1 SOIC D SUFFIX CASE 751B 16 1 SOEIAJ M SUFFIX CASE 966 ORDERING INFORMATION Device Package Shipping SN74LS153N 16 Pin DIP 2000 Units/Box SN74LS153D SOIC–16 38 Units/Rail SN74LS153DR2 SOIC–16 2500/Tape & Reel SN74LS153M SOEIAJ–16 See Note 1 SN74LS153MEL SOEIAJ–16 See Note 1 1. For ordering information on the EIAJ version of the SOIC package, please contact your local ON Semiconductor representative. Semiconductor Components Industries, LLC, 2001 October, 2001 – Rev. 7 1 Publication Order Number: SN74LS153/D SN74LS153 CONNECTION DIAGRAM DIP (TOP VIEW) VCC 16 S0 14 Eb 15 I3b 13 I2b 12 I1b 11 I0b 10 Zb 9 NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual InLine Package. 1 Ea 2 S1 3 I3a 4 I2a 5 I1a 6 I0a 7 Za 8 GND LOADING (Note a) PIN NAMES S0 E I0, I1 Z Common Select Input Enable (Active LOW) Input Multiplexer Inputs Multiplexer Output HIGH LOW 0.5 U.L. 0.5 U.L. 0.5 U.L. 10 U.L. 0.25 U.L. 0.25 U.L. 0.25 U.L. 5 U.L. NOTES: a) 1 TTL Unit Load (U.L.) = 40 A HIGH/1.6 mA LOW. LOGIC SYMBOL 1 14 2 6 5 4 3 10 11 12 13 15 Ea I0a I1a I2a I3a S0 Sa I0b I1b I2b I3b Eb Za Zb 7 9 VCC = PIN 16 GND = PIN 8 http://onsemi.com 2 SN74LS153 LOGIC DIAGRAM Ea I0a 1 6 I1a I2a 5 4 I3a 3 S1 2 S0 14 I0b 10 I1b 12 VCC = PIN 16 GND = PIN 8 = PIN NUMBERS 7 Za I2b 11 I3b Eb 13 15 9 Zb FUNCTIONAL DESCRIPTION Za = Ea ⋅ (I0a ⋅ S1 ⋅ S0 + I1a ⋅ S1 ⋅ S0 + I2a ⋅ S1 ⋅ S0 + I3a ⋅ S1 ⋅ S0) The LS153 is a Dual 4-input Multiplexer fabricated with Low Power, Schottky barrier diode process for high speed. It can select two bits of data from up to four sources under the control of the common Select Inputs (S0, S1). The two 4-input multiplexer circuits have individual active LOW Enables (Ea, Eb) which can be used to strobe the outputs independently. When the Enables (Ea, Eb) are HIGH, the corresponding outputs (Za, Zb) are forced LOW. The LS153 is the logic implementation of a 2-pole, 4-position switch, where the position of the switch is determined by the logic levels supplied to the two Select Inputs. The logic equations for the outputs are shown below. Zb = Eb ⋅ (I0b ⋅ S1 ⋅ S0 + I1b ⋅ S1 ⋅ S0 + I2b ⋅ S1 ⋅ S0 + I3b ⋅ S1 ⋅ S0) The LS153 can be used to move data from a group of registers to a common output bus. The particular register from which the data came would be determined by the state of the Select Inputs. A less obvious application is a function generator. The LS153 can generate two functions of three variables. This is useful for implementing highly irregular random logic. TRUTH TABLE SELECT INPUTS INPUTS (a or b) OUTPUT S0 S1 E I0 I1 I2 I3 Z X L L H H L L H H X L L L L H H H H H L L L L L L L L X L H X X X X X X X X X L H X X X X X X X X X L H X X X X X X X X X L H L L H L H L H L H H = HIGH Voltage Level L = LOW Voltage Level X = Don’t Care http://onsemi.com 3 SN74LS153 DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified) Limits Symbol Min Parameter VIH Input HIGH Voltage VIL Input LOW Voltage VIK Input Clamp Diode Voltage VOH Output HIGH Voltage VOL Output LOW Voltage IIH Input HIGH Current IIL Input LOW Current IOS Short Circuit Current (Note 2) Typ Max Unit 2.0 0.8 –0.65 2.7 –1.5 3.5 Test Conditions V Guaranteed Input HIGH Voltage for All Inputs V Guaranteed Input LOW Voltage for All Inputs V VCC = MIN, IIN = –18 mA V VCC = MIN, IOH = MAX, VIN = VIH or VIL per Truth Table VCC = VCC MIN, VIN = VIL or VIH per Truth Table 0.25 0.4 V IOL = 4.0 mA 0.35 0.5 V IOL = 8.0 mA 20 µA VCC = MAX, VIN = 2.7 V 0.1 mA VCC = MAX, VIN = 7.0 V –0.4 mA VCC = MAX, VIN = 0.4 V –100 mA VCC = MAX ICC Power Supply Current 10 mA 2. Not more than one output should be shorted at a time, nor for more than 1 second. VCC = MAX –20 AC CHARACTERISTICS (TA = 25°C) Limits Typ Max Unit tPLH tPHL Propagation Delay Data to Output 10 17 15 26 ns Figure 2 tPLH tPHL Propagation Delay Select to Output 19 25 29 38 ns Figure 1 tPLH tPHL Propagation Delay Enable to Output 16 21 24 32 ns Figure 2 Symbol Min Parameter Test Conditions VCC = 5.0 V CL = 15 pF AC WAVEFORMS VIN VOUT 1.3 V 1.3 V VIN tPHL tPLH 1.3 V 1.3 V VOUT Figure 1. 1.3 V tPHL tPLH 1.3 V 1.3 V Figure 2. http://onsemi.com 4 1.3 V SN74LS153 PACKAGE DIMENSIONS N SUFFIX PLASTIC PACKAGE CASE 648–08 ISSUE R NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. –A– 16 9 1 8 B F C L S –T– SEATING PLANE K H G D M J 16 PL 0.25 (0.010) M T A M http://onsemi.com 5 DIM A B C D F G H J K L M S INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0 10 0.020 0.040 MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0 10 0.51 1.01 SN74LS153 PACKAGE DIMENSIONS D SUFFIX PLASTIC SOIC PACKAGE CASE 751B–05 ISSUE J –A– 16 9 1 8 –B– P NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 8 PL 0.25 (0.010) M B S G R K F X 45 C –T– SEATING PLANE J M D 16 PL 0.25 (0.010) M T B S A S http://onsemi.com 6 DIM A B C D F G J K M P R MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0 7 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0 7 0.229 0.244 0.010 0.019 SN74LS153 PACKAGE DIMENSIONS M SUFFIX SOEIAJ PACKAGE CASE 966–01 ISSUE O 16 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). LE 9 Q1 M E HE 1 8 L DETAIL P Z D e VIEW P A A1 b 0.13 (0.005) c M 0.10 (0.004) http://onsemi.com 7 DIM A A1 b c D E e HE L LE M Q1 Z MILLIMETERS MIN MAX --2.05 0.05 0.20 0.35 0.50 0.18 0.27 9.90 10.50 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 0 0.70 0.90 --0.78 INCHES MIN MAX --0.081 0.002 0.008 0.014 0.020 0.007 0.011 0.390 0.413 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 0 0.028 0.035 --0.031 SN74LS153 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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