19-5187; Rev 3; 7/11 TION KIT EVALUA BLE IL AVA A High-Voltage HB LED Drivers with Integrated High-Side Current Sense The MAX16833/MAX16833B/MAX16833C/MAX16833D/ MAX16833E are peak current-mode-controlled LED drivers for boost, buck-boost, SEPIC, flyback, and high-side buck topologies. A dimming driver designed to drive an external p-channel in series with the LED string provides wide-range dimming control. This feature provides extremely fast PWM current switching to the LEDs with no transient overvoltage or undervoltage conditions. In addition to PWM dimming, the ICs provide analog dimming using a DC input at ICTRL. The ICs sense the LED current at the high side of the LED string. A single resistor from RT/SYNC to ground sets the switching frequency from 100kHz to 1MHz, while an external clock signal capacitively coupled to RT/SYNC allows the ICs to synchronize to an external clock. In the MAX16833/MAX16833C/MAX16833E, the switching frequency can be dithered for spread-spectrum applications. The MAX16833B/MAX16833D instead provide a 1.64V reference voltage with a 2% tolerance. The ICs operate over a wide 5V to 65V supply range and include a 3A sink/source gate driver for driving a power MOSFET in high-power LED driver applications. Additional features include a fault-indicator output (FLT) for short or overtemperature conditions and an overvoltage-protection sense input (OVP) for overvoltage protection. High-side current sensing combined with a p-channel dimming MOSFET allow the positive terminal of the LED string to be shorted to the positive input terminal or to the negative input terminal without any damage. This is a unique feature of the ICs. Applications Automotive Exterior Lighting: High-Beam/Low-Beam/Signal/Position Lights Daytime Running Lights (DRLs) Fog Light and Adaptive Front Light Assemblies Features S Boost, SEPIC, and Buck-Boost Single-Channel LED Drivers S +5V to +65V Wide Input Voltage Range with a Maximum 65V Boost Output S Integrated High-Side Current-Sense Amplifier S ICTRL Pin for Analog Dimming S Integrated High-Side pMOS Dimming MOSFET Driver (Allows Single-Wire Connection to LEDs) S Programmable Operating Frequency (100kHz to 1MHz) with Synchronization Capability S Frequency Dithering for Spread-Spectrum Applications (MAX16833/MAX16833C/MAX16833E) S 2% Accurate 1.64V Reference (MAX16833B/ MAX16833D) S Full-Scale, High-Side, Current-Sense Voltage of 200mV S Short-Circuit, Overvoltage, and Thermal Protection S Fault Indicator Output S -40NC to +125NC Operating Temperature Range S Thermally Enhanced 5mm x 4.4mm, 16-Pin TSSOP Package with Exposed Pad Simplified Operating Circuit 6V TO 18V WITH LOAD DUMP UP TO 70V IN PWMDIM CS OVP ISENSE+ PWMDIM ISENSEDIMOUT MAX16833 MAX16833AUE+ MAX16833AUE/V+ LED+ PGND Commercial, Industrial, and Architectural Lighting PART NDRV LED- Ordering Information TEMP RANGE PIN-PACKAGE FUNCTIONALITY MAX DUTY CYCLE (%) FAULT OUTPUT BLANKING -40°C to +125°C 16 TSSOP-EP* Frequency Dithering 88.5 Yes 16 TSSOP-EP* Frequency Dithering 88.5 Yes -40°C to +125°C +Denotes a lead(Pb)-free/RoHS-compliant package. *EP = Exposed pad. /V denotes an automotive qualified part. Ordering Information continued at end of data sheet. ________________________________________________________________ Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. MAX16833/MAX16833B−MAX16833E General Description MAX16833/MAX16833B−MAX16833E High-Voltage HB LED Drivers with Integrated High-Side Current Sense ABSOLUTE MAXIMUM RATINGS IN to PGND............................................................ -0.3V to +70V ISENSE+, ISENSE-, DIMOUT to PGND................. -0.3V to +80V DIMOUT to ISENSE+................................................-9V to +0.3V ISENSE- to ISENSE+.............................................-0.6V to +0.3V PGND to SGND.....................................................-0.3V to +0.3V VCC to PGND...........................................................-0.3V to +9V NDRV to PGND......................................... -0.3V to (VCC + 0.3V) OVP, PWMDIM, COMP, LFRAMP, REF, ICTRL, RT/SYNC, FLT to SGND....................................-0.3V to +6.0V CS to PGND..........................................................-0.3V to +6.0V Continuous Current on IN.................................................100mA Peak Current on NDRV......................................................... Q3A Continuous Current on NDRV........................................ Q100mA Short-Circuit Duration on VCC. ..................................Continuous Continuous Power Dissipation (TA = +70NC) 16-Pin TSSOP (derate 26.1mW/NC above +70NC) ......2089mW Junction-to-Case Thermal Resistance (BJC) (Note 1) 16-Pin TSSOP.............................................................. +3NC/W Junction-to-Ambient Thermal Resistance (BJA) (Note 1) 16-Pin TSSOP......................................................... +38.3NC/W Operating Temperature Range . ..................... -40NC to +125NC Junction Temperature......................................................+150NC Storage Temperature Range............................. -65NC to +150NC Lead Temperature (soldering, 10s).................................+300NC Soldering Temperature (reflow).......................................+260NC Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a fourlayer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VIN = 12V, RRT = 12.4kI, CIN = CVCC = 1µF, CLFRAMP/CREF = 0.1µF, NDRV = COMP = DIMOUT = PWMDIM = FLT = unconnected, VOVP = VCS = VPGND = VSGND = 0V, VISENSE+ = VISENSE- = 45V, VICTRL = 1.40V, TA = TJ = -40NC to +125NC, unless otherwise noted. Typical values are at TA = +25NC.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 65 V PWMDIM = 0, no switching 1.5 2.5 Switching 2.5 4 SYSTEM SPECIFICATIONS Operational Supply Voltage Supply Current Undervoltage Lockout (UVLO) VIN IINQ 5 UVLORIN VIN rising 4.2 4.55 4.85 UVLOFIN VIN falling, IVCC = 35mA 4.05 4.3 4.65 UVLO Hysteresis Startup Delay UVLO Falling Delay tSTART_DELAY During power-up tFALL_DELAY During power-down mA V 250 mV 1024 Clock Cycles 3.3 Fs VCC LDO REGULATOR Regulator Output Voltage VCC 0.1mA P IVCC P 50mA, 9V P VIN P 14V 14V P VIN P 65V, IVCC = 10mA Dropout Voltage VDOVCC IVCC = 50mA, VIN = 5V Short-Circuit Current IMAXVCC VCC = 0V, VIN = 5V 6.75 55 6.95 7.15 V 0.15 0.35 V 100 150 mA 1000 kHz OSCILLATOR (RT/SYNC) Switching Frequency Range fSW Bias Voltage at RT/SYNC VRT Maximum Duty Cycle DMAX 100 1 VCS = 0V; MAX16833/MAX16833B/ MAX16833E only 87.5 88.5 89.5 VCS = 0V; MAX16833C/MAX16833D only 93 94 95 VRT rising 3.8 Oscillator Frequency Accuracy -5 Synchronization Logic-High Input VIH-SYNC Synchronization Frequency Range fSYNCIN V 1.1fSW 2 _______________________________________________________________________________________ +5 % % V 1.7fSW High-Voltage HB LED Drivers with Integrated High-Side Current Sense (VIN = 12V, RRT = 12.4kI, CIN = CVCC = 1µF, CLFRAMP/CREF = 0.1µF, NDRV = COMP = DIMOUT = PWMDIM = FLT = unconnected, VOVP = VCS = VPGND = VSGND = 0V, VISENSE+ = VISENSE- = 45V, VICTRL = 1.40V, TA = TJ = -40NC to +125NC, unless otherwise noted. Typical values are at TA = +25NC.) (Note 2) PARAMETER SLOPE COMPENSATION SYMBOL Slope Compensation Current-Ramp Height ISLOPE CONDITIONS Ramp peak current added to CS input per switching cycle MIN TYP MAX UNITS 46 50 54 FA DITHERING RAMP GENERATOR (LFRAMP) (MAX16833/MAX16833C/MAX16833E only) Charging Current VLFRAMP = 0V 80 100 120 FA Discharging Current VLFRAMP = 2.2V 80 100 120 FA Comparator High Trip Threshold 2 V Comparator Low Trip Threshold VRT V REFERENCE OUTPUT (REF) (MAX16833B/MAX16833D only) Reference Output Voltage VREF IREF = 0 to 80FA 1.604 1.636 1.669 V 0 35 200 nA 200 400 700 FA ANALOG DIMMING (ICTRL) Input-Bias Current IBICTRL VICTRL = 0.62V LED CURRENT-SENSE AMPLIFIER ISENSE+ Input-Bias Current ISENSE+ Input-Bias Current with DIM Low ISENSE- Input-Bias Current IBISENSE+ VISENSE+ = 65V, VISENSE- = 64.8V IBISENSE+OFF VISENSE+ = 48V, VISENSE- = 48V, PWMDIM = 0 IBISENSE- VISENSE+ = 65V, VISENSE- = 64.8V 200 2 Voltage Gain 5 FA 8 6.15 VICTRL = 1.4V Current-Sense Voltage VSENSE VICTRL = 0.2465V Bandwidth BW 195 VICTRL = 0.616V 199 203 100 38.4 AVDC - 3dB 40 FA V/V mV 41.4 5 MHz COMP Transconductance GMCOMP 2100 Open-Loop DC Gain AVOTA COMP Input Leakage ILCOMP -300 ISINK 100 ISOURCE 100 COMP Sink Current COMP Source Current 3500 4900 75 FS dB +300 nA 400 700 FA 400 700 FA PWM COMPARATOR Input Offset Voltage VOS-PWM Leading-Edge Blanking Propagation Delay to NDRV tON(MIN) Includes leading-edge blanking time with 10mV overdrive 2 V 50 ns 55 80 110 ns 406 418 430 mV CS LIMIT COMPARATOR Current-Limit Threshold CS Limit-Comparator Propagation Delay to NDRV Leading-Edge Blanking VCS_LIMIT tCS_PROP 10mV overdrive (excluding leading-edge blanking time) 30 ns 50 ns _______________________________________________________________________________________ 3 MAX16833/MAX16833B−MAX16833E ELECTRICAL CHARACTERISTICS (continued) MAX16833/MAX16833B−MAX16833E High-Voltage HB LED Drivers with Integrated High-Side Current Sense ELECTRICAL CHARACTERISTICS (continued) (VIN = 12V, RRT = 12.4kI, CIN = CVCC = 1µF, CLFRAMP/CREF = 0.1µF, NDRV = COMP = DIMOUT = PWMDIM = FLT = unconnected, VOVP = VCS = VPGND = VSGND = 0V, VISENSE+ = VISENSE- = 45V, VICTRL = 1.40V, TA = TJ = -40NC to +125NC, unless otherwise noted. Typical values are at TA = +25NC.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS GATE DRIVER (NDRV) Peak Pullup Current INDRVPU VCC = 7V, VNDRV = 0V 3 Peak Pulldown Current INDRVPD VCC = 7V, VNDRV = 7V 3 A A Rise Time tr CNDRV = 10nF 30 ns Fall Time tf CNDRV = 10nF 30 ns RDSON Pulldown nMOS RNDRVON VCOMP = 0V, ISINK = 100mA 0.25 0.6 1.1 1.19 1.225 1.26 I PWM DIMMING (PWMDIM) ON Threshold VPWMON Hysteresis VPWMHY Pullup Resistance RPWMPU 70 1.7 3 V mV 4.5 MI PWMDIM to LED Turn-Off Time PWMDIM falling edge to rising edge on DIMOUT, CDIMOUT = 7nF 2 Fs PWMDIM to LED Turn-On Time PWMDIM rising edge to falling edge on DIMOUT, CDIMOUT = 7nF 3 Fs pMOS GATE DRIVER (DIMOUT) Peak Pullup Current IDIMOUTPU VPWMDIM = 0V, VISENSE+ - VDIMOUT = 7V 25 50 80 mA Peak Pulldown Current IDIMOUTPD VISENSE+ - VDIMOUT = 0V 10 25 45 mA -8.7 -7.4 -6.3 V 1.19 1.225 1.26 DIMOUT Low Voltage with Respect to VISENSE+ OVERVOLTAGE PROTECTION (OVP) Threshold VOVPOFF Hysteresis VOVPHY Input Leakage ILOVP VOVP rising 70 VOVP = 1.235V -300 VSHORT-HIC (VISENSE+ - VISENSE-) rising 285 V mV +300 nA SHORT-CIRCUIT HICCUP MODE Short-Circuit Threshold Hiccup Time tHICCUP Delay in Short-Circuit Hiccup Activation 298 310 mV 8192 Clock Cycles 1 Fs BUCK-BOOST SHORT-CIRCUIT DETECT Buck-Boost Short-Circuit Threshold Delay in FLT Assertion from Buck-Boost Short-Circuit Condition (except MAX16833E) Delay in FLT Deassertion After Buck-Boost Short Circuit is Removed (Consecutive ClockCycle Count) (except MAX16833E) VSHORT-BB tDEL-BB-SHRT (VISENSE+ - VIN) falling, VIN = 12V 1.15 1.55 1.9 V Counter increments only when VPWMDIM > VPWMON 8192 Clock Cycles Counter increments only when VPWMDIM > VPWMON 8192 Clock Cycles 4 _______________________________________________________________________________________ High-Voltage HB LED Drivers with Integrated High-Side Current Sense (VIN = 12V, RRT = 12.4kI, CIN = CVCC = 1µF, CLFRAMP/CREF = 0.1µF, NDRV = COMP = DIMOUT = PWMDIM = FLT = unconnected, VOVP = VCS = VPGND = VSGND = 0V, VISENSE+ = VISENSE- = 45V, VICTRL = 1.40V, TA = TJ = -40NC to +125NC, unless otherwise noted. Typical values are at TA = +25NC.) (Note 2) PARAMETER SYMBOL OPEN-DRAIN FAULT (FLT) Output Voltage Low CONDITIONS MIN VIN = 4.75V, VOVP = 2V, and ISINK = 5mA VOL-FLT Output Leakage Current TYP MAX UNITS 40 200 mV 1 FA VFLT = 5V THERMAL SHUTDOWN Thermal-Shutdown Temperature Temperature rising Thermal-Shutdown Hysteresis +160 NC 10 NC Note 2: All devices are 100% tested at TA = +25NC. Limits over temperature are guaranteed by design. Typical Operating Characteristics (VIN = +12V, CVIN = CVCC = 1FF, CLFRAMP/CREF = 0.1FF, TA = +25NC, unless otherwise noted.) 4.6 4.5 4.4 VPWMDIM = 0V VIN FALLING 4.3 4.2 3 2 1 10 35 60 85 110 125 1.0 -15 10 35 60 85 1 110 125 100 10 TEMPERATURE (°C) VIN (V) VCC vs. IVCC VCC vs. TEMPERATURE DIMOUT (WITH RESPECT TO ISENSE+) vs. TEMPERATURE 7.00 VCC (V) 6.90 6.85 6.95 6.90 6.85 6.80 6.80 6.75 10 15 20 25 30 35 40 45 50 IVCC (mA) MAX16833 toc06 7.05 -6.2 DIMOUT (WITH RESPECT TO ISENSE+) (V) 7.10 MAX16833 toc04 6.95 5 1.5 TEMPERATURE (°C) 7.00 0 VIN ~ 4.6V 2.0 0 -40 MAX16833 toc05 -15 VPWMDIM = 0V 0.5 0 -40 VCC (V) 2.5 QUIESCENT CURRENT (mA) VIN RISING QUIESCENT CURRENT vs. VIN MAX16833 toc02 4.7 4 QUIESCENT CURRENT (mA) MAX16833 toc01 IN RISING/FALLING UVLO THRESHOLD (V) 4.8 QUIESCENT CURRENT vs. TEMPERATURE MAX16833 toc03 IN RISING/FALLING UVLO THRESHOLD vs. TEMPERATURE -6.7 -7.2 -7.7 -8.2 -8.7 6.75 -40 -15 10 35 60 TEMPERATURE (°C) 85 110 125 -40 -15 10 35 60 85 110 125 TEMPERATURE (°C) _______________________________________________________________________________________ 5 MAX16833/MAX16833B−MAX16833E ELECTRICAL CHARACTERISTICS (continued) Typical Operating Characteristics (continued) (VIN = +12V, CVIN = CVCC = 1FF, CLFRAMP/CREF = 0.1FF, TA = +25NC, unless otherwise noted.) DIMOUT FALL TIME vs. TEMPERATURE DIMOUT RISE TIME vs. TEMPERATURE 2.0 1.8 1.6 1.4 MAX16833 toc08 3.5 DIMOUT FALL TIME (µs) 2.2 DIMOUT RISE TIME (µs) 4.0 MAX16833 toc07 2.4 3.0 2.5 2.0 1.2 CDIMOUT = 6.8nF CDIMOUT = 6.8nF 1.0 1.5 -40 -15 10 35 60 85 TEMPERATURE (°C) 110 125 -40 -15 10 110 125 1.20 1.40 VSENSE vs. VICTRL 180 VSENSE (mV) 202 201 200 199 198 160 140 120 100 80 60 40 20 0 197 196 195 -40 -15 10 35 60 85 0 110 125 0.20 0.40 0.60 0.80 1.00 TEMPERATURE (°C) VICTRL (V) OSCILLATOR FREQUENCY vs. TEMPERATURE (MAX16833/MAX16833B/MAX16833E ONLY) OSCILLATOR FREQUENCY vs. 1/RRT CONDUCTANCE (MAX16833/MAX16833B/MAX16833E ONLY) RRT = 24.9kI 308 306 304 302 300 298 296 294 292 1100 1000 OSCILLATOR FREQUENCY (kHz) MAX16833 toc11 310 MAX16833 toc12 VSENSE (mV) 85 MAX16833 toc10 203 60 240 220 200 MAX16833 toc09 204 35 TEMPERATURE (°C) VSENSE vs. TEMPERATURE 205 OSCILLATOR FREQUENCY (kHz) MAX16833/MAX16833B−MAX16833E High-Voltage HB LED Drivers with Integrated High-Side Current Sense 900 800 700 600 500 400 300 200 100 290 -40 -15 10 35 60 TEMPERATURE (°C) 85 110 125 0 0.005 0.034 0.063 0.092 0.121 1/RRT (kI-1) 6 _______________________________________________________________________________________ 0.150 High-Voltage HB LED Drivers with Integrated High-Side Current Sense NDRV RISE/FALL TIME vs. TEMPERATURE 600Hz DIMMING OPERATION MAX16833 toc14 MAX16833 toc13 NDRV RISE/FALL TIME (ns) 60 50 VDIMOUT 50V/div 0V NDRV FALL TIME ILED 500mA/div 0mA 40 NDRV RISE TIME 30 0V 0V CNDRV = 10nF PWMDIM = 600Hz 20 -40 -15 10 35 60 85 110 125 VCOMP 2V/div 0V VNDRV 10V/div 0V 400µs/div TEMPERATURE (°C) Pin Configuration TOP VIEW LFRAMP (REF) 1 + 16 IN 15 VCC RT/SYNC 2 SGND 3 ICTRL 4 COMP 5 FLT 6 14 NDRV MAX16833 MAX16833B MAX16833C MAX16833D MAX16833E PWMDIM 7 13 PGND 12 CS 11 ISENSE+ 10 ISENSE- OVP 8 *EP 9 DIMOUT TSSOP *EP = EXPOSED PAD. ( ) FOR MAX16833B/MAX16833D ONLY. _______________________________________________________________________________________ 7 MAX16833/MAX16833B−MAX16833E Typical Operating Characteristics (continued) (VIN = +12V, CVIN = CVCC = 1FF, CLFRAMP/CREF = 0.1FF, TA = +25NC, unless otherwise noted.) MAX16833/MAX16833B−MAX16833E High-Voltage HB LED Drivers with Integrated High-Side Current Sense Pin Description PIN NAME 1 LFRAMP (MAX16833/ MAX16833C/ MAX16833E) FUNCTION Low-Frequency Ramp Output. Connect a capacitor from LFRAMP to ground to program the ramp frequency, or connect to SGND if not used. A resistor can be connected between LFRAMP and RT/ SYNC to dither the PWM switching frequency to achieve spread spectrum. REF 1.64V Reference Output. Connect a 1FF ceramic capacitor from REF to SGND to provide a stable (MAX16833B/ reference voltage. Connect a resistive divider from REF to ICTRL for analog dimming. MAX16833D) PWM Switching Frequency Programming Input. Connect a resistor (RRT) from RT/SYNC to SGND to set the internal clock frequency. Frequency = (7.350 x 109)/RRT for the MAX16833/MAX16833B/ MAX16833E. Frequency = (6.929 x109)/RRT for the MAX16833C/MAX16833D. An external pulse can be applied to RT/SYNC through a coupling capacitor to synchronize the internal clock to the external pulse frequency. The parasitic capacitance on RT/SYNC should be minimized. 2 RT/SYNC 3 SGND Signal Ground 4 ICTRL Analog Dimming-Control Input. The voltage at ICTRL sets the LED current level when VICTRL < 1.2V. For VICTRL > 1.4V, the internal reference sets the LED current. 5 COMP Compensation Network Connection. For proper compensation, connect a suitable RC network from COMP to ground. 6 FLT 7 PWMDIM PWM Dimming Input. When PWMDIM is pulled low, DIMOUT is pulled high and PWM switching is disabled. PWMDIM has an internal pullup resistor, defaulting to a high state when left unconnected. 8 OVP LED String Overvoltage-Protection Input. Connect a resistive divider between ISENSE+, OVP, and SGND. When the voltage on OVP exceeds 1.23V, a fast-acting comparator immediately stops PWM switching. This comparator has a hysteresis of 70mV. 9 DIMOUT Active-Low External Dimming p-Channel MOSFET Gate Driver 10 ISENSE- Negative LED Current-Sense Input. A 100I resistor is recommended to be connected between ISENSE- and the negative terminal of the LED current-sense resistor. This preserves the absolute maximum rating of the ISENSE- pin during LED short circuit. 11 ISENSE+ Positive LED Current-Sense Input. The voltage between ISENSE+ and ISENSE- is proportionally regulated to the lesser of VICTRL or 1.23V. 12 CS 13 PGND Power Ground 14 NDRV External n-channel MOSFET Gate-Driver Output 15 VCC 16 IN Positive Power-Supply Input. Bypass IN to PGND with at least a 1FF ceramic capacitor. — EP Exposed Pad. Connect EP to the ground plane for heatsinking. Do not use EP as the only electrical connection to ground. Active-Low, Open-Drain Fault Indicator Output. See the Fault Indicator (FLT) section. Switching Regulator Current-Sense Input. Add a resistor from CS to switching MOSFET current-sense resistor terminal for programming slope compensation. 7V Low-Dropout Voltage Regulator Output. Bypass VCC to PGND with a 1FF (min) ceramic capacitor. 8 _______________________________________________________________________________________ High-Voltage HB LED Drivers with Integrated High-Side Current Sense IN VCC UVLO 5V REG BG VCC 7V LDO 5V LVSH 5V UVLO THERMAL SHUTDOWN VBG TSHDN NDRV 5V PGND RT/ SYNC RESET DOMINANT RT OSCILLATOR S Q R SLOPE COMPENSATION CS/PWM BLANKING CS MAX DUTY CYCLE 2V RAMP GENERATION PWM COMP 0.42V LFRAMP VBG ICTRL MAX16833 MAX16833C MAX16833E MIN OUT LPF ISENSE+ GM COMP 6.15 ISENSE- SYNC ISENSE+ 3.3V DIMOUT 3MI PWMDIM VISENSE+ - 7V BUCK-BOOST SHORT DETECTION VBG 6.15 x 0.3V FLT 1µs DELAY 8192 x tOSC HICCUP TIMER S R Q TSHDN SGND OVP VBG _______________________________________________________________________________________ 9 MAX16833/MAX16833B−MAX16833E MAX16833/MAX16833C/MAX16833E Functional Diagram MAX16833/MAX16833B−MAX16833E High-Voltage HB LED Drivers with Integrated High-Side Current Sense MAX16833B/MAX16833D Functional Diagram IN VCC UVLO 5V REG BG VCC 7V LDO 5V LVSH 5V UVLO THERMAL SHUTDOWN VBG NDRV 5V TSHDN PGND RT/ SYNC RESET DOMINANT RT OSCILLATOR S Q R SLOPE COMPENSATION CS/PWM BLANKING CS MAX DUTY CYCLE 2V 1.64V (80µA) REFERENCE PWM COMP 0.42V REF VBG ICTRL MAX16833B MAX16833D MIN OUT LPF ISENSE+ GM COMP 6.15 ISENSE- SYNC ISENSE+ 3.3V DIMOUT 3MI PWMDIM BUCK-BOOST SHORT DETECTION FLT VBG 1µs DELAY OVP 6.15 x 0.3V VISENSE+ - 7V 8192 x tOSC HICCUP TIMER S R Q TSHDN SGND VBG 10 ������������������������������������������������������������������������������������� High-Voltage HB LED Drivers with Integrated High-Side Current Sense The MAX16833/MAX16833B/MAX16833C/MAX16833D/ MAX16833E are peak current-mode-controlled LED drivers for boost, buck-boost, SEPIC, flyback, and highside buck topologies. A low-side gate driver capable of sinking and sourcing 3A can drive a power MOSFET in the 100kHz to 1MHz frequency range. Constantfrequency peak current-mode control is used to control the duty cycle of the PWM controller that drives the power MOSFET. Externally programmable slope compensation prevents subharmonic oscillations for duty cycles exceeding 50% when the inductor is operating in continuous conduction mode. Most of the power for the internal control circuitry inside the ICs is provided from an internal 5V regulator. The gate drive for the lowside switching MOSFET is provided by a separate VCC regulator. A dimming driver designed to drive an external p-channel in series with the LED string provides widerange dimming control. This dimming driver is powered by a separate unconnected reference -7V regulator. This feature provides extremely fast PWM current switching to the LEDs with no transient overvoltage or undervoltage conditions. In addition to PWM dimming, the ICs provide analog dimming using a DC input at the ICTRL input. A single resistor from RT/SYNC to ground sets the switching frequency from 100kHz to 1MHz, while an external clock signal capacitively coupled to RT/SYNC allows the ICs to synchronize to an external clock. The switching frequency can be dithered for spread-spectrum applications by connecting the LFRAMP output to RT/SYNC through an external resistor in the MAX16833/MAX16833C/ MAX16833E. In the MAX16833B/MAX16833D, the LFRAMP output is replaced by a REF output, which provides a regulated 1.64V, 2% accurate reference that can be used with a resistive divider from REF to ICTRL to set the LED current. The maximum current from the REF output cannot exceed 80FA. Additional features include a fault-indicator output (FLT) for short, overvoltage, or overtemperature conditions and an overvoltage-protection (OVP) sense input for overvoltage protection. In case of LED string short, for a buck-boost configuration, the short-circuit current is equal to the programmed LED current. In the case of boost configuration, the ICs enter hiccup mode with automatic recovery from short circuit. UVLO The ICs feature undervoltage lockout (UVLO) using the positive power-supply input (IN). The ICs are enabled when VIN exceeds the 4.6V (typ) threshold and are disabled when VIN drops below the 4.35V (typ) threshold. The UVLO is internally fixed and cannot be adjusted. There is a startup delay of 1024 clock cycles on powerup after the UVLO threshold is crossed. There is a 3.3Fs delay on power-down on the falling edge of the UVLO. Dimming MOSFET Driver (DIMOUT) The ICs require an external p-channel MOSFET for PWM dimming. For normal operation, connect the gate of the MOSFET to the output of the dimming driver (DIMOUT). The dimming driver can sink up to 25mA or source up to 50mA of peak current for fast charging and discharging of the p-MOSFET gate. When the PWMDIM signal is high, this driver pulls the p-MOSFET gate to 7V below the ISENSE+ pin to completely turn on the p-channel dimming MOSFET. n-Channel MOSFET Switch Driver (NDRV) The ICs drive an external n-channel switching MOSFET. NDRV swings between VCC and PGND. NDRV can sink/ source 3A of peak current, allowing the ICs to switch MOSFETs in high-power applications. The average current demanded from the supply to drive the external MOSFET depends on the total gate charge (QG) and the operating frequency of the converter, fSW. Use the following equation to calculate the driver supply current INDRV required for the switching MOSFET: INDRV = QG x fSW Pulse-Dimming Input (PWMDIM) The ICs offer a dimming input (PWMDIM) for pulse-width modulating the output current. PWM dimming can be achieved by driving PWMDIM with a pulsating voltage source. When the voltage at PWMDIM is greater than 1.23V, the PWM dimming p-channel MOSFET turns on and the gate drive to the n-channel switching MOSFET is also enabled. When the voltage on PWMDIM drops 70mV below 1.23V, the PWM dimming MOSFET turns off and the n-channel switching MOSFET is also turned off. The COMP capacitor is also disconnected from the internal transconductance amplifier when PWMDIM is low. When left unconnected, a weak internal pullup resistor sets this input to logic-high. ______________________________________________________________________________________ 11 MAX16833/MAX16833B−MAX16833E Detailed Description MAX16833/MAX16833B−MAX16833E High-Voltage HB LED Drivers with Integrated High-Side Current Sense Analog Dimming (ICTRL) The ICs offer an analog dimming control input (ICTRL). The voltage at ICTRL sets the LED current level when VICTRL < 1.2V. The LED current can be linearly adjusted from zero with the voltage on ICTRL. For VICTRL > 1.4V, an internal reference sets the LED current. The maximum withstand voltage of this input is 5.5V. Low-Side Linear Regulator (VCC) The ICs feature a 7V low-side linear regulator (VCC). VCC powers up the switching MOSFET driver with sourcing capability of up to 50mA. Use a 1FF (min) low-ESR ceramic capacitor from VCC to PGND for stable operation. The VCC regulator goes below 7V if the input voltage falls below 7V. The dropout voltage for this regulator at 50mA is 0.2V. This means that for an input voltage of 5V, the VCC voltage is 4.8V. The short-circuit current on the VCC regulator is 100mA (typ). Connect VCC to IN if VIN is always less than 7V. LED Current-Sense Inputs (ISENSE±) The differential voltage from ISENSE+ to ISENSE- is fed to an internal current-sense amplifier. This amplified signal is then connected to the negative input of the transconductance error amplifier. The voltage-gain factor of this amplifier is 6.15. The offset voltage for this amplifier is P 1mV. Internal Transconductance Error Amplifier The ICs have a built-in transconductance amplifier used to amplify the error signal inside the feedback loop. When the dimming signal is low, COMP is disconnected from the output of the error amplifier and DIMOUT goes high. When the dimming signal is high, the output of the error amplifier is connected to COMP and DIMOUT goes low. This enables the compensation capacitor to hold the charge when the dimming signal has turned off the internal switching MOSFET gate drive. To maintain the charge on the compensation capacitor CCOMP (C4 in the Typical Operating Circuits), the capacitor should be a low-leakage ceramic type. When the internal dimming signal is enabled, the voltage on the compensation capacitor forces the converter into steady state almost instantaneously. Internal Oscillator (RT/SYNC) The internal oscillators of the ICs are programmable from 100kHz to 1MHz using a single resistor at RT/SYNC. Use the following formula to calculate the switching frequency: fOSC (kHz) = fOSC (kHz) = 7350 (kΩ) R RT (kΩ) 6929(kΩ) R RT (kΩ) for the MAX16833 MAX16833B MAX16833E for the MAX16833C MAX16833D where RRT is the resistor from RT/SYNC to SGND. Synchronize the oscillator with an external clock by AC-coupling the external clock to the RT/SYNC input. For fOSC between 200kHz and 1MHz, the capacitor used for the AC-coupling should satisfy the following relation: C SYNC ≤ 9.8624 × 10 -6 − 0.144 × 10 -9 farads R RT where RRT is in kω. For fOSC below 200GHz, CSYNC ≤ 268nF. The pulse width for the synchronization pulse should satisfy the following relations: t PW 0.5 t PW 1.05 × t CLK < and < 1 t CLK VS t CLK t OSC t 3.4V < 0.8 - PW VS + VS < 5V t CLK where tPW is the synchronization source pulse width, tCLK is the synchronization clock time period, tOSC is the free-running oscillator time period, and VS is the synchronization pulse-voltage level. Ensure that the external clock signal frequency is at least 1.1 x fOSC, where fOSC is the oscillator frequency set by RRT. A typical pulse width of 200ns can be used for proper synchronization of a frequency up to 250kHz. A rising external clock edge (sync) is interpreted as a synchronization input. If the sync signal is lost, the internal oscillator takes control of the switching rate returning the switching frequency to that set by RRT. This maintains output regulation even with intermittent sync signals. 12 ������������������������������������������������������������������������������������� High-Voltage HB LED Drivers with Integrated High-Side Current Sense Voltage-Reference Output (REF/MAX16833B/MAX16833D) C2 1000pF RT PIN D2 SD103AWS R2 22I GND RRT 24.9I GND Figure 1. SYNC Circuit Figure 1 shows the frequency-synchronization circuit suitable for applications where a 5V amplitude pulse with 20% to 80% duty cycle is available as the synchronization source. This circuit can be used for SYNC frequencies in the 100kHz to 1MHz range. C1 and R2 act as a differentiator that reduces the input pulse width to suit the ICs’ RT/SYNC input. D2 bypasses the negative current through C1 at the falling edge of the SYNC source to limit the minimum voltage at the RT/SYNC pin. The differentiator output is AC-coupled to the RT/SYNC pin through C2. The output impedance of the SYNC source should be low enough to drive the current through R2 on the rising edge. The rise/fall times of the SYNC source should be less than 50ns to avoid excessive voltage drop across C1 during the rise time. The amplitude of the SYNC source can be between 4V and 5V. If the SYNC source amplitude is 5V and the rise time is less than 20ns, then the maximum peak voltage at RT/SYNC pin can get close to 6V. Under such conditions, it is desirable to use a resistor in series with C1 to reduce the maximum voltage at the RT/ SYNC pin. For proper synchronization, the peak SYNC pulse voltage at RT/SYNC pin should exceed 3.8V. Frequency Dithering (LFRAMP/MAX16833/ MAX16833C/MAX16833E) The MAX16833/MAX16833C/MAX16833E feature a low-frequency ramp output. Connect a capacitor from LFRAMP to ground to program the ramp frequency. Connect to SGND if not used. A resistor can be connected between LFRAMP and RT/SYNC to dither the PWM switching frequency to achieve spread spectrum. A lower value resistor provides a larger amount of frequency dithering. The LFRAMP voltage is a triangular waveform between 1V (typ) and 2V (typ). The ramp frequency is given by: fLFRAMP (Hz) = The MAX16833B/MAX16833D have a 2% accurate 1.64V reference voltage on the REF output. Connect a 1FF ceramic capacitor from REF to SGND to provide a stable reference voltage. This reference can supply up to 80µA. This output can drive a resistive divider to the ICTRL input for analog dimming. The resistance from REF to ground should be greater than 20.5kI. Switching MOSFET Current-Sense Input (CS) CS is part of the current-mode control loop. The switching control uses the voltage on CS, set by RCS (R4 in the Typical Operating Circuits) and RSLOPE (R1 in the Typical Operating Circuits), to terminate the on pulse width of the switching cycle, thus achieving peak current-mode control. Internal leading-edge blanking of 50ns is provided to prevent premature turn-off of the switching MOSFET in each switching cycle. Resistor RCS is connected between the source of the n-channel switching MOSFET and PGND. During switching, a current ramp with a slope of 50FA x fSW is sourced from the CS input. This current ramp, along with resistor RSLOPE, programs the amount of slope compensation. Overvoltage-Protection Input (OVP) OVP sets the overvoltage-threshold limit across the LEDs. Use a resistive divider between ISENSE+ to OVP and SGND to set the overvoltage-threshold limit. An internal overvoltage-protection comparator senses the differential voltage across OVP and SGND. If the differential voltage is greater than 1.23V, NDRV goes low, DIMOUT goes high, and FLT asserts. When the differential voltage drops by 70mV, NDRV is enabled, DIMOUT goes low, and FLT deasserts. Fault Indicator (FLT) The ICs feature an active-low, open-drain fault indicator (FLT). FLT goes low when one of the following conditions occur: U Overvoltage across the LED string U Short-circuit condition across the LED string U Overtemperature condition FLT goes high when the fault condition ends. 50FA C LFRAMP (F) ______________________________________________________________________________________ 13 MAX16833/MAX16833B−MAX16833E SYNC C1 680pF MAX16833/MAX16833B−MAX16833E High-Voltage HB LED Drivers with Integrated High-Side Current Sense Applications Information Thermal Protection The ICs feature thermal protection. When the junction temperature exceeds +160NC, the ICs turn off the external power MOSFETs by pulling the NDRV low and DIMOUT high. External MOSFETs are enabled again after the junction temperature has cooled by 10°C. This results in a cycled output during continuous thermal-overload conditions. Thermal protection protects the ICs in the event of fault conditions. Setting the Overvoltage Threshold The overvoltage threshold is set by resistors R5 and R11 (see the Typical Operating Circuits). The overvoltage circuit in the ICs is activated when the voltage on OVP with respect to GND exceeds 1.23V. Use the following equation to set the desired overvoltage threshold: VOV = 1.23V (R5 + R11)/R11 Short-Circuit Protection Boost Configuration In the boost configuration, if the LED string is shorted it causes the (ISENSE+ to ISENSE-) voltage to exceed 300mV. If this condition occurs for R 1Fs, the ICs activates the hiccup timer for 8192 clock cycles during which: U NDRV goes low and DIMOUT goes high. U The error amplifier is disconnected from COMP. Programming the LED Current Normal sensing of the LED current should be done on the high side where the LED current-sense resistor is connected to the boost output. The other side of the LED current-sense resistor goes to the source of the p-channel dimming MOSFET if PWM dimming is desired. The LED current is programmed using R7. When VICTRL > 1.23V, the internal reference regulates the voltage across R7 to 200mV: U FLT is pulled to SGND. After the hiccup time has elapsed, the ICs retry. During this retry period, FLT is latched and is reset only if there is no short detected after 20Fs of retrying. Buck-Boost Configuration In the case of the buck-boost configuration, once an LED string short occurs the behavior is different. The ICs maintain the programmed current across the short. In this case, the short is detected when the voltage between ISENSE+ and IN falls below 1.5V. For all MAX16833 versions except MAX16833E, a buck-boost short fault starts an up counter and FLT is asserted only after the counter has reached 8192 clock cycles consecutively. If for any reason (VISENSE+ - VIN > 1.5V), the counter starts down counting, resulting in FLT being deasserted only after 8192 consecutive clock cycles of (VISENSE+ - VIN > 1.5V) condition. For MAX16833E, there is no counter for FLT assertion and deassertion, so FLT is asserted immediately when the voltage between ISENSE+ and IN falls below 1.5V, and is deasserted immediately when this condition terminates. Exposed Pad The ICs’ package features an exposed thermal pad on its underside that should be used as a heatsink. This pad lowers the package’s thermal resistance by providing a direct heat-conduction path from the die to the PCB. Connect the exposed pad and GND to the system ground using a large pad or ground plane, or multiple vias to the ground plane layer. ILED = 200mV R7 The LED current can also be programmed using the voltage on ICTRL when VICTRL < 1.2V (analog dimming). The voltage on ICTRL can be set using a resistive divider from the REF output in the case of the MAX16833B/ MAX16833D. The current is given by: ILED = VICTRL R7 × 6.15 where: V × R8 VICTRL = REF (R8 + R9) where VREF is 1.64V and resistors R8 and R9 are in ohms. At higher LED currents there can be noticeable ripple on the voltage across R7. High-ripple voltages can cause a noticeable difference between the programmed value of the LED current and the measured value of the LED current. To minimize this error, the ripple voltage across R7 should be less than 40mV. 14 ������������������������������������������������������������������������������������� High-Voltage HB LED Drivers with Integrated High-Side Current Sense Boost Configuration In the boost converter (see the Typical Operating Circuits), the average inductor current varies with the line voltage. The maximum average current occurs at the lowest line voltage. For the boost converter, the average inductor current is equal to the input current. Calculate maximum duty cycle using the following equation: V + VD - VINMIN D MAX = LED VLED + VD - VFET where VLED is the forward voltage of the LED string in volts, VD is the forward drop of rectifier diode D1 in volts (approximately 0.6V), VINMIN is the minimum inputsupply voltage in volts, and VFET is the average drain-tosource voltage of the MOSFET Q1 in volts when it is on. Use an approximate value of 0.2V initially to calculate DMAX. A more accurate value of the maximum duty cycle can be calculated once the power MOSFET is selected based on the maximum inductor current. Use the following equations to calculate the maximum average inductor current ILAVG, peak-to-peak inductor current ripple DIL, and peak inductor current ILP in amperes: IL AVG = ILED 1- D MAX Allowing the peak-to-peak inductor ripple to be DIL, the peak inductor current is given by: IL P = IL AVG + ∆IL 2 The inductance value (L) of inductor L1 in henries (H) is calculated as: -V (V ) × D MAX L = INMIN FET fSW × ∆IL where fSW is the switching frequency in hertz, VINMIN and VFET are in volts, and DIL is in amperes. Choose an inductor that has a minimum inductance greater than the calculated value. The current rating of the inductor should be higher than ILP at the operating temperature. Buck-Boost Configuration In the buck-boost LED driver (see the Typical Operating Circuits), the average inductor current is equal to the input current plus the LED current. Calculate the maximum duty cycle using the following equation: D MAX = VLED + VD VLED + VD + VINMIN - VFET where VLED is the forward voltage of the LED string in volts, VD is the forward drop of rectifier diode D1 (approximately 0.6V) in volts, VINMIN is the minimum input supply voltage in volts, and VFET is the average drain-to-source voltage of the MOSFET Q1 in volts when it is on. Use an approximate value of 0.2V initially to calculate DMAX. A more accurate value of maximum duty cycle can be calculated once the power MOSFET is selected based on the maximum inductor current. Use the equations below to calculate the maximum average inductor current ILAVG, peak-to-peak inductor current ripple DIL, and peak inductor current ILP in amperes: IL AVG = ILED 1- D MAX Allowing the peak-to-peak inductor ripple to be DIL: IL P = IL AVG + ∆IL 2 where ILP is the peak inductor current. The inductance value (L) of inductor L1 in henries is calculated as: L= (VINMIN - VFET ) × D MAX fSW × ∆IL where fSW is the switching frequency in hertz, VINMIN and VFET are in volts, and DIL is in amperes. Choose an inductor that has a minimum inductance greater than the calculated value. Peak Current-Sense Resistor (R4) The value of the switch current-sense resistor R4 for the boost and buck-boost configurations is calculated as follows: R4 = 0.418V - VSC Ω IL P where ILP is the peak inductor current in amperes and VSC is the peak slope compensation voltage. ______________________________________________________________________________________ 15 MAX16833/MAX16833B−MAX16833E Inductor Selection MAX16833/MAX16833B−MAX16833E High-Voltage HB LED Drivers with Integrated High-Side Current Sense Slope Compensation Slope compensation should be added to converters with peak current-mode control operating in continuousconduction mode with more than 50% duty cycle to avoid current-loop instability and subharmonic oscillations. The minimum amount of slope compensation that is required for stability is: VSCMIN = 0.5 (inductor current downslope inductor current upslope) x R4 In the ICs, the slope-compensating ramp is added to the current-sense signal before it is fed to the PWM comparator. Connect a resistor (R1) from CS to the inductor current-sense resistor terminal to program the amount of slope compensation. The ICs generate a current ramp with a slope of 50FA/ tOSC for slope compensation. The current-ramp signal is forced into the external resistor (R1) connected between CS and the source of the external MOSFET, thereby adding a programmable slope compensating voltage (VSCOMP) at the current-sense input CS. Therefore: dVSC/dt = (R1 x 50FA)/tOSC in V/s The minimum value of the slope-compensation voltage that needs to be added to the current-sense signal at peak current and at minimum line voltage is: SC MIN = SC MIN = (D MAX × (VLED - 2VINMIN ) × R4) (V) Boost 2 × L MIN × fSW (D MAX × (VLED - VINMIN ) × R4) (V)Buck-boost 2 × L MIN × fSW where fSW is the switching frequency, DMAX is the maximum duty cycle, which occurs at low line, VINMIN is the minimum input voltage, and LMIN is the minimum value of the selected inductor. For adequate margin, the slope-compensation voltage is multiplied by a factor of 1.5. Therefore, the actual slope-compensation voltage is given by: VSC = 1.5SCMIN From the previous formulas, it is possible to calculate the value of R4 as: For boost configuration: R4 = 0.418V − 2V V INMIN IL P + 0.75D MAX LED L MINfSW For buck-boost configuration: R4 = 0.418V − V V IL P + 0.75D MAX LED INMIN L MINfSW The minimum value of the slope-compensation resistor (R1) that should be used to ensure stable operation at minimum input supply voltage can be calculated as: For boost configuration: R1 = (VLED − 2VINMIN ) × R4 × 1.5 2 × L MIN × fSW × 50µA For buck-boost configuration : R1 = (VLED − VINMIN ) × R4 × 1.5 2 × L MIN × fSW × 50µA where fSW is the switching frequency in hertz, VINMIN is the minimum input voltage in volts, VLED is the LED voltage in volts, DMAX is the maximum duty cycle, ILP is the peak inductor current in amperes, and LMIN is the minimum value of the selected inductor in henries. Output Capacitor The function of the output capacitor is to reduce the output ripple to acceptable levels. The ESR, ESL, and the bulk capacitance of the output capacitor contribute to the output ripple. In most applications, the output ESR and ESL effects can be dramatically reduced by using low-ESR ceramic capacitors. To reduce the ESL and ESR effects, connect multiple ceramic capacitors in parallel to achieve the required bulk capacitance. To minimize audible noise generated by the ceramic capacitors during PWM dimming, it could be necessary to minimize the number of ceramic capacitors on the output. In these cases, an additional electrolytic or tantalum capacitor provides most of the bulk capacitance. Boost and Buck-Boost Configurations The calculation of the output capacitance is the same for both boost and buck-boost configurations. The output ripple is caused by the ESR and the bulk capacitance of the output capacitor if the ESL effect is considered negligible. For simplicity, assume that the contributions from ESR and the bulk capacitance are equal, allowing 50% of the ripple for the bulk capacitance. The capacitance is given by: C OUT ≥ ILED × 2 × D MAX VOUTRIPPLE × fSW 16 ������������������������������������������������������������������������������������� High-Voltage HB LED Drivers with Integrated High-Side Current Sense V ESR COUT < OUTRIPPLE (Ω) (IL P × 2) where ILP is the peak-inductor current in amperes. Use the equation below to calculate the RMS current rating of the output capacitor: I COUT(RMS) = IL AVG 2 D MAX (1 − D MAX ) Input Capacitor The input-filter capacitor bypasses the ripple current drawn by the converter and reduces the amplitude of high-frequency current conducted to the input supply. The ESR, ESL, and the bulk capacitance of the input capacitor contribute to the input ripple. Use a low-ESR input capacitor that can handle the maximum input RMS ripple current from the converter. For the boost configuration, the input current is the same as the inductor current. For buck-boost configuration, the input current is the inductor current minus the LED current. However, for both configurations, the ripple current that the input filter capacitor has to supply is the same as the inductor ripple current with the condition that the output filter capacitor should be connected to ground for buck-boost configuration. This reduces the size of the input capacitor, as the input current is continuous with maximum QDIL/2. Neglecting the effect of LED current ripple, the calculation of the input capacitor for boost, as well as buck-boost configurations is the same. Neglecting the effect of the ESL, the ESR, and the bulk capacitance at the input contribute to the input-voltage ripple. For simplicity, assume that the contributions from the ESR and the bulk capacitance are equal. This allows 50% of the ripple for the bulk capacitance. The capacitance is given by: CIN ≥ ∆IL 4 × ∆VIN × fSW where DIL is in amperes, CIN is in farads, fSW is in hertz, and DVIN is in volts. The remaining 50% of allowable ripple is for the ESR of the input capacitor. Based on this, the ESR of the input capacitor is given by: ESR CIN < ∆VIN ∆IL × 2 where DIL is in amperes, ESRCIN is in ohms, and DVIN is in volts. Use the equation below to calculate the RMS current rating of the input capacitor: I CIN(RMS) = ∆IL 2 3 \conductors Switching MOSFET The switching MOSFET (Q1) should have a voltage rating sufficient to withstand the maximum output voltage together with the diode drop of rectifier diode D1 and any possible overshoot due to ringing caused by parasitic inductances and capacitances. Use a MOSFET with a drain-to-source voltage rating higher than that calculated by the following equations. Boost Configuration VDS = (VLED + VD) x 1.2 where VDS is the drain-to-source voltage in volts and VD is the forward drop of rectifier diode D1. The factor of 1.2 provides a 20% safety margin. Buck-Boost Configuration VDS = (VLED + VINMAX + VD) x 1.2 where VDS is the drain-to-source voltage in volts and VD is the forward drop of rectifier diode D1. The factor of 1.2 provides a 20% safety margin. The RMS current rating of the switching MOSFET Q1 is calculated as follows for boost and buck-boost configurations: IDRMS = 1.3 × ( (IL AVG) 2 × D MAX ) where IDRMS is the MOSFET Q1’s drain RMS current in amperes. The MOSFET Q1 dissipates power due to both switching losses, as well as conduction losses. The conduction losses in the MOSFET are calculated as follows: PCOND = (ILAVG)2 x DMAX x RDSON where RDSON is the on-resistance of Q1 in ohms, PCOND is in watts, and ILAVG is in amperes. Use the following equations to calculate the switching losses in the MOSFET. ______________________________________________________________________________________ 17 MAX16833/MAX16833B−MAX16833E where ILED is in amperes, COUT is in farads, fSW is in hertz, and VOUTRIPPLE is in volts. The remaining 50% of allowable ripple is for the ESR of the output capacitor. Based on this, the ESR of the output capacitor is given by: MAX16833/MAX16833B−MAX16833E High-Voltage HB LED Drivers with Integrated High-Side Current Sense Boost Configuration IL × VLED 2 × C GD × fSW PSW = AV G 2 1 1 × + IG ON IG OFF The worst-case RHP zero frequency (fZRHP) is calculated as follows: Boost Configuration fZRHP = Buck-Boost Configuration Buck-Boost Configuration IL × (VLED + VINMAX ) 2 × C GD × fSW PSW = AV G 2 1 1 × + IG IG OFF ON where IGON and IGOFF are the gate currents of the MOSFET Q1 in amperes when it is turned on and turned off, respectively, VLED and VINMAX are in volts, ILAVG is in amperes, fSW is in hertz, and CGD is the gate-to-drain MOSFET capacitance in farads. Rectifier Diode Use a Schottky diode as the rectifier (D1) for fast switching and to reduce power dissipation. The selected Schottky diode must have a voltage rating 20% above the maximum converter output voltage. The maximum converter output voltage is VLED in boost configuration and VLED + VINMAX in buck-boost configuration. The current rating of the diode should be greater than ID in the following equation: ID = ILAVG x (1 - DMAX) x 1.5 VLED × (1- D MAX ) 2 2π × L × ILED fZRHP = VLED × (1- D MAX ) 2 2π × L × ILED × D MAX where fZRHP is in hertz, VLED is in volts, L is the inductance value of L1 in henries, and ILED is in amperes. The switching converter small-signal transfer function also has an output pole for both boost and buck-boost configurations. The effective output impedance that determines the output pole frequency together with the output filter capacitance is calculated as follows: Boost Configuration (R LED + R7) × VLED R OUT = (R LED + R7) × ILED + VLED Buck-Boost Configuration (R LED + R7) × VLED R OUT = (R LED + R7) × ILED × D MAX + VLED where RLED is the dynamic impedance of the LED string at the operating current in ohms, R7 is the LED currentsense resistor in ohms, VLED is in volts, and ILED is in amperes. Dimming MOSFET Select a dimming MOSFET (Q2) with continuous current rating at the operating temperature higher than the LED current by 30%. The drain-to-source voltage rating of the dimming MOSFET must be higher than VLED by 20%. The output pole frequency for both boost and buckboost configurations is calculated as below: Feedback Compensation where fP2 is in hertz, COUT is the output filter capacitance in farads, and ROUT is the effective output impedance in ohms calculated above. The LED current control loop comprising the switching converter, the LED current amplifier, and the error amplifier should be compensated for stable control of the LED current. The switching converter small-signal transfer function has a right-half-plane (RHP) zero for both boost and buck-boost configurations as the inductor current is in continuous conduction mode. The RHP zero adds a 20dB/decade gain together with a 90-degree phase lag, which is difficult to compensate. The easiest way to avoid this zero is to roll off the loop gain to 0dB at a frequency less than 1/5 the RHP zero frequency with a -20dB/decade slope. fP2 = 1 2π × C OUT × R OUT The feedback loop compensation is done by connecting resistor R10 and capacitor C4 in series from the COMP pin to GND. R10 is chosen to set the high-frequency gain of the integrator to set the crossover frequency at fZRHP/5 and C4 is chosen to set the integrator zero frequency to maintain loop stability. For optimum performance, choose the components using the following equations: R10 = 2 × fZRHP × R4 FC × (1 − D MAX ) × R7 × 6.15 × GM COMP 18 ������������������������������������������������������������������������������������� High-Voltage HB LED Drivers with Integrated High-Side Current Sense C4 = 25 π × R10 × fZRHP where R10 is the compensation resistor in ohms, fZRHP and fP2 are in hertz, R4 is the inductor current-sense resistor in ohms, R7 is the LED current-sense resistor in ohms, factor 6.15 is the gain of the LED current-sense amplifier, and GMCOMP is the transconductance of the error amplifier in amps/volts. Layout Recommendations Typically, there are two sources of noise emission in a switching power supply: high di/dt loops and high dV/dt surfaces. For example, traces that carry the drain current often form high di/dt loops. Similarly, the heatsink of the MOSFET connected to the device drain presents a dV/dt source; therefore, minimize the surface area of the heatsink as much as is compatible with the MOSFET power dissipation or shield it. Keep all PCB traces carrying switching currents as short as possible to minimize current loops. Use ground planes for best results. U Isolate the power components and high-current paths from the sensitive analog circuitry. U Keep the high-current paths short, especially at the ground terminals. This practice is essential for stable, jitter-free operation. Keep switching loops short such that: a) The anode of D1 must be connected very close to the drain of the MOSFET Q1. b) The cathode of D1 must be connected very close to COUT. c) COUT and current-sense resistor R4 must be connected directly to the ground plane. U Connect PGND and SGND at a single point. U Keep the power traces and load connections short. This practice is essential for high efficiency. Use thick copper PCBs (2oz vs. 1oz) to enhance full-load efficiency. U Route high-speed switching nodes away from the sensitive analog areas. Use an internal PCB layer for the PGND and SGND plane as an EMI shield to keep radiated noise away from the device, feedback dividers, and analog bypass capacitors. Careful PCB layout is critical to achieve low switching losses and clean, stable operation. Use a multilayer board whenever possible for better noise immunity and power dissipation. Follow these guidelines for good PCB layout: U Use a large contiguous copper plane under the ICs’ package. Ensure that all heat-dissipating components have adequate cooling. ______________________________________________________________________________________ 19 MAX16833/MAX16833B−MAX16833E The value of C4 can be calculated as below: MAX16833/MAX16833B−MAX16833E High-Voltage HB LED Drivers with Integrated High-Side Current Sense Typical Operating Circuits L1 VIN 6V TO 18V WITH LOAD DUMP UP TO 70V D1 Q1 IN C1 NDRV C2 R1 OVP R3 ISENSE+ PWMDIM ISENSE- RT/SYNC R9 R8 Q2 FLT COMP C4 MAX16833 MAX16833C ICTRL MAX16833E SGND R2 DIMOUT VCC C3 R7 CS LFRAMP PWMDIM R5 PGND R4 LED+ R11 LEDR10 EP BOOST HEADLAMP DRIVER LED- L1 VIN 6V TO 18V WITH LOAD DUMP UP TO 70V D1 Q1 IN C1 NDRV C2 PWMDIM R3 RT/SYNC R1 ISENSE+ ISENSER2 DIMOUT VCC C3 MAX16833B ICTRL MAX16833D SGND PGND Q2 FLT COMP R9 R8 R7 CS REF OVP PWMDIM R5 C4 EP R4 R11 LED+ R10 BUCK-BOOST HEADLAMP DRIVER 20 ������������������������������������������������������������������������������������� High-Voltage HB LED Drivers with Integrated High-Side Current Sense TEMP RANGE PIN-PACKAGE FUNCTIONALITY MAX DUTY CYCLE (%) FAULT OUTPUT BLANKING MAX16833BAUE+ -40°C to +125°C 16 TSSOP-EP* Reference Voltage Output 88.5 Yes MAX16833BAUE/V+ -40°C to +125°C 16 TSSOP-EP* Reference Voltage Output 88.5 Yes MAX16833CAUE+ -40°C to +125°C 16 TSSOP-EP* Frequency Dithering 94 Yes MAX16833CAUE/V+ -40°C to +125°C 16 TSSOP-EP* Frequency Dithering 94 Yes MAX16833DAUE+ -40°C to +125°C 16 TSSOP-EP* Reference Voltage Output 94 Yes MAX16833DAUE/V+ -40°C to +125°C 16 TSSOP-EP* Reference Voltage Output 94 Yes MAX16833EAUE+ -40°C to +125°C 16 TSSOP-EP* Frequency Dithering 88.5 No MAX16833EAUE/V+ -40°C to +125°C 16 TSSOP-EP* Frequency Dithering 88.5 No PART +Denotes a lead(Pb)-free/RoHS-compliant package. *EP = Exposed pad. /V denotes an automotive qualified part. Chip Information PROCESS: BiCMOS-DMOS Package Information For the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO. 16 TSSOP-EP U16E+3 21-0108 90-0120 ______________________________________________________________________________________ 21 MAX16833/MAX16833B−MAX16833E Ordering Information (continued) MAX16833/MAX16833B−MAX16833E High-Voltage HB LED Drivers with Integrated High-Side Current Sense Revision History REVISION NUMBER REVISION DATE DESCRIPTION 0 6/10 Initial release 1 11/10 Added MAX16833AUE 2 12/10 Added MAX16833C and MAX16833D 3 7/11 Added MAX16833E PAGES CHANGED — 1, 21, 22 22 1–4, 6–14, 20, 21 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 22 © 2011 Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.