Provisional Data Sheet No. PD-9.1614 IRLF230 ® HEXFET TRANSISTOR N-CHANNEL 200Volt, 0.40 Ω, HEXFET The Logic Level ‘L’ series of power MOSFETs are designed to be operated with level logic gate-tosource voltage of 5V. In addition to the well established characteristics of HEXFETs, they have the added advantage of providing low drive requirements to interface power loads to logic level IC’s and microprocessors. Fields of application include: high speed power applications such as switching regulators, switching converters, motor drivers, solenoid and relay drivers. Product Summary Part Number BVDSS RDS(on) ID IRLF230 200V 0.40Ω 5.2A Features: n n n n n n Dynamic dv/dt Rating Logic Level Gate Drive RDS(on) Specific at VGS = 4V & 5V 150°C Operating Temperature Fast Switching Ease of Paralleling The HEXFET technology is the key to International Rectifier ’s advance line of logic level power MOSFET transistors. The efficient geometry and unique processing of the HEXFET achieve very low on-state resistance combine with high transconductance. Absolute Maximum Ratings Parameter ID @ VGS = 5.0V, TC = 25°C ID @ VGS = 5.0V, TC = 100°C I DM PD @ TC = 25°C VGS dv/dt TJ TSTG Continuous Drain Current Continuous Drain Current Pulsed Drain Current Max. Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Operating Junction IRLF230 5.2 3.3 20 25 0.20 ±10 4.2 -55 to 150 Units A W W/K V V/ns o C Storage Temperature Range Lead Temperature Weight 300(0.063 in.(1.6mm) from case for 10s) 0.98 (typical) g 4/7/97 IRLF230 Electrical Characteristics @ Tj = 25°C (Unless Otherwise Specified) Parameter Min Drain-to-Source Breakdown Voltage 200 — — V — 0.28 — V/°C — — 1.0 4.5 — — — — — — — — 0.40 0.50 2.0 — 25 250 ∆BVDSS /∆TJ Temperature Coefficient of Breakdown Voltage RDS(on) Static Drain-to-Source On-State Resistance VGS(th) Gate Threshold Voltage gfs Forward Transconductance IDSS Zero Gate Voltage Drain Current Typ Max Units nC ns VDD = 100V, ID = 5.2A, RG = 6.0Ω V S( ) µA IGSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD Gate-to-Source Leakage Forward Gate-to-Source Leakage Reverse Total Gate Charge Gate-to-Source Charge Gate-to-Drain (‘Miller’) Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance — — — — — — — — — — — — — — — — — — — 5.0 100 -100 41 4.9 21 9.4 34 43 26 — LS Internal Source Inductance — 15 — Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance — — — 1100 230 61 — — — Test Conditions VGS =0 V, ID = 250µA Reference to 25°C, ID = 250µA VGS = 5.0V, ID = 3.1A VGS = 4.0V, ID = 2.6A VDS = VGS, ID = 250µA VDS > 15V, IDS = 3.1A VDS= 0.8 x Max Rating,VGS=0V VDS = 0.8 x Max Rating VGS = 0V, TJ = 125°C VGS = 10 V VGS = -10V VGS = 5.0V, ID = 5.2A VDS = Max Rating x 0.5 Ω Ω BVDSS nA nH pF Measured from dr ain lead, 6mm (0.25 in) from package to center of die. Measured from source lead, 6mm (0.25 in) from package to source bonding pad. Modified MOSFET symbol showing the internal inductances. VGS = 0V, VDS = 25 V f = 1.0MHz Source-Drain Diode Ratings and Characteristics Parameter Min Typ Max Units IS I SM Continuous Source Current (Body Diode) Pulse Source Current (Body Diode) — — — — 5.2 20 A VSD trr QRR Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge — — — — — — 2.0 250 1.7 V ns µC ton Forward Turn-On Time Test Conditions Modified MOSFET symbol showing the integral reverse p-n junction rectifier. Tj = 25°C, IS = 5.2A, VGS = 0V Tj = 25°C, I F = 5.2A, di/dt ≤ 100A/µs VDD ≤ 50V Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by L S + LD. Thermal Resistance Parameter Min. Typ. Max. Units RthJC Junction-to-Case — — 5.0 RthJA Junction-to-Ambient — — 175 K/W Test Conditions Typical socket mount IRLF230 I D , Drain-to-Source Current (A) TOP BOTTOM 100 VGS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V 2.5V TOP I D , Drain-to-Source Current (A) 100 10 2.5V BOTTOM 10 2.5V 20µs PULSE WIDTH TJ = 25 °C 1 1 10 20µs PULSE WIDTH TJ = 150 °C 1 100 1 VDS , Drain-to-Source Voltage (V) 3.0 R DS(on) , Drain-to-Source On Resistance (Normalized) I D , Drain-to-Source Current (A) TJ = 25 ° C TJ = 150 ° C 1 V DS = 50V 20µs PULSE WIDTH 3.0 4.0 5.0 VGS , Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics 100 Fig 2. Typical Output Characteristics 100 0.1 2.0 10 VDS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics 10 VGS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V 2.5V 6.0 I D = 5.2A 2.5 2.0 1.5 1.0 0.5 0.0 -60 -40 -20 VGS = 5.0V 0 20 40 60 80 100 120 140 160 T J, Junction Temperature ( ° C) Fig 4. Normalized On-Resistance Vs. Temperature IRLF230 VGS = 0V, f = 1MHz Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd Coss = Cds + Cgd C, Capacitance (pF) 1600 Ciss 1200 800 Coss 400 Crss 15 V GS, Gate-to-Source Voltage (V) 2000 ID = 5.2A VDS = 160V VDS = 100V VDS = 40V 12 9 6 3 FOR TEST CIRCUIT 12 SEE FIGURE 13 0 0 1 10 0 100 10 20 30 40 50 Q G, Total Gate Charge (nC) V DS, Drain-to-Source Voltage (V) Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage 100 100 10us I D , Drain Current (A) ISD , Reverse Drain Current (A) OPERATION IN THIS AREA LIMITED BY RDS(on) 10 TJ = 150 ° C TJ = 25 ° C 1 0.1 0.2 V GS = 0 V 0.8 1.4 2.0 VSD ,Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 10 100us 1ms 1 10ms TC = 25 ° C TJ = 150° C Single Pulse 0.1 2.6 1 10 100 VDS , Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area 1000 IRLF230 6.0 RD VDS VGS ID , Drain Current (A) 5.0 D.U.T. RG + -VDD 4.0 5.0V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 3.0 2.0 Fig 10a. Switching Time Test Circuit VDS 1.0 90% 0.0 25 50 75 100 TC , Case Temperature 125 150 ( ° C) 10% VGS Fig 9. Maximum Drain Current Vs. Case Temperature td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms Thermal Response (Z thJC ) 10 0.50 1 0.20 0.10 0.05 0.02 0.1 PDM 0.01 t1 SINGLE PULSE (THERMAL RESPONSE) t2 Notes: 1. Duty factor D = t1 / t 2 2. Peak T J = P DM x Z thJC + T C 0.01 0.00001 0.0001 0.001 0.01 0.1 1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case 10 IRLF230 Current Regulator Same Type as D.U.T. 50KΩ 5.0V 12V .2µF QG .3µF 5.0 V QGS D.U.T. QGD + V - DS VGS VG 3mA IG Charge Fig 12a. Basic Gate Charge Waveform ID Current Sampling Resistors Fig 12b. Gate Charge Test Circuit IRLF230 Notes: Repetitive Rating; Pulse width limited by maximum junction temperature. Refer to current HEXFET reliability report. K/W = °C/W ISD ≤ 5.2A, di/dt ≤ 270 A/µs, VDD ≤ BVDSS, TJ ≤ 150°C Suggested RG = 2.35Ω Pulse width ≤ 300 µs; Duty Cycle ≤ 2% Case Outline and Dimensions — TO-205AF (Modified TO-39) All dimensions are shown millimeters (inches) WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331 EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020 IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111 IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086 IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371 http://www.irf.com/ Data and specifications subject to change without notice. 4/97