OPA 622 ® OPA622 OPA 622 Wide-Bandwidth OPERATIONAL AMPLIFIER FEATURES APPLICATIONS ● LARGE SIGNAL BANDWIDTH: 150MHz (AP), 200MHz (AU) (Voltage-Feedback) ● HIGH OUTPUT CURRENT: ±70mA ● SLEW RATE: 1500V/µs (AP), 1700V/µs (AU) ● DIFFERENTIAL GAIN: 0.15% ● DIFFERENTIAL PHASE: 0.08° ● BROADCAST/HDTV EQUIPMENT ● COMMUNICATIONS ● PULSE/RF AMPLIFIERS ● EXCELLENT BANDWIDTH/SUPPLY CURRENT RATIO: 200MHz/5mA ● LOW INPUT BIAS CURRENT: –1.2µA DESCRIPTION The OPA622 is a monolithic amplifier component designed for precision wide-bandwidth systems including high-resolution video, RF and IF circuitry, and communications equipment. It includes a monolithic integrated current-feedback operational amplifier block and a voltage buffer block, which, when combined, form a voltage-feedback operational amplifier. When combined as a current-feedback amplifier, it provides a 280MHz large-signal bandwidth at ±2.5V output level and a 1700V/µs slew rate. The output buffer stage can deliver ±70mA output current. The high output current capability allows the OPA622 to drive two 50Ω or 75Ω lines with ±3V output swing, making it ideal along with the low differential gain/phase errors for RF, IF, and video applications. R2 R1 RIN VIN 50Ω IQ Adjust The feedback buffer stage provides 700MHz bandwidth, a very high slew rate, and a very short signal delay time. It is designed primarily for interstage buffering and not for driving long cables. When combined with the current-feedback amplifier section, the OPA622 can be interconnected as a voltage-feedback amplifier with two identical high-impedance inputs. In this configuration, it features a low common-mode gain, low input offset, and, due to the delay time of the additional feedback buffer, a decrease in frequency bandwidth compared with the current-feedback configuration. Unlike “classical” operational amplifiers, the OPA622 achieves a nearly constant bandwidth over a wide gain and output voltage range. The external setting of the open-loop gain with ROG avoids a large compensation capacitor, improves the slew rate, and allows a frequency response adaption to various gains and load conditions. VOLTAGE-FEEDBACK COTA 10 9 OPA622 VFA 8 4 BUF– +In 13 2 BUF+ ROG 3 –In ● ACTIVE FILTER ● HIGH SPEED ANALOG SIGNAL PROCESSING ● MULTIPLIER OUTPUT AMP ● DIFFERENTIATOR FOR DIGITIZED VIDEO SIGNALS CURRENT-FEEDBACK R2 R1 50Ω BUF+ RIN VOUT VIN 4 +In 10 IQ Adjust 9 OPA622 CFA 3 2 50Ω RQ COTA 13 50Ω VOUT 100Ω RQ –5V –5V International Airport Industrial Park • Mailing Address: PO Box 11400 Tel: (520) 746-1111 • Twx: 910-952-1111 • Cable: BBRCORP • • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706 Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 © 1991 Burr-Brown Corporation PDS-1131E Printed in U.S.A. March, 1995 SPECIFICATIONS DC-SPECIFICATION VOLTAGE-FEEDBACK AMPLIFIER (Figure 5) At VCC = ±5V, IQ = ±5mA, GCL = +2V/V, RLOAD = 100Ω, RSOURCE = 50Ω, RQ = 430Ω, ROG = 150Ω and TA = +25°C, unless otherwise specified. OPA622AP, AU PARAMETER CONDITIONS MIN TYP MAX UNITS ±15 –46 1 210 –50 –43 –51 mV µV/°C dB dB dB ±4 VCC = ±4.5V to ±5.5V VCC = +4.5V to +5.5V VCC = –4.5V to –5.5V –1.2 7 29 170 58 µA nA/°C nA/V nA/V nA/V VCM = 0V 0.1 µA 2.4 || 1 MΩ || pF f = 100kHz to 100MHz S/N = 20 log 0.7/(VN • √5MHz) 11 89 nV/√MHz dB VI = +2.5V, VO = 0V ±3.2 78 V dB ±3.2 0.2 70 V Ω mA CLOSED-LOOP OUTPUT OFFSET VOLTAGE Initial vs Temperature vs Supply (tracking) vs Supply (non-tracking) vs Supply (non-tracking) VCC = ±4.5V to ±5.5V VCC = +4.5V to +5.5V VCC = –4.5V to –5.5V INPUT BIAS CURRENT Initial vs Temperature vs Supply (tracking) vs Supply (non-tracking) vs Supply (non-tracking) OFFSET CURRENT Input Offset Current INPUT IMPEDANCE Differential Mode INPUT NOISE Voltage Noise Density Signal-to-Noise Ratio INPUT VOLTAGE RANGE Common-Mode Input Range Common-Mode Rejection GCL = +1 RATED OUTPUT Voltage Output Closed-Loop Output Impedance Current Output POWER SUPPLY Rated Voltage Derated Performance Quiescent Current Quiescent Current (programmable) ±3 ±4.5 ±4.4 RQ = 430Ω, IO = 0mA Useful Range, IO = 0mA TEMPERATURE Operating Storage Ambient Temperature Ambient Temperature ±5 ±5 3 to 8 –40 –40 ABSOLUTE MAXIMUM RATINGS ±5.5 ±5.6 V V mA mA 85 125 °C °C ORDERING INFORMATION Power Supply Voltage ......................................................................... ±6V Input Voltage(1) .................................................................... ±VCC to ±0.7V Operating Temperature ..................................................... –40°C to +85°C Storage Temperature ...................................................... –40°C to +125°C Junction Temperature .................................................................... +150°C Lead Temperature (soldering, 10s) ................................................ +300°C MODEL OPA622AP OPA622AU DESCRIPTION TEMPERATURE RANGE 14-Pin Plastic DIP SO-14 Surface-Mount –40°C to +85°C –40°C to +85°C NOTE: (1) Inputs are internally diode-clamped to ±VCC. PACKAGE INFORMATION MODEL OPA622AP OPA622AU DESCRIPTION PACKAGE DRAWING NUMBER(1) 14-Pin Plastic DIP SO-14 Surface-Mount 010 235 NOTE:(1) For detailed drawing and dimension table, please see end of data sheet, or Appendix D of Burr-Brown IC Data Book. The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. ® OPA622 2 AC-SPECIFICATION VOLTAGE-FEEDBACK AMPLIFIER (Figure 5) At VCC = ±5V, IQ = ±5mA, GCL = +2V/V, RLOAD = 100Ω, RSOURCE = 50Ω, RQ = 430Ω, ROG = 150Ω and TA = +25°C, unless otherwise specified. OPA622AP OPA622AU CONDITIONS TYP TYP UNITS LARGE SIGNAL Closed-Loop Bandwidth (–3dB) VO = 2.8Vp-p, Gain = +1V/V VO = 2.8Vp-p, Gain = +2V/V VO = 2.8Vp-p, Gain = +5V/V VO = 2.8Vp-p, Gain = +10V/V VO = 2.8Vp-p, Gain = –1V/V VO = 2.8Vp-p, Gain = –2V/V VO = 5.0Vp-p, Gain = +2V/V 220 200 170 110 150 160 150 250 250 230 110 250 250 200 MHz MHz MHz MHz MHz MHz MHz SMALL SIGNAL BANDWIDTH VO = 0.2Vp-p, Gain = +2V/V 150 170 MHz 1.4 1.4 ns f = 4.43MHz, RLOAD = 150Ω VO = 0.7V, Gain = +1V/V VO = +1.4V, Gain = +2V/V 0.12 0.15 0.12 0.15 % % f = 4.43MHz, RLOAD = 150Ω VO = 0.7V, Gain = +1V/V VO = +1.4V, Gain = +2V/V 0.06 0.08 0.06 0.08 Degrees Degrees –57 –55 –38 –43 –33 –30 –57 –55 –38 –43 –33 –30 dBc dBc dBc dBc dBc dBc 0.12 0.3 0.12 0.3 dB dB 2.4 2.7 ns 3.5 3.2 ns 1500 1300 1700 1600 V/µs Vµs 17 17 ns PARAMETER FREQUENCY DOMAIN GROUP DELAY TIME DIFFERENTIAL GAIN DIFFERENTIAL PHASE HARMONIC DISTORTION Second Harmonic 2f Third Harmonic 3f Second Harmonic 2f Third Harmonic 3f Second Harmonic 2f Third Harmonic 3f GAIN FLATNESS PEAKING TIME DOMAIN Rise Time Fall Time SLEW RATE Gain = +2V/V f = 10MHz, VO = 2.8Vp-p f = 30MHz, VO = 2.8Vp-p f = 50MHz, VO = 2.8Vp-p Gain = +2V/V VO = 2.8Vp-p, DC to 30MHz VO = 2.8Vp-p, DC to 100MHz Gain = +2V/V, 10% to 90% VO = 5Vp-p, CL = 2pF Gain = +2V/V, 10% to 90% VO = 5Vp-p, CL = 2pF Gain = +2V/V, Rise Time = 2ns VO = 6.2Vp-p Positive Negative SETTLING TIME Gain = +2V/V, Rise Time = 2ns VO = 2Vp-p, 0.1% ® 3 OPA622 DICE INFORMATION PAD FUNCTION 1 2 3 4 5 6 7 8 9 10 11 12 13 Quiescent Current Adjustment Inverting Analog Input Non-Inverting Analog Input NC NC –5V Supply –5V Supply, Output Inverting Buffer Output Analog Output Analog OTA Output +5V Supply, Output +5V Supply Non-Inverting Buffer Output Substrate Bias: Negative Supply NC: No Connection Wire Bonding: Gold wire bonding is recommended. MECHANICAL INFORMATION MILS (0.001") Die Size 57 x 69 ±5 Die Thickness 14 ±1 Min. Pad Size 4x4 Backing: Titanium 0.02+0.05,–0.0 Gold 0.30 ±0.05 MILLIMETERS 1.44 x 1.76 ±0.13 0.55 ±0.025 0.10 x 0.10 0.0005+0.0013, –0.0 0.0076 ±0.0013 OPA622AD DIE TOPOGRAPHY PIN CONFIGURATION Top View NC FUNCTIONAL DESCRIPTION SO/DIP OPA622 13 1 4 IQ Adjust 2 –In 3 +In 4 –VCC 5 –VCC OUT 6 NC 7 14 NC OTA 13 BUF+ 11 10 OB 9 6 FB 3 5 Biasing 2 12 +VCC 11 +VCC OUT 8 12 10 OTA 9 VOUT 8 BUF– PIN NO. DESCRIPTION 1 2 3 4 5 6 NC IQ Adjust –In +In –VCC –VCC OUT 8 9 10 11 BUF– VOUT OTA +VCC OUT 12 13 14 +VCC BUF+ NC FUNCTION No Connection Quiescent Current Adjustment; typical 3-8mA Inverting Analog Input Noninverting Analog Input Negative Supply Voltage; typical –5VDC Negative Supply Voltage Output Buffer; typical –5VDC Analog Output Feedback Buffer Analog Output Analog Output OTA Positive Supply Voltage Output Buffer; typical +5VDC Positive Supply Voltage; typical +5VDC Analog Output/Input No Connection ELECTROSTATIC DISCHARGE SENSITIVITY Electrostatic discharge can cause damage ranging from performance degradation to complete device failure. BurrBrown Corporation recommends that all integrated circuits be handled and stored using appropriate ESD protection methods. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet published specifications. ® OPA622 4 TYPICAL PERFORMANCE CURVES VOLTAGE-FEEDBACK AMPLIFIER (Figure 5) At VCC = ±5V, IQ = ±5mA, GCL = +2V/V, RLOAD = 100Ω, RSOURCE = 50Ω, RQ = 430Ω, ROG = 150Ω and TA = +25°C, unless otherwise specified. CLOSED-LOOP OUTPUT OFFSET VOLTAGE vs TEMPERATURE INPUT BIAS CURRENT vs TEMPERATURE 15 0 10 Input Bias Offset Current –0.4 Offset Voltage (mV) Input Bias Current (µA) –0.2 –0.6 Positive Input Bias Current –0.8 Negative Input Bias Current –1 5 0 GCL = +2V/V –5 –10 –1.2 –1.4 –40 –20 0 20 40 60 80 –15 –40 100 –20 0 20 40 60 80 100 Temperature (°C) Temperature (°C) INPUT OFFSET VOLTAGE vs TIME INPUT STAGE OFFSET VOLTAGE vs TEMPERATURE 0.5 100 90 Offset Voltage Drift (mv) DIP 70 SO-14 60 50 40 30 20 0 Input Offset Voltage –0.5 Negative Input Voltage –1 Positive Input Voltage –1.5 10 –2 0 0 1 2 3 4 5 –40 6 –20 0 20 40 60 80 100 Temperature (°C) Time (minutes) QUIESCENT CURRENT vs RQ RESISTANCE QUIESCENT CURRENT vs TEMPERATURE 9 9 8 Quiescent Current (mA) 8 Quiescent Current (mA) VOS (% final value) 80 7 6 5 4 3 7 6 5 4 3 2 1 2 0 0 200 400 600 800 1000 1200 –40 RQ (Ω) –20 0 20 40 60 80 100 Temperature (°C) ® 5 OPA622 TYPICAL PERFORMANCE CURVES (CONT) VOLTAGE-FEEDBACK AMPLIFIER (Figure 5) At VCC = ±5V, IQ = ±5mA, GCL = +2V/V, RLOAD = 100Ω, RSOURCE = 50Ω, RQ = 430Ω, ROG = 150Ω and TA = +25°C, unless otherwise specified. COMMON-MODE REJECTION vs COMMON-MODE INPUT VOLTAGE SPECTRAL NOISE VOLTAGE DENSITY 100 Common-Mode Rejection (dB) –5 Voltage Noise nV/√Hz –55 –60 –65 –70 –75 10 –80 1 –85 –5 –4 –3 –2 –1 0 1 2 3 4 5 100 1k 10k INPUT IMPEDANCE vs FREQUENCY 1M 10M OUTPUT IMPEDANCE vs FREQUENCY 10M 100 GCL = +2 Output Impedance (Ω) 1M Input Impedance (Ω) 100k Frequency (Hz) Common-Mode Input Voltage (V) 100k 10k 1k 10 1 100 10 100m 10k 100k 1M 10M 100M 1G 10k 100k 1M Frequency (Hz) 100M 1G OVERLOAD RECOVERY CHARACTERISTICS COMMON-MODE REJECTION vs FREQUENCY 0 3 –10 2.25 –20 1.5 Input Voltage (V) Common-Mode Rejection (dB) 10M Frequency (Hz) –30 –40 –50 –60 6 4.5 VIN 3 VOUT 0.75 1.5 0 0 –1.5 –0.75 –3 –1.5 –70 –4.5 –2.25 –80 GCL = +2V/V, VIN = 3.75Vp-p, tRISE = tFALL = 1ns (Generator) –3 –90 10k 100k 1M 10M 100M 0 1G 20 30 40 50 Time (ns) Frequency (Hz) ® OPA622 10 6 60 70 80 90 –6 100 Output Voltage (V) 1k TYPICAL PERFORMANCE CURVES (CONT) VOLTAGE-FEEDBACK AMPLIFIER (Figure 5) At VCC = ±5V, IQ = ±5mA, GCL = +2V/V, RLOAD = 100Ω, RSOURCE = 50Ω, RQ = 430Ω, ROG = 150Ω and TA = +25°C, unless otherwise specified. SMALL SIGNAL PULSE RESPONSE 160 120 120 80 80 Output Voltage (mV) Output Voltage (mV) SMALL SIGNAL PULSE RESPONSE 160 40 0 –40 –80 GCL = +1V/V, VOUT = 0.2Vp-p, tRISE = tFALL = 1ns (Generator) 0 –40 –80 10 20 30 40 50 60 70 80 90 GCL = +10V/V, VOUT = 0.2Vp-p, tRISE = tFALL = 1ns (Generator) –160 0 100 10 20 30 50 60 70 80 Time (ns) LARGE SIGNAL PULSE RESPONSE LARGE SIGNAL PULSE RESPONSE 90 100 2.5 Output Voltage (V) VIN VOUT 0 0 –2.5 –2.5 G = +1V/V, VOUT = 5Vp-p, tRISE = tFALL = 1ns (Generator) 0 10 20 30 40 50 60 70 80 90 GCL = +10V/V, VOUT = 5Vp-p, tRISE = tFALL = 1ns (Generator) 100 0 10 20 30 Time (ns) BANDWIDTH vs OUTPUT VOLTAGE 5Vp-p 10 10 2.8Vp-p 5 1.4Vp-p 5 1.4Vp-p Output Voltage (Vp-p) 15 2.8Vp-p 0.6Vp-p –5 0.2Vp-p –15 –20 –25 70 80 90 100 0 0.6Vp-p –5 –10 0.2Vp-p –15 –20 GCL = +1V/V –25 dB 300k 60 BANDWIDTH vs OUTPUT VOLTAGE 5Vp-p –10 50 20 15 0 40 Time (ns) 20 Output Voltage (Vp-p) 40 Time (ns) 2.5 Input/Output Voltage (V) 0 –120 –120 –160 40 GCL = +2V/V dB 1M 10M 100M 1G 3G 300k Frequency (Hz) 1M 10M 100M 1G Frequency (Hz) ® 7 OPA622 TYPICAL PERFORMANCE CURVES (CONT) VOLTAGE-FEEDBACK AMPLIFIER (Figure 5) At VCC = ±5V, IQ = ±5mA, GCL = +2V/V, RLOAD = 100Ω, RSOURCE = 50Ω, RQ = 430Ω, ROG = 150Ω and TA = +25°C, unless otherwise specified. BANDWIDTH vs OUTPUT VOLTAGE BANDWIDTH vs OUTPUT VOLTAGE 20 15 5Vp-p 15 5Vp-p 10 2.8Vp-p 10 2.8Vp-p 5 1.4Vp-p 5 Output Voltage (Vp-p) Output Voltage (Vp-p) 20 1.4Vp-p 0 0.6Vp-p –5 –10 0.2Vp-p –15 0 0.6Vp-p –5 –10 0.2Vp-p –15 –20 –20 GCL = +10V/V –25 GCL = –1V/V –25 dB dB 1M 300k 10M 100M 1G 1M 300k 100M 1G GAIN FLATNESS BANDWIDTH vs OUTPUT VOLTAGE 4 20 5Vp-p 3 10 2.8Vp-p 2 5 1.4Vp-p 1 0 Gain (dB) 15 0.6Vp-p –5 –10 0.2Vp-p 0 –1 –2 –3 –15 –4 –20 GCL = –2V/V –25 1M 100k GCL = +2V/V, VOUT = 0.2Vp-p –5 –6 300k dB 10M 100M 1G 10M 1M 1G 100M Frequency (Hz) Frequency (Hz) FREQUENCY RESPONSE vs CLOAD BANDWIDTH vs RLOAD 20 47pF Gain (5dB/Div) 15 500Ω 10 200Ω 5 22pF Gain (dB) Output Voltage (Vp-p) 10M Frequency (Hz) Frequency (Hz) 10pF –5 –20 –25 dB 1M 10M 100M 1G G = +2V, VOUT = 2.8Vp-p for all load resistances 100k Frequency (Hz) ® OPA622 50Ω –10 –15 CLOAD R OG C OTA 10p180 Ω 0.5p 22p200 Ω0.5p GCL = +2V/V, VOUT = 2.8Vp-p 47p150 Ω0.5p 100k 100Ω 0 8 1M 10M 100M 1G TYPICAL PERFORMANCE CURVES (CONT) VOLTAGE-FEEDBACK AMPLIFIER (Figure 5) At VCC = ±5V, IQ = ±5mA, GCL = +2V/V, RLOAD = 100Ω, RSOURCE = 50Ω, RQ = 430Ω, ROG = 150Ω and TA = +25°C, unless otherwise specified. GROUP DELAY TIME vs FREQUENCY HARMONIC DISTORTION vs FREQUENCY 0 4 GCL = +2V/V, VOUT = 2.8Vp-p, RLOAD = 100Ω Group Delay Time (ns) Harmonic Distortion (dBc) –10 –20 –30 –40 –50 3f –60 2f 2 0 Group Delay Time 150Ω –2 VIN 50Ω GCL = +2V/V –70 –80 –4 100k 1M 10M 100M 300k 1M 10M Frequency (Hz) 100M 1G Frequency (Hz) OUTPUT BIAS CURRENT vs TEMP TRANSFER FUNCTION 5 8 4 6 Output Bias Current (µA) 3 2 1 0 –1 –2 –3 4 2 0 –2 –4 –6 –8 –4 –5 –5 –4 –3 –2 –1 0 1 Input Voltage (V) 2 3 4 –10 –40 5 –20 0 20 40 60 80 100 Temperaure (°C) GAIN ERROR vs INPUT VOLTAGE 35 30 Gain Error (%) Output Voltage (V) VOUT DUT 25 20 15 10 5 0 –5 –4 –3 –2 –1 0 1 2 3 4 5 Input Voltage (V) ® 9 OPA622 INPUT PROTECTION the amplifier input characteristics without necessarily destroying the device. In precision amplifiers, such changes may degrade offset and drift noticeably. For this reason, static protection is strongly recommended when handling the OPA622. The need for protection from static damage has long been recognized for MOSFET devices, but all semiconductor devices deserve protection from this potentially damaging source. The OPA622 incorporates on-chip ESD protection diodes as shown in Figure 1. These diodes eliminate the need for external protection diodes, which can add capacitance and degrade AC performance. +VCC DISCUSSION OF PERFORMANCE The OPA622 provides full-power bandwidth previously unattainable in monolithic devices. In addition, the amplifier operates with reduced quiescent. The flexibility of the OPA622 design provides the speed advantages of a currentfeedback amplifier or the precision advantages of a voltagefeedback amplifier. The programmable quiescent current feature also helps to adapt the amplifier to the particular design requirements. ESD Protection diodes internally connected to all pins. External Pin Internal Circuitry –VCC FIGURE 1. Internal ESD Protection. Figure 2 shows the simplified circuit diagram of the OPA622. It contains four major sections: the bias circuitry, the OTA, the output buffer, and the feedback buffer. As shown, all input pins of the OPA622 are protected from ESD internally by a pair of back-to-back reverse-biased diodes to either power supply. These diodes begin to conduct when the input voltage exceeds either power supply by about 0.7V. This situation can occur when the amplifier loses its power supplies while a signal source is still present. The diodes can typically withstand a continuous current of 30mA without destruction. To ensure long-term reliability, however, the diode current should be limited externally to approximately 10mA whenever possible. BIAS CIRCUITRY The bias circuitry controls the quiescent current of the signal processing stages, allows external quiescent current setting using the resistor RQ connected from Pin 2 to –VCC, sets the amplifier’s transconductance, and, with its temperature characteristics, maintains a constant transconductance over temperature. The quiescent current controls the small-signal bandwidth and AC behavior. The OPA622 is specified with a quiescent current of ±5mA with RQ = 430Ω. The recommended range is ±3mA to ±8mA. The internal protection diodes are designed to withstand 2.5kV (using the Human Body Model) and will provide adequate ESD protection for most normal handling procedures. However, static damage can cause subtle changes in +VCC 12 11 OTA Bias Circuitry FB OB ROG +In 4 13 +VCC OUT OTA – In 8 3 4 9 10 VOUT + BUF – 12 6 100Ω 2 IQ Adjust RQ (ext.) 5 –VCC FIGURE 2. Simplified Circuit Diagram. ® OPA622 10 –VCC OUT Application circuits generally do not show the resistor RQ, but it is required for proper operation. +5V With a fixed RQ, the quiescent current increases with temperature (see Typical Performance Curves.) This variation of the quiescent current with temperature keeps the bandwidth and AC behavior relatively constant with temperature. It is also possible to vary the quiescent current by an external control signal or circuitry. Figure 3 shows a circuit to disable the OPA622 with TTL-compatible logic levels. 0V/5V logic levels are converted into a 1mA/0mA current connected to Pin 2. The current flowing in RQ increases the voltage at Pin 2 to approximately 1V above the –VCC rail, thus reducing IQ to near zero and disabling the OPA622. 4.7kΩ Internal Current Source Circuitry OPA622 2N2907 0/5V Logic In 5V: OPA622 On 100Ω 100kΩ IC 2 5 RQ 430Ω OTA AND OUTPUT BUFFER SECTIONS An Operational Transconductance Amplifier (OTA) and an output buffer are the basic building blocks of a currentfeedback amplifier. The current-feedback configuration of the OPA622 is illustrated in Figure 4. The OTA consists of a complementary emitter follower and a subsequent complementary current mirror. The voltage at the high-impedance +In terminal is transferred to the BUF+ input/output terminal at a low impedance. If a current flows into or out of the BUF+ terminal, the complementary mirror reflects the current to the OTA terminal. The current flow at the highimpedance OTA terminal is determined by the product of the voltage between the +In and BUF+ terminals and the transconductance. The output buffer section is an open-loop buffer consisting of complementary emitter followers. It is designed to drive cables or low-impedance loads. The buffer output is not current-limited or -protected. As can be seen in Figure 4, the feedback network for a current-feedback amplifier is applied between the VOUT and BUF+ terminals. Figure 8 illustrates the bandwidth for various output voltages of the current feedback configuration. IC = 0: OPA622 On IC = 1mA: OPA622 Off –5V FIGURE 3. Logic-Controlled Disable Circuit. FEEDBACK BUFFER SECTION This section of the OPA622 is a complementary emitter follower identical to the input buffer of the OTA section. It is designed for interstage buffering, not for driving long cables or low-impedance loads. A minimum load resistance of 500Ω is recommended when using the feedback buffer as a stand-alone device. The feedback buffer output is not current-limited or -protected. The bandwidth of the feedback buffer is shown in Figure 7. +VCC 12 + VCC OUT OTA 11 COTA 10 OB 9 6 +In 4 13 VOUT BUF+ R2 –VCC OUT R1 –VCC 5 FIGURE 4. Current-Feedback Amplifier. ® 11 OPA622 CONFIGURATIONS The identical input buffers reduce the input offset to typically less than ±7µV. Closed-loop output offset is typically due to mismatch of the NPN and PNP transistors in the OTA mirror ±100µV after the output bias current is trimmed. VOLTAGE-FEEDBACK AMPLIFIER The OPA622’s internal design differs from a “classical” operational amplifier structure, but it can nevertheless be used in all traditional operational amplifier applications. As with conventional op amps, the feedback network connected to the inverting input controls closed-loop gain (GCL). But with the OPA622, the resistor ROG is simultaneously adapted to the closed-loop gain, optimizing the frequency response and stability. Figure 5 illustrates the circuit configuration of the voltagefeedback op amp in a complementary circuit design. The feedback buffer and the OTA input buffer form the differential input. Inserting the feedback buffer section transforms the current feedback shown in Figure 4 into the voltage feedback shown in Figure 5. The resistor ROG sets the open-loop gain and corresponds to the emitter degeneration resistor in a classical differential stage. Because the ROG resistor can be varied externally, a flat frequency response can be achieved over a wide range of applications without the need to compensate the amplifier with a capacitor. In contrast to a current-feedback amplifier, it is possible to adjust the closed-loop gain using the feedback resistors and to adjust the open-loop gain independently using ROG to optimize the frequency response. The “classical” differential input stage consists of two identical transistors with an emitter degeneration resistor, two current sources, and an active load diode. However, the classical configuration limits the current through the gain transistor to that supplied by the current sources. In the new design, a complementary push-pull buffer (emitter follower) replaces one side of the differential stage without the 0.7V offset. The feedback buffer as a second complementary emitter follower and the open-loop gain resistor ROG connected between the outputs recreate the differential stage without the disadvantages of the classical design. The current charging the parasitic capacitance at the base of the gain transistor is no longer limited to the fixed current of the current sources and is proportional to the input signal. This improvement results in an approximately 10-times better slew rate. Unlike “classical” operational amplifier structures, the OPA622 configuration makes it possible to attain a nearly constant bandwidth for varying closed-loop gains, as well as improved frequency response and large-signal behavior. In addition—and also unlike current-feedback op amps—it provides two identical high-impedance inputs, lower input offset values, and improved CMRR. The amplified current through the gain transistor of one of the buffers is mirrored and becomes the output current. The high-impedance output of the OTA is now buffered by the high current output stage, which is designed to drive long cables or low-impedance loads at full power. CURRENT-FEEDBACK AMPLIFIER Figure 4 shows the current-feedback configuration. The feedback loop is closed from the output to the BUF+ terminal of the OTA section. The shorter feedback loop + VCC 12 + VCC OUT +In 4 OTA 13 ROG 11 8 –In FB 10 COTA OB 3 6 – VCC OUT R2 5 – VCC COTA: Sets the first open-loop pole ROG: Sets the open-loop gain R1 FIGURE 5. Voltage-Feedback Amplifier. ® OPA622 12 9 VOUT GCL = 1 + R2 R1 without the feedback buffer produces the wider bandwidth of the current-feedback concept. The additional signal delay time through the feedback buffer determines the difference in AC performance between voltage and current feedback. Amplifiers with an external compensation capacitor allow optimal frequency adjustment versus closed-loop gain, but nevertheless do not significantly improve large-signal behavior. The most effective solution is to make the open-loop gain (GOL) externally adjustable. The specifications for offset voltage, CMMR, and settling times are the compromise for higher speed. The widely-used current-feedback op amp type designed with real complementary circuit techniques overcomes the internal compensation capacitor and allows the feedback network to set the open-loop gain. The ratio of the feedback resistors determines the low-frequency closed-loop gain, and the parallel impedance defines the amplifier’s open-loop gain for stable operation and flat frequency response. A nearly constant bandwidth can be achieved over a wide range of closed-loop gains. However, current-feedback op amps suffer from nonidentical inputs and poor input offset and CMRR. The voltage-feedback op amp OPA622 with its complementary topology features two identical high-impedance inputs, lower input offset values, and improved CMRR. The ratio of the feedback resistors determines the lowfrequency closed-loop gain, and the external resistor ROG sets the open-loop gain to achieve a flat frequency response over a wide range of closed-loop gains. Since ROG can be selected, optimized pulse responses are possible even with larger load capacitances. The OPA622 combines the slew rate enhancements of a complementary amplifier design with the precision of a voltage-feedback system. The open-loop gain for the current-feedback amplifier varies directly with the closed-loop gain and can be adjusted by changing the size of R2||R1. For gains of less than 10V/V, the open-loop gain can be adjusted to achieve bandwidth independent of gain, but the effects of this adjustment become limited when second-order effects start to dominate. Figure 6 gives an overview of the OPA622 inverting and non-inverting amplifier configurations and shows the equations for the closed-loop gains. OPTIMAL FREQUENCY RESPONSE ADJUSTMENT Conventional voltage-feedback op amps use a compensation capacitor for stable unity-gain operation. During transitions, the quiescent current charges and discharges this capacitor, and both parameters determine the slew rate according to: SR = ∆ VOUT ∆t = I C This method is not appropriate for wide-band op amps. The slew rate and thus the large-signal behavior are significantly reduced, and the bandwidth decreases with increasing closedloop gains according to the gain-bandwidth product. The hybrid model shown in Figure 9 describes the AC behavior of a noncompensated wide-band differential op amp. The open-loop frequency response, which is illustrated in Figure 10 for various ROG values, is determined by two Voltage-Feedback Non-inverting OTA Inverting VOUT OTA VOUT OB OB +VIN R2 ROG R2 ROG FB FB R1 GCL = 1 + R1 R2 GCL = – R1 –VIN R2 R1 Current-Feedback Non-inverting OTA Inverting VOUT OTA VOUT OB OB +VIN R2 R2 R1 FB R1 FB –VIN GCL = 1 + R2 GCL = – R1 R2 R1 FIGURE 6. Op Amp Configurations for OPA622. ® 13 OPA622 time constants. The elements R and COTA between the current source output and the output buffer form the first open-loop pole TC. The signal delay time, TD, modelled in the output buffer, combines several small phase-shifting time constants and delay times. They are distributed throughout the amplifier and are also present in the feedback loop. As shown in Figure 10, an increasing ROG leads to a decreasing open-loop gain. The ratio of the two time constants, TC and TD, of the open-loop frequency response also determines the product GOL • GCL for optimal closed-loop frequency response. GOL = G+CL • gain) at low closed-loop gains. Harmonic distortion is also improved with increased open-loop gain. Figure 12 shows the OPA622 frequency response at GCL = +2V/V and variable ROG to demonstrate its influence on a flat frequency response. Slight variation of ROG might be necessary to compensate for load capacitance. It is possible to achieve optimal pulse response over a wide range of load capacitances without overshooting and ringing. As an example, Figure 13 shows a selection curve for the optimal ROG value versus the load capacitance at a gain (GCLO) of +2V/V. THERMAL CONSIDERATIONS The OPA622 does not require a heat sink for operation in most environments. A heat sink will, however, reduce the internal thermal rise, resulting in cooler, more reliable operation. At extreme temperatures and under full load conditions, a heat sink is necessary. The internal power dissipation is given by the equation PD = PDQ + PDL, (PDQ is the quiescent power dissipation and PDL is the power dissipation in the output stage due to the load). Although the PDQ is very low (50mW at VCC = ±5V), care should be taken TC 2TD TC and TD are fixed by the op amp design. The purpose of ROG now is to vary GOL versus GCL to keep the product GOL • GCL constant, which is the theoretical condition for optimal and gain-independent frequency response. Figure 11 summarizes some optimal flat closed-loop responses and indicates the ROG values. It should be noted that the bandwidth remains relatively constant and ROG has its highest value (low open-loop 20 Output Voltage (Vp-p) 15 CT RT 2.8Vp-p 10 5 1.4Vp-p 0 –1 10 9 R2 0.6Vp-p –5 4 –10 VOUT TD 0.2Vp-p gm +In –15 150Ω –20 gm 3 ROG –In R1 8 +1 13 1k –25 8 dB 1M 10M 100M 1G FIGURE 9. Hybrid Model of a Wideband Op Amp. 3G Frequency (HZ) 60 FIGURE 7. Bandwidth vs Output Voltage (Feedback Buffer ). ROG = 0Ω 50 27Ω 150Ω 390Ω 40 15 5.0Vp-p 10 2.8Vp-p 5 1.4Vp-p 0 Gain (dB) Output Voltage (Vp-p) 20 20 10 0 0.6Vp-p –5 –10 30 –10 0.2Vp-p –20 0.5pF 150Ω –15 4 + 10 3 9 –20 13 180Ω –25 – +1 10k 8 1M 10M 180Ω GCL = +2V/V dB 1M 100k Frequency (Hz) 150Ω 10M 100M FIGURE 10. Open-Loop Gain vs ROG. 1G 3G Frequency (HZ) FIGURE 8. Bandwidth vs Output Voltage (Current-Feedback Amplifier). ® OPA622 14 100M 1G • Make short, low-inductance traces. The entire physical circuit should be as small as possible. when a signal is applied. For high-speed op amps, a more precise approach to determine power consumption is to measure the average total quiescent current for several typical load conditions. The power consumption of the OPA622 is influenced by the signal type and frequency, the output voltage and load resistor, and the repetition rate of the signal transitions. Figure 14 shows the total average supply current versus the frequency of an applied sine wave for various output voltages. Figure 15 illustrates the total quiescent current versus the repetition frequency of an applied square wave signal. • Use a low-impedance ground plane on the component side to ensure that low-impedance ground is available throughout the layout. • Place the ROG resistor as close as possible to the package and use the shortest possible trace length. • Do not extend the ground plane over high-impedance nodes sensitive to stray capacitances such as the amplifier’s input and ROG terminals. • Sockets are not recommended, because they add significant inductance and parasitic capacitance. If sockets are required, use zero-profile solderless sockets. CIRCUIT LAYOUT The high-frequency performance of the OPA622 can be greatly affected by the physical layout of the printed circuit board. The following tips are offered as suggestions, not as absolute musts. Oscillations, ringing, poor bandwidth and settling, and peaking are all typical problems that plague high-speed components when they are used incorrectly. • Use low-inductance, surface-mount components for best AC performance. • A resistor (50Ω to 330Ω) in series with the high-impedance inputs is strictly recommended for stable operation. • Plug-in prototype boards and wire-wrap boards will not function well. A clean layout using RF techniques is essential. • Bypass power supplies very close to the device pins. Use tantalum chip capacitors (approximately 2.2µF) and a parallel 470pF ceramic chip capacitor. Surface-mount types are recommended because of their low lead inductance. • PC board traces for power lines should be wide to reduce impedance. 15 Gain (5dB/Div) 10 5 0 –5 GCL = +10 ROG = 10Ω GCL = +2 ROG = 150Ω GCL = +1 ROG = 390Ω GCL = –1 ROG = 200Ω GCL = –2 ROG = 120Ω 47pF Gain (5dB/Div) 20 –10 22pF 10pF –15 –20 –25 –30 CLOAD R OG C OTA 10p180 Ω 0.5p 22p200 Ω0.5p GCL = +2V/V, VO = 2.8Vp-p 47p150 Ω0.5p OPA622AP VO = 1.4Vp-p, Refer to Table I for recommended component values. 100k 1M 10M 1M 1M 1G FIGURE 11. Optimum Response vs Closed-Loop Gains. 100M 1G FIGURE 13. Bandwidth vs CLOAD. 50 5 Average Supply Current (mA) 10 Amplitude (dB) 10M Frequency (Hz) Frequency (Hz) ROG = 50Ω 0 –5 ROG = 150Ω –10 ROG = 300Ω –15 –20 40 30 2.8Vp-p 20 0.2Vp-p 0 1M 10M 100M 300k 1G 1.4Vp-p 10 GCL = +2V/V –25 100k 5Vp-p G = +2V/V, RLOAD = 100Ω 1M 10M 100M 1G Frequency (Hz) Frequency (Hz) FIGURE 12. Closed-Loop Gain vs ROG. FIGURE 14. Average Supply Current vs Frequency (Sine Wave). ® 15 OPA622 Average Supply Current (mA) 25 5Vp-p 20 x 15 x 2.8Vp-p x 1.4Vp-p x 10 0.2Vp-p 5 0 x x x x x GCL = +2V/V, RLOAD = 100Ω 1k 10k 100k 1M 10M 100M 1G Frequency (Hz) FIGURE 15. Average Supply Current vs Frequency (Square Wave). –VCC +VCC 1pF COTA 5 RQC 390Ω –VCC 2 12 +VCC OUT 10 11 Biasing 9 OB RLR 150Ω ZO = 50Ω In POS RSOURCE = 50Ω RL2 100Ω RL1 100Ω R5 NC(1) RL 50Ω 4 RING NC(1) 3 OTA OPA622 FB R3 0Ω NC(1) RSOURCE = 50Ω 8 ROG 150Ω 13 –VCC OUT R4 NC(1) R6 NC(1) 6 R2 330Ω 12 R9 10Ω +5V 11 C2 C3 470pF 10nF 2.2µF C6 C5 C4 470pF 10nF 2.2µF –5V 6 NOTE: (1) NC = Not connected on Demo Board. C1 Gnd Component values shown are for GCL = +2. See Table I for recommended values for other closed-loop gains. 5 R8 10Ω FIGURE 16. Test Circuit Schematic. ® OPA622 ZO = 50Ω RIN 50Ω R1 330Ω ZO = 50Ω InNEG Out 16 required for stable operation. The package pins, the internal lead frame, and bond wires form a resonant circuit. A resistor in the range of 150Ω to 390Ω in series with all high impedance inputs will damp the package related resonant circuit. Also, the feedback resistor R1 is in series with the inverting high impedance inputs. R1 ≥ 330Ω is recommended for the DIP package and R1 ≥ 150Ω is recommended for the SO-package. RECOMMENDED COMPONENTS VALUES Table I summarizes recommended component values for optimum flat frequency response. The recommended values were determined with a 100Ω load resistance and a 2pF load capacitance. Some adjustment of circuit values may be required, especially with higher load capacitance. According to the behavior shown in Figure 12, the frequency response will show a peaking when the ROG is decreased and will roll off more gradually when ROG is increased. The COTA capacitor is responsible for the first open-loop pole and a small external capacitor for the gains +1V/V and +2V/V is OPA622AP, IQ = 5mA, RQC = 430Ω PLASTIC DIP OPA622AU, IQ = 5mA, RQC = 430Ω SURFACE-MOUNT GCL GCL Component +1 +2 +5 +10 –1 –2 UNITS R1 R2 R3 ROG COTA RILR R4 R5 Ring Bandwidth VOUT = 0.2Vp-p VOUT = 2.8Vp-p 0 — 220 330 2.2 150 — — — 330 330 0 150 1 150 — — — 620 160 0 56 — 150 — — — 1600 180 0 10 — 150 — — — 390 — 0 200 1 150 390 62 150 470 — 0 150 1 150 240 62 150 Ω Ω Ω Ω pF Ω Ω Ω Ω 170 220 160 200 140 170 110 110 135 150 125 150 MHz MHz Component +1 +2 +5 +10 –1 –2 UNITS R1 R2 R3 ROG COTA RLR R4 R6 Ring Bandwidth VOUT = 0.2Vp-p VOUT = 2.3Vp-p 150 — 0 270 2.2 200 — — — 240 240 0 150 1 150 — — — 470 120 0 47 — 200 — — — 820 91 0 10 — 200 — — — 240 — 0 160 1 150 240 68 150 300 — 0 100 1 150 150 68 150 Ω Ω Ω Ω pF Ω Ω Ω Ω 200 250 170 240 160 230 100 100 180 250 175 240 MHz MHz TABLE I. Recommended Components Values for Optimum Frequency Performance. FIGURE 17. Silkscreen and Test Circuit Board Layouts. ® 17 OPA622 330Ω 330Ω 3 150Ω Video Input 75Ω 9 OPA622 4 13 AP 75Ω Transmission Line VOUT 75Ω ROG 8 150Ω 75Ω 75Ω VOUT 75Ω Bandwidth, (5Vp-p) = 150MHz (OPA622AP) 200MHz (OPA622AU) 75Ω VOUT High output current drive capability (6Vp-p into 50Ω) allows three back-terminated 75Ω transmission lines to be simultaneously driven. 75Ω FIGURE 18. Video Distribution Amplifier. +6V +6V 100Ω 50Ω 100Ω 1µF 10Ω 100Ω 1µF 12 VIN1 4 X2X1 +V W1 Wideband Multiplier Y1Y2 –V W2 100Ω 11 10 150Ω OPA622 3 VIN2 50Ω 9 VOUT 13 5 8 100Ω 6 1µF 50Ω 330Ω 10Ω 100Ω –6V –6V FIGURE 19. Wideband Multiplier Output Amplifier. –5V + VIN RIN 150Ω RQC 630Ω 1pF COTA CFA 9 + - V –) + V – VOUT = GCL (VIN IN IN R2 180Ω RN 180Ω – VIN RIN 150Ω 3 OB R2/RN sets the closed-loop gain; COTA sets the first open-loop pole; R2 || RN sets the open-loop gain. R2 +GCL = 1 + — = +2V/V RN 8 FIGURE 20. Current-Feedback Amplifier with Two Equal and High Impedance Inputs. ® OPA622 18 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. 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