19-1352; Rev 3; 8/03 KIT ATION EVALU LE B A IL A AV 900MHz Image-Reject Receivers Features The MAX2440/MAX2441/MAX2442 highly integrated front-end receiver ICs provide the lowest cost solution for cordless phones and ISM-band radios operating in the 900MHz band. All devices incorporate receive imagereject mixers to reduce filter cost. They operate with a +2.7V to +4.8V power supply, allowing direct connection to a 3-cell battery stack. The signal path incorporates an adjustable-gain LNA and an image-reject downconverter with 35dB image suppression. These features yield excellent combined downconverter noise figure (4dB) and high linearity with an input third-order intercept point (IP3) of up to +2dBm. All devices include an on-chip local oscillator (LO), requiring only an external varactor-tuned LC tank for operation. The integrated divide-by-64/65 dual-modulus prescaler can also be set to a direct mode, in which it acts as an LO buffer amplifier. Three separate powerdown inputs can be used for system power management, including a 0.5µA shutdown mode. These parts are compatible with commonly used modulation schemes such as FSK, BPSK, and QPSK, as well as frequency hopping and direct sequence spread-spectrum systems. All devices come in a 28-pin SSOP package. Evaluation kits are available for the MAX2420/ MAX2421/MAX2422. The MAX2420/MAX2421/MAX2422 are transceivers whose receive sections and pinout are identical to the MAX2440/MAX2441/MAX2442. ♦ Receive Mixer with 35dB Image Rejection For complete transceiver devices, refer to the MAX2420/ MAX2421/MAX2422/MAX2460/MAX2463 and MAX2424/ MAX2426 data sheets. ___________________Pin Configuration ________________________Applications Cordless Phones Spread-Spectrum Communications Wireless Telemetry Two-Way Paging ♦ Adjustable-Gain LNA ♦ Up to +2dBm Combined Receiver Input IP3 ♦ 4dB Combined Receiver Noise Figure ♦ Low Current Consumption: 23mA Receive 9.5mA Oscillator ♦ 0.5µA Shutdown Mode ♦ Operates from Single +2.7V to +4.8V Supply _______________Ordering Information PART TEMP RANGE PIN-PACKAGE MAX2440EAI -40°C to +85°C 28 SSOP MAX2441EAI MAX2442EAI -40°C to +85°C -40°C to +85°C 28 SSOP 28 SSOP Functional Diagram appears at end of data sheet. TOP VIEW VCC 1 28 GND CAP1 2 27 GND RXOUT 3 26 GND GND 4 RXIN 5 Wireless Networks VCC 6 GND 7 ______________________Selector Guide PART IF FREQ (MHz) INJECTION TYPE LO FREQ (MHz) MAX2440 10.7 High side fRF + 10.7 MAX2441 46 High side fRF + 46 MAX2442 70 High side fRF + 70 25 TANK MAX2440 MAX2441 MAX2442 24 TANK 23 VCC 22 VCC 21 PREOUT GND 8 20 PREGND GND 9 LNAGAIN 10 19 MOD VCC 11 18 DIV1 GND 12 17 VCOON GND 13 16 RXON GND 14 15 GND SSOP ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX2440/MAX2441/MAX2442 General Description MAX2440/MAX2441/MAX2442 900MHz Image-Reject Receivers ABSOLUTE MAXIMUM RATINGS VCC to GND ...........................................................-0.3V to +5.5V Voltage on LNAGAIN, RXON, VCOON, DIV1, MOD .............................................-0.3V to (VCC + 0.3V) RXIN Input Power..............................................................10dBm TANK, TANK Input Power ...................................................2dBm Continuous Power Dissipation (TA = +70°C) SSOP (derate 9.50mW/°C above +70°C) ....................762mW Operating Temperature Range MAX244_EAI ...................................................-40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +165°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. CAUTION! ESD SENSITIVE DEVICE DC ELECTRICAL CHARACTERISTICS (VCC = +2.7V to +4.8V, no RF signals applied, LNAGAIN = unconnected, VVCOON = 2.4V, VRXON = VMOD = VDIV1 = 0.45V, PREGND = GND, TA = TMIN to TMAX. Typical values are at TA = +25°C, VCC = +3.3V, unless otherwise noted.) (Note 1) CONDITIONS PARAMETER Supply-Voltage Range MIN TYP UNITS 4.8 V Oscillator Supply Current PREGND = unconnected 9.5 14 mA Prescaler Supply Current (divide-by-64/65 mode) (Note 2) 4.2 6 mA Prescaler Supply Current (buffer mode) VDIV1 = 2.4V (Note 3) 5.4 8.5 mA Receive Supply Current VRXON = 2.4V, PREGND = unconnected (Note 4) 23 36 mA Shutdown Supply Current VCOON = RXON = MOD = DIV1 = GND Digital Input Voltage High RXON, DIV1, VCOON, MOD Digital Input Voltage Low RXON, DIV1, VCOON, MOD Digital Input Current Voltage on any one digital input = VCC or GND Note 1: Note 2: Note 3: Note 4: 2 2.7 MAX TA = +25°C 0.5 TA = TMIN to TMAX 10 2.4 µA V ±1 0.45 V ±10 µA ≥25°C guaranteed by production test, <25°C guaranteed through correlation to worst-case temperature testing. Calculated by measuring the combined oscillator and prescaler supply current and subtracting the oscillator supply current. Calculated by measuring the combined oscillator and LO buffer supply current and subtracting the oscillator supply current. Calculated by measuring the combined receive and oscillator supply current and subtracting the oscillator supply current. With LNAGAIN = GND, the supply current drops by 4.5mA. _______________________________________________________________________________________ 900MHz Image-Reject Receivers (MAX242X/MAX246X EV kit, VCC = +3.3V; fLO = 925.7MHz (MAX2440), fLO = 961MHz (MAX2441), fLO = 985MHz (MAX2442), fRXIN = 915MHz; PRXIN = -35dBm; VLNAGAIN = 2V; VVCOON = VRXON = 2.4V; RXON = MOD = DIV1 = PREGND = GND; TA = +25°C, unless otherwise noted.) PARAMETER CONDITIONS MIN TYP MAX UNITS 1000 MHz RECEIVER Input Frequency Range (Notes 5, 6) IF Frequency Range (Notes 5, 6) 800 MAX2440 8.5 10.7 12.5 MAX2441 36 46 55 MAX2442 55 70 85 26 35 Image Frequency Rejection Conversion Power Gain (Note 7) Noise Figure DIV1 = VCC (Notes 5, 7) Input Third-Order Intercept (Notes 5, 8) Input 1dB Compression dB LNAGAIN = VCC, TA = +25°C MAX2440/MAX2441 20 22 24.5 MAX2442 19 21 23.5 LNAGAIN = VCC, TA = TMIN to TMAX (Note 5) MAX2440/MAX2441 19.5 25 18 24 dB MAX2442 VLNAGAIN = 1V 12 LNAGAIN = GND -16 LNAGAIN = VCC 4 VLNAGAIN = 1V 12 LNAGAIN = VCC VLNAGAIN = 1V MHz -19 -17 -8 LNAGAIN = VCC -26 VLNAGAIN = 1V -18 5 dB dBm dBm LO to RXIN Leakage Receiver on or off -60 dBm Receiver Turn-On Time (Note 9) 500 ns _______________________________________________________________________________________ 3 MAX2440/MAX2441/MAX2442 AC ELECTRICAL CHARACTERISTICS 900MHz Image-Reject Receivers MAX2440/MAX2441/MAX2442 AC ELECTRICAL CHARACTERISTICS (continued) (MAX242X/MAX246X EV kit, VCC = +3.3V; fLO = 925.7MHz (MAX2440), fLO = 961MHz (MAX2441), fLO = 985MHz (MAX2442), fRXIN = 915MHz; PRXIN = -35dBm; VLNAGAIN = 2V; VVCOON = VRXON = 2.4V; RXON = MOD = DIV1 = PREGND = GND; TA = +25°C, unless otherwise noted.) PARAMETER CONDITIONS MIN TYP MAX UNITS 1100 MHz OSCILLATOR AND PRESCALER Oscillator Frequency Range (Notes 5, 10) 690 Oscillator Phase Noise 10kHz offset (Note 11) 82 Standby to RX 8 Oscillator Pulling Standby mode with PRXIN = -45dBm to PRXIN = 0dBm (Note 12) 70 Prescaler Output Level ZL = 100kΩ | | 10pF 500 TA = +25°C -11 TA = TMIN to TMAX -12 Oscillator Buffer Output Level DIV1 = 2.4V, ZL = 50Ω (Note 5) Required Modulus Setup Time Divide-by-64/65 mode (Notes 5, 13) -8 10 dBc/Hz kHz mVp-p dBm ns Note 5: Guaranteed by design and characterization. Note 6: Image rejection typically falls to 30dBc at the frequency extremes. Note 7: Refer to the Typical Operating Characteristics for plots showing receiver gain versus LNAGAIN voltage, input IP3 versus LNAGAIN voltage, and noise figure versus LNAGAIN voltage. Note 8: Two tones at PRXIN = -45dBm each, f1 = 915.0MHz and f2 = 915.2MHz. Note 9: Time delay from RXON = 0.45V to RXON = 2.4V transition to the time the output envelope reaches 90% of its final value. Note 10: Refers to useable operating range. Tuning range of any given tank circuit design is typically much narrower (refer to Figure 1). Note 11: Using tank components L3 = 5.0nH (Coilcraft A02T), C2 = C3 = C26 = 3.3pF, R6 = R7 = 10Ω. Note 12: This approximates a typical application in which a transmitter is followed by an external PA and a T/R switch with finite isolation. Note 13: Relative to the rising edge of PREOUT. 4 _______________________________________________________________________________________ 900MHz Image-Reject Receivers SHUTDOWN SUPPLY CURRENT vs. TEMPERATURE 3.5 VCC = 4.8V 3.0 VCC = 3.3V 32 VCC = 2.7V 30 VCC = 3.3V 2.0 VCC = 4.8V 1.5 28 0.5 24 -20 0 20 40 60 80 100 MAX GAIN -5 AVOID THIS REGION -20 -40 -20 0 20 40 60 80 0 100 0.5 1.0 1.5 2.0 LNAGAIN VOLTAGE (V) RECEIVER INPUT IP3 vs. VLNAGAIN RECEIVER NOISE FIGURE vs. LNAGAIN MAX2440 RECEIVER GAIN vs. TEMPERATURE LNA ADJUSTABLE MAX PARTIALLY GAIN GAIN BIASED 35 LNA OFF -10 LNA ADJUSTABLE MAX PARTIALLY GAIN GAIN BIASED 25 20 15 AVOID THIS REGION -15 5 0 0.5 1.0 1.5 0 2.0 0.5 VCC = 2.7V 24 VCC = 4.8V 22 VCC = 3.3V 20 18 DIV1 = VCC 0 -20 LNAGAIN = VCC 26 RECEIVER GAIN (dB) NOISE FIGURE (dB) 30 AVOID THIS REGION -5 40 MAX2440/1/2-04 LNA OFF MAX2440/1/2-05 TEMPERATURE (°C) 10 1.0 1.5 2.0 -40 -20 0 20 40 60 80 100 LNAGAIN VOLTAGE (V) LNAGAIN VOLTAGE (V) TEMPERATURE (°C) RECEIVER NOISE FIGURE vs. TEMPERATURE AND SUPPLY VOLTAGE RECEIVER INPUT IP3 vs. TEMPERATURE MAX2440 RXOUT 1dB COMPRESSION POINT vs. TEMPERATURE -8 VLNAGAIN = 1V -10 VCC = 4.8V IIP3 (dBm) 4.5 VCC = 3.3V 4.0 VCC = 2.7V -12 -14 -16 VLNAGAIN = 2V 3.5 -18 3.0 -20 0 20 40 60 TEMPERATURE (°C) 80 100 -4 VCC = 4.8V -5 VCC = 2.7V -6 VCC = 3.3V -7 -8 -9 -20 -40 MAX2440/1/2-9 5.0 -3 1dB COMPRESSION POINT (dBm) LNAGAIN = VCC DIV1 = VCC MAX2440/1/2-08 -6 MAX2440/1/2-07 5.5 NOISE FIGURE (dB) ADJUSTABLE GAIN 0 TEMPERATURE (°C) 5 0 5 -15 VCC = 2.7V 0 -40 10 -10 1.0 PREGND = UNCONNECTED INCLUDES OSCILLATOR CURRENT 26 IIP3 (dBm) 2.5 15 MAX2440/1/2-06 34 ICC (µA) 36 LNA PARTIALLY BIASED LNA OFF 20 RECEIVER GAIN (dB) 38 VCOON = GND RXON = GND 4.0 RECEIVER GAIN vs. LNAGAIN 25 MAX2440/1/2-02 40 ICC (mA) 4.5 MAX2440/1/2-01 42 MAX2440/1/2-03 RECEIVER SUPPLY CURRENT vs. TEMPERATURE -40 -20 0 20 40 60 TEMPERATURE (°C) 80 100 -40 -20 0 20 40 60 80 TEMPERATURE (°C) _______________________________________________________________________________________ 5 MAX2440/MAX2441/MAX2442 Typical Operating Characteristics (MAX242X/MAX246X EV kit, VCC = +3.3V; fLO = 925.7MHz (MAX2440), fLO = 961MHz (MAX2441), fLO = 985MHz (MAX2442), fRXIN = 915MHz; PRXIN = -35dBm; VLNAGAIN = 2V; VVCOON = 2.4V; RXON = VCC; MOD = DIV1 = PREGND = GND; TA = +25°C, unless otherwise noted.) Typical Operating Characteristics (continued) (MAX242X/MAX246X EV kit, VCC = +3.3V; fLO = 925.7MHz (MAX2440), fLO = 961MHz (MAX2441), fLO = 985MHz (MAX2442), fRXIN = 915MHz; PRXIN = -35dBm; VLNAGAIN = 2V; VVCOON = 2.4V; RXON = VCC; MOD = DIV1 = PREGND = GND; TA = +25°C, unless otherwise noted.) RECEIVER IMAGE REJECTION vs. RF FREQUENCY RECEIVER IMAGE REJECTION vs. IF FREQUENCY RXON = VCC 50 MAX2441 35 IMAGE REJECTION (dB) 40 IMAGE REJECTION (dB) MAX2440/1/2-11 40 MAX2440/1/2-10 60 30 20 10 MAX2442 25 20 15 10 -10 5 -20 MAX2440 30 0 0 0 400 800 1200 1600 2000 1 10 RF FREQUENCY (MHz) -100 -80 IMAGINARY 30 25 -60 REAL 20 -40 15 10 -20 IMAGINARY IMPEDANCE (Ω) 40 MAX2440/1/2-13 550 45 35 500 450 400 350 300 250 200 150 LOAD IS PLOTTED RESISTANCE IN PARALLEL WITH A 10pF OSCILLOSCOPE PROBE (÷ 64/65 MODE) 100 50 5 0 -0 600 800 1000 1200 1000 PRESCALER OUTPUT LEVEL vs. LOAD RESISTANCE PRESCALER OUTPUT LEVEL (mVp-p) MAX2440/1/2-12 50 100 IF FREQUENCY (MHz) RXIN INPUT IMPEDANCE vs. FREQUENCY REAL IMPEDANCE (Ω) MAX2440/MAX2441/MAX2442 900MHz Image-Reject Receivers 1400 0 1 100 1k 10k LOAD RESISTANCE (Ω) FREQUENCY (MHz) 6 _______________________________________________________________________________________ 100k 900MHz Image-Reject Receivers PIN NAME FUNCTION 1 VCC 2 CAP1 3 RXOUT 4, 9, 12–15 GND Ground Connection 5 RXIN Receiver RF Input, single-ended. The input match shown in Figure 1 maintains an input VSWR of better than 2:1 from 902MHz to 928MHz. 6 VCC Supply Voltage Input for Receive Low-Noise Amplifier. Bypass with a 47pF low-inductance capacitor to GND (pin 7 recommended). 7 GND Ground Connection for Receive Low-Noise Amplifier. Connect directly to ground plane using multiple vias. 8 GND Ground Connection for Signal-Path Blocks, except LNA. Connect directly to ground plane. Supply-Voltage Input for Master Bias Cell. Bypass with a 47pF low-inductance capacitor and 0.1µF to GND (pin 28 recommended). Receive Bias Compensation Pin. Bypass with a 47pF low-inductance capacitor and 0.01µF to GND. Do not make any other connections to this pin. Single-Ended, 330Ω IF Output. AC couple to this pin. 10 LNAGAIN Low-Noise Amplifier Gain-Control Input. Drive this pin high for maximum gain. When LNAGAIN is pulled low, the LNA is capacitively bypassed and the supply current is reduced by 4.5mA. This pin can also be driven with an analog voltage to adjust the LNA gain in intermediate states. Refer to the Receiver Gain vs. LNAGAIN Voltage graph in the Typical Operating Characteristics, as well as Table 1. 11 VCC Supply Voltage Input for Signal-Path Blocks, except LNA. Bypass with a 47pF low-inductance capacitor and 0.01µF to GND (pin 8 recommended). 16 RXON Driving RXON with a logic high enables the LNA, receive mixer, and IF output buffer. VCOON must also be high. 17 VCOON 18 DIV1 Driving DIV1 with a logic high disables the divide-by-64/65 prescaler and connects the PREOUT pin directly to an oscillator buffer amplifier, which outputs -8dBm into a 50Ω load. Tie DIV1 low for divide-by64/65 operation. Pull this pin low when in shutdown to minimize off current. 19 MOD Modulus Control for the Divide-by-64/65 Prescaler: high = divide-by-64, low = divide-by-65. Note that the DIV1 pin must be at logic low when using the prescaler mode. 20 PREGND Ground connection for the Prescaler. Tie PREGND to ground for normal operation. Leave floating to disable the prescaler and the output buffer. Tie MOD and DIV1 to ground and leave PREOUT floating when disabling the prescaler. 21 PREOUT Prescaler/Oscillator Buffer Output. In divide-by-64/65 mode (DIV1 = low), the output level is 500mVp-p into a high-impedance load. In divide-by-1 mode (DIV1 = high), this output delivers -8dBm into a 50Ω load. AC couple to this pin. 22 VCC Supply-Voltage Input for Prescaler. Bypass with a 47pF low-inductance capacitor and 0.01µF to GND (pin 20 recommended). 23 VCC Supply-Voltage Input for VCO and Phase Shifters. Bypass with a 47pF low-inductance capacitor to GND (pin 26 recommended). 24 TANK Differential Oscillator Tank Port. See Applications Information for information on tank circuits or on using an external oscillator. 25 TANK Differential Oscillator Tank Port. See Applications Information for information on tank circuits or on using an external oscillator. Driving VCOON with a logic high turns on the VCO, phase shifters, VCO buffers, and prescaler. The prescaler can be selectively disabled by floating the PREGND pin. _______________________________________________________________________________________ 7 MAX2440/MAX2441/MAX2442 Pin Description 900MHz Image-Reject Receivers MAX2440/MAX2441/MAX2442 Pin Description (continued) PIN NAME FUNCTION 26 GND Ground Connection for VCO and Phase Shifters 27 GND Ground (substrate) 28 GND Ground Connection for Master Bias Cell VCC VCC 1 0.1µF 47pF 47pF 28 2 0.1µF VCC VCC GND PREGND CAP1 VCC GND 5 RXIN 47pF 12nH 9 6 MAX2440 MAX2441 MAX2442 RXOUT 7 8 14 4 10 47pF 3 VARACTOR: ALPHA SMV1299-004 OR EQUIVALENT GND GND LNAGAIN 100nH 1kΩ R7 TANK C2 47kΩ 24 C26 R6 TANK GND GND 6.8 3.3 3.3 VCC VCC GND MAX2440 MAX2441 MAX2442 C26 C2, C3 R6, R7 (Ω) (pF) (pF) 10 1.8 3.3 15 3.6 4.0 15 3.0 4.0 12 GND VCC L3 (nH) RECEIVE IF OUTPUT (330Ω) L3 13 LNAGAIN 27 25 11 47pF 26 PART 0.01µF VCC 0.01µF 23 SEE APPLICATIONS INFORMATION SECTION L3: COILCRAFT 0805HS-060TMBC GND 47pF VCO TANK COMPONENTS FOR 915MHz TYPICAL RF 47pF 47pF 8.2nH 0.01µF 20 VCC GND RECEIVE RF INPUT 22 1000pF PREOUT MOD DIV1 VCOON RXON GND 21 19 18 17 16 15 C3 TO PLL MOD DIV1 VCOON RXON Figure 1. Typical Operating Circuit 8 _______________________________________________________________________________________ 1kΩ VCO ADJUST 47pF 900MHz Image-Reject Receivers The following sections describe each of the blocks shown in the Functional Diagram. Receiver The MAX2440/MAX2441/MAX2442’s receive path consists of a 900MHz low-noise amplifier, an image-reject mixer, and an IF buffer amplifier. The LNA’s gain and biasing are adjustable via the LNAGAIN pin. Proper operation of this pin can provide optimum performance over a wide range of signal levels. The LNA can be placed in four modes by applying a DC voltage on the LNAGAIN pin. See Table 1, as well as the relevant Typical Operating Characteristics plots. At low LNAGAIN voltages, the LNA is shut off, and the input signal capacitively couples directly into the mixer to provide maximum linearity for large-signal operation (receiver close to transmitter). As the LNAGAIN voltage is raised, the LNA begins to turn on. Between 0.5V and 1V at LNAGAIN, the LNA is partially biased and behaves like a Class C amplifier. Avoid this operating mode for applications where linearity is a concern. As the LNAGAIN voltage reaches 1V, the LNA is fully biased into Class A mode, and the gain is monotonically adjustable at LNAGAIN voltages above 1V. See the Receiver Gain, Receiver IP3, and Receiver Noise Figure vs. LNAGAIN plots in the Typical Operating Characteristics for more information. The downconverter is implemented using an imagereject mixer consisting of an input buffer with two outputs, each of which is fed to a double-balanced mixer. The local-oscillator (LO) port of each mixer is driven from a quadrature LO. The LO is generated from an onchip oscillator and an external tank circuit. Its signal is buffered and split into phase shifters, which provide 90° of phase shift across their outputs. This pair of LO signals is fed to the mixers. The mixers’ outputs are then passed through a second pair of phase shifters, which provide a 90° phase shift across their outputs. The Table 1. LNA Modes LNAGAIN VOLTAGE (V) 0 < V ≤ 0.5 MODE LNA capacitively bypassed, minimum gain, maximum IP3 0.5 < V < 1.0 LNA partially biased. Avoid this mode— the LNA operates in a Class C manner 1.0 < V ≤ 1.5 LNA gain is monotonically adjustable 1.5 < V ≤ VCC LNA at maximum gain (remains monotonic) resulting mixer outputs are then summed together. The final phase relationship is such that the desired signal is reinforced and the image signal is canceled. The downconverter mixer output appears on the RXOUT pin, a single-ended 330Ω output. Phase Shifters MAX2440/MAX2441/MAX2442 devices use passive networks to provide quadrature phase shifting for the receive IF and LO signals. Because these networks are frequency selective, proper part selection is important. Image rejection degrades as the IF and RF move away from the designed optimum frequencies. Refer to the Selector Guide on the front page of this data sheet. Local Oscillator (LO) The on-chip LO is formed by an emitter-coupled differential pair. An external LC resonant tank sets the oscillation frequency. A varactor diode is typically used to create a voltage-controlled oscillator (VCO). See the Applications Information section and Figure 2 for an example VCO tank circuit. The LO may be overdriven in applications where an external signal is available. The external LO signal should be about 0dBm from 50Ω, and should be AC coupled into either the TANK or TANK pin. Both TANK and TANK require pull-up resistors to VCC. See the Applications Information section and Figure 3 for details. The local oscillator resists LO pulling caused by changes in load impedance that occur as the part is switched from standby mode. The amount of LO pulling will be affected if there is power at the RXIN port due to imperfect isolation in an external transmit/receive (T/R) switch. Prescaler The on-chip prescaler can be used in two different modes: as a dual-modulus divide-by-64/65, or as oscillator buffer amplifier. The DIV1 pin controls this function. When DIV1 is low, the prescaler is in dual-modulus divide-by-64/65 mode; when it is high, the prescaler is disabled and the oscillator buffer amplifier is enabled. The buffer typically outputs -8dBm into a 50Ω load. To minimize shutdown supply current, pull the DIV1 pin low when in shutdown mode. In divide-by-64/65 mode, the division ratio is controlled by the MOD pin. When MOD is high, the prescaler is in divide-by-64 mode; when it is low, it divides the LO frequency by 65. The DIV1 pin must be at a logic low in this mode. _______________________________________________________________________________________ 9 MAX2440/MAX2441/MAX2442 Detailed Description MAX2440/MAX2441/MAX2442 900MHz Image-Reject Receivers To disable the prescaler entirely, leave PREGND and PREOUT floating. Also tie the MOD and DIV1 pins to GND. Disabling the prescaler does not affect operation of the VCO stage. Power Management MAX2440/MAX2441/MAX2442 supports three different power-management features to conserve battery life. The VCO section has its own control pin (VCOON), which also serves as a master bias pin. When VCOON is high, the LO, quadrature LO phase shifters, and prescaler or LO buffer are all enabled. The VCO can be powered up prior to receiving to allow it to stabilize. With VCOON high, bringing RXON high enables the receive path, which consists of the LNA, image-reject mixers, and IF output buffer. When this pin is low, the receive path is inactive. To disable all chip functions and reduce the supply current to typically less than 0.5µA, pull VCOON, DIV1, MOD, and RXON low. Applications Information Oscillator Tank The on-chip oscillator requires a parallel-resonant tank circuit connected across TANK and TANK. Figure 2 shows an example of an oscillator tank circuit. Inductor L4 provides DC bias to the tank ports. Inductor L3, capacitor C26, and the series combination of capacitors C2, C3, and both halves of the varactor diode capacitance set the resonant frequency, as follows: 1 fr = 2π L3 CEFF ( )( CEFF = ) 1 1 1 2 C2 + C 3 + C D1 + C26 where CD1 is the capacitance of one varactor diode. Choose tank components according to your application needs, such as phase-noise requirements, tuning range, and VCO gain. High-Q inductors, such as aircore micro springs, yield low phase noise. Use a lowtolerance inductor (L3) for predictable oscillation frequency. Resistors R6 and R7 can be chosen from 0 to 20Ω to reduce the Q of parasitic resonance due to series package inductance (LT). Keep R6 and R7 as small as possible to minimize phase noise, yet large enough to ensure oscillator start-up in fundamental mode. Oscillator start-up will be most critical with high tuning bandwidth (low tank Q) and high temperature. 10 Capacitors C2 and C3 couple in the varactor. Light coupling of the varactor is a way to reduce the effects of high varactor tolerance and increase loaded Q. For a wider tuning range; use larger values for C2 and C3 or a varactor with a large capacitance ratio. Capacitor C26 is used to trim the tank oscillator frequency. Larger values for C26 will help negate the effect of stray PCB capacitance and parasitic inductor capacitance (L3). Choose a low tolerance capacitor for C26. For applications that require a wide tuning range and low phase noise, a series coupled resonant tank may be required, as shown in Figure 4. This tank will use the package inductance in series with inductors L1, L2, and capacitance of varactor D1 to set the net equivalent inductance which resonates in parallel with the internal oscillator capacitance. Inductors L1 and L2 may be implemented as microstrip inductors, saving component cost. Bias is provided to the tank port through chokes L3 and L5. R1 and R3 should be chosen large enough to de-Q the parasitic resonance due to L3 and L5, but small enough to minimize the voltage drop across them due to bias current. Values for R1 and R3 should be kept between 0Ω and 50Ω. Proper high-frequency bypassing (C1) should be used for the bias voltage to eliminate power-supply noise from entering the tank. VCC MAX2440 MAX2441 MAX2442 L4 100nH TANK R5 1kΩ C2 R7 1/2 D1 R8 47kΩ LT L3 C3 LT TANK VCO_CTRL C26 1/2 D1 R6 C1 47pF R4 1kΩ D1 = ALPHA SMV1299-004 SEE FIGURE 1 FOR R6, R7, C2, C3, C26, AND L3 COMPONENT VALUES. Figure 2. Oscillator Tank Schematic, Using the On-Chip VCO ______________________________________________________________________________________ Oscillator-Tank PC Board Layout VCC MAX2440 MAX2441 MAX2442 TANK CBLOCK 0.01µF 50Ω EXT LO VCC 50Ω Using an External Oscillator EXTERNAL LO LEVEL IS 0dBm FROM A 50Ω SOURCE. TANK If an external 50Ω LO signal source is available, it can be used as an input to the TANK or TANK pin in place of the on-chip oscillator (Figure 3). The oscillator signal is AC coupled into the TANK pin and should have a level of about 0dBm from a 50Ω source. For proper biasing of the oscillator input stage, TANK and TANK must be pulled up to the VCC supply via 50Ω resistors. If a differential LO source such as the MAX2620 is available, AC couple the inverting output into TANK. Figure 3. Using an External Local Oscillator MAX2440 MAX2441 MAX2442 LT TANK The parasitic PC board capacitance, as well as PCB trace inductance and package inductance, can affect oscillation frequency, so be careful in laying out the PC board for the oscillator tank. Keep the tank layout as symmetrical, tightly packed, and close to the device as possible to minimize LO feedthrough. When using a PC board with a ground plane, a cut-out in the ground plane (and any other planes) below the oscillator tank will reduce parasitic capacitance. L1 L3 R1 1/2 D1 L4 R2 Ci VCC VTUNE C2 C1 1/2 D1 LT L2 L5 R3 TANK Figure 4. Series Coupled Resonant Tank for Wide Tuning Range and Low Phase Noise Chip Information TRANSISTOR COUNT: 2802 ______________________________________________________________________________________ 11 MAX2440/MAX2441/MAX2442 MAX2440/MAX2441/MAX2442 900MHz Image-Reject Receivers Functional Diagram LNAGAIN 90° Σ RXIN RXOUT 0° DIV1 MOD CAP1 0° 90° PREOUT ÷1/64/65 BIAS RXON PREGND TANK PHASE SHIFTER TANK MAX2440 MAX2441 MAX2442 VCOON Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) 2 SSOP.EPS MAX2440/MAX2441/MAX2442 900MHz Image-Reject Receivers 1 INCHES E H MILLIMETERS DIM MIN MAX MIN MAX A 0.068 0.078 1.73 1.99 A1 0.002 0.008 0.05 0.21 B 0.010 0.015 0.25 0.38 C D 0.20 0.09 0.004 0.008 SEE VARIATIONS E 0.205 e 0.212 0.0256 BSC 5.20 MILLIMETERS INCHES D D D D D 5.38 MIN MAX MIN MAX 0.239 0.239 0.278 0.249 0.249 0.289 6.07 6.07 7.07 6.33 6.33 7.33 0.317 0.397 0.328 0.407 8.07 10.07 8.33 10.33 N 14L 16L 20L 24L 28L 0.65 BSC H 0.301 0.311 7.65 7.90 L 0.025 0∞ 0.037 8∞ 0.63 0∞ 0.95 8∞ N A C B e A1 L D NOTES: 1. D&E DO NOT INCLUDE MOLD FLASH. 2. MOLD FLASH OR PROTRUSIONS NOT TO EXCEED .15 MM (.006"). 3. CONTROLLING DIMENSION: MILLIMETERS. 4. MEETS JEDEC MO150. 5. LEADS TO BE COPLANAR WITHIN 0.10 MM. PROPRIETARY INFORMATION TITLE: PACKAGE OUTLINE, SSOP, 5.3 MM APPROVAL DOCUMENT CONTROL NO. 21-0056 REV. C 1 1 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 2000 Maxim Integrated Products © 2003 Printed USA is a registered trademark of Maxim Integrated Products.