19-1352; Rev 0; 4/98 KIT ATION EVALU E L B A AVAIL 900MHz Image-Reject Receivers Features ♦ Receive Mixer with 35dB Image Rejection For complete transceiver devices, refer to the MAX2420/ MAX2421/MAX2422/MAX2460/MAX2463 and MAX2424/ MAX2426 data sheets. ___________________Pin Configuration ________________________Applications Cordless Phones Spread-Spectrum Communications Wireless Telemetry Two-Way Paging ♦ Adjustable-Gain LNA ♦ Up to +2dBm Combined Receiver Input IP3 ♦ 4dB Combined Receiver Noise Figure ♦ Low Current Consumption: 23mA Receive 9.5mA Oscillator ♦ 0.5µA Shutdown Mode ♦ Operates from Single +2.7V to +4.8V Supply _______________Ordering Information TEMP. RANGE PIN-PACKAGE MAX2440EAI -40°C to +85°C 28 SSOP MAX2441EAI MAX2442EAI -40°C to +85°C -40°C to +85°C 28 SSOP 28 SSOP PART Functional Diagram appears at end of data sheet. TOP VIEW VCC 1 28 GND CAP1 2 27 GND RXOUT 3 26 GND GND 4 RXIN 5 Wireless Networks VCC 6 GND 7 ______________________Selector Guide PART IF FREQ (MHz) INJECTION TYPE LO FREQ (MHz) 25 TANK MAX2440 MAX2441 MAX2442 24 TANK 23 VCC 22 VCC GND 8 21 PREOUT GND 9 20 PREGND LNAGAIN 10 19 MOD VCC 11 18 DIV1 MAX2440 10.7 High side fRF + 10.7 MAX2441 46 High side fRF + 46 GND 12 17 VCOON fRF + 70 GND 13 16 RXON GND 14 15 GND MAX2442 70 High side SSOP ________________________________________________________________ Maxim Integrated Products 1 For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800. For small orders, phone 408-737-7600 ext. 3468. MAX2440/MAX2441/MAX2442 General Description The MAX2440/MAX2441/MAX2442 highly integrated front-end receiver ICs provide the lowest cost solution for cordless phones and ISM-band radios operating in the 900MHz band. All devices incorporate receive imagereject mixers to reduce filter cost. They operate with a +2.7V to +4.8V power supply, allowing direct connection to a 3-cell battery stack. The signal path incorporates an adjustable-gain LNA and an image-reject downconverter with 35dB image suppression. These features yield excellent combined downconverter noise figure (4dB) and high linearity with an input third-order intercept point (IP3) of up to +2dBm. All devices include an on-chip local oscillator (LO), requiring only an external varactor-tuned LC tank for operation. The integrated divide-by-64/65 dual-modulus prescaler can also be set to a direct mode, in which it acts as an LO buffer amplifier. Three separate powerdown inputs can be used for system power management, including a 0.5µA shutdown mode. These parts are compatible with commonly used modulation schemes such as FSK, BPSK, and QPSK, as well as frequency hopping and direct sequence spread-spectrum systems. All devices come in a 28-pin SSOP package. Evaluation kits are available for the MAX2420/ MAX2421/MAX2422. The MAX2420/MAX2421/MAX2422 are transceivers whose receive sections and pinout are identical to the MAX2440/MAX2441/MAX2442. MAX2440/MAX2441/MAX2442 900MHz Image-Reject Receivers ABSOLUTE MAXIMUM RATINGS VCC to GND ...........................................................-0.3V to +5.5V Voltage on LNAGAIN, RXON, VCOON, DIV1, MOD ...............................................-0.3V to (VCC + 0.3V) RXIN Input Power..............................................................10dBm TANK, TANK Input Power ...................................................2dBm Continuous Power Dissipation (TA = +70°C) SSOP (derate 9.50mW/°C above +70°C) ......................762mW Operating Temperature Range MAX244_EAI .....................................................-40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +165°C Lead Temperature (soldering, 10sec) .............................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC ELECTRICAL CHARACTERISTICS (VCC = +2.7V to +4.8V, no RF signals applied, LNAGAIN = unconnected, VVCOON = 2.4V, VRXON = VMOD = VDIV1 = 0.45V, PREGND = GND, TA = TMIN to TMAX. Typical values are at TA = +25°C, VCC = +3.3V, unless otherwise noted.) CONDITIONS PARAMETER Supply-Voltage Range MIN TYP 2.7 MAX UNITS 4.8 V Oscillator Supply Current PREGND = unconnected 9.5 14 mA Prescaler Supply Current (divide-by-64/65 mode) (Note 1) 4.2 6 mA Prescaler Supply Current (buffer mode) VDIV1 = 2.4V (Note 2) 5.4 8.5 mA Receive Supply Current VRXON = 2.4V, PREGND = unconnected (Note 3) 23 36 mA Shutdown Supply Current VCOON = RXON = MOD = DIV1 = GND Digital Input Voltage High RXON, DIV1, VCOON, MOD Digital Input Voltage Low RXON, DIV1, VCOON, MOD Digital Input Current Voltage on any one digital input = VCC or GND TA = +25°C 0.5 TA = TMIN to TMAX 10 2.4 µA V ±1 0.45 V ±10 µA Note 1: Calculated by measuring the combined oscillator and prescaler supply current and subtracting the oscillator supply current. Note 2: Calculated by measuring the combined oscillator and LO buffer supply current and subtracting the oscillator supply current. Note 3: Calculated by measuring the combined receive and oscillator supply current and subtracting the oscillator supply current. With LNAGAIN = GND, the supply current drops by 4.5mA. 2 _______________________________________________________________________________________ 900MHz Image-Reject Receivers (MAX242X/MAX246X EV kit, VCC = +3.3V; fLO = 925.7MHz (MAX2440), fLO = 961MHz (MAX2441), fLO = 985MHz (MAX2442), fRXIN = 915MHz; PRXIN = -35dBm; VLNAGAIN = 2V; VVCOON = VRXON = 2.4V; RXON = MOD = DIV1 = PREGND = GND; TA = +25°C; unless otherwise noted.) PARAMETER CONDITIONS MIN TYP MAX UNITS 1000 MHz RECEIVER Input Frequency Range (Notes 4, 5) IF Frequency Range (Notes 4, 5) 800 MAX2440 8.5 10.7 12.5 MAX2441 36 46 55 MAX2442 55 70 85 Image Frequency Rejection Conversion Power Gain (Note 6) Noise Figure DIV1 = VCC (Notes 4, 6) Input Third-Order Intercept (Notes 4, 7) Input 1dB Compression 26 35 LNAGAIN = VCC, TA = +25°C MAX2440/MAX2441 20 22 24.5 MAX2442 19 21 23.5 LNAGAIN = VCC, TA = TMIN to TMAX (Note 4) MAX2440/MAX2441 25 18 24 dB MAX2442 MAX2442 12 LNAGAIN = GND -16 LNAGAIN = VCC 4 VLNAGAIN = 1V 12 VLNAGAIN = 1V dB 19.5 VLNAGAIN = 1V LNAGAIN = VCC MHz -19 -17 -8 LNAGAIN = VCC -26 VLNAGAIN = 1V -18 5 dB dBm dBm LO to RXIN Leakage Receiver on or off -60 dBm Receiver Turn-On Time (Note 8) 500 ns _______________________________________________________________________________________ 3 MAX2440/MAX2441/MAX2442 AC ELECTRICAL CHARACTERISTICS MAX2440/MAX2441/MAX2442 900MHz Image-Reject Receivers AC ELECTRICAL CHARACTERISTICS (continued) (MAX242X/MAX246X EV kit, VCC = +3.3V; fLO = 925.7MHz (MAX2440), fLO = 961MHz (MAX2441), fLO = 985MHz (MAX2442), fRXIN = 915MHz; PRXIN = -35dBm; VLNAGAIN = 2V; VVCOON = VRXON = 2.4V; RXON = MOD = DIV1 = PREGND = GND; TA = +25°C; unless otherwise noted.) PARAMETER CONDITIONS MIN TYP MAX UNITS 1100 MHz OSCILLATOR AND PRESCALER Oscillator Frequency Range (Notes 4, 9) 690 Oscillator Phase Noise 10kHz offset (Note 10) 82 Standby to RX 8 Oscillator Pulling Standby mode with PRXIN = -45dBm to PRXIN = 0dBm (Note 11) 70 Prescaler Output Level ZL = 100kΩ | | 10pF 500 Oscillator Buffer Output Level DIV1 = 2.4V, ZL = 50Ω (Note 4) Required Modulus Setup Time Divide-by-64/65 mode (Notes 4, 12) 10 ns Required Modulus Hold Time Divide-by-64/65 mode (Notes 4, 12) 0 ns TA = +25°C -11 TA = TMIN to TMAX -12 -8 dBc/Hz kHz mVp-p dBm Note 4: Guaranteed by design and characterization. Note 5: Image rejection typically falls to 30dBc at the frequency extremes. Note 6: Refer to the Typical Operating Characteristics for plots showing receiver gain versus LNAGAIN voltage, input IP3 versus LNAGAIN voltage, and noise figure versus LNAGAIN voltage. Note 7: Two tones at PRXIN = -45dBm each, f1 = 915.0MHz and f2 = 915.2MHz. Note 8: Time delay from RXON = 0.45V to RXON = 2.4V transition to the time the output envelope reaches 90% of its final value. Note 9: Refers to useable operating range. Tuning range of any given tank circuit design is typically much narrower (refer to Figure 1). Note 10: Using tank components shown in Figure 1. Note 11: This approximates a typical application in which a transmitter is followed by an external PA and a T/R switch with finite isolation. Note 12: Relative to the rising edge of PREOUT. 4 _______________________________________________________________________________________ 900MHz Image-Reject Receivers SHUTDOWN SUPPLY CURRENT vs. TEMPERATURE 3.5 VCC = 4.8V VCC = 3.3V 32 VCC = 2.7V 30 VCC = 3.3V 2.0 VCC = 4.8V 1.5 28 0.5 24 -20 0 20 40 60 80 100 MAX GAIN -5 AVOID THIS REGION -20 -40 -20 0 20 40 60 80 0 100 0.5 1.0 1.5 2.0 LNAGAIN VOLTAGE (V) RECEIVER INPUT IP3 vs. VLNAGAIN RECEIVER NOISE FIGURE vs. LNAGAIN MAX2440 RECEIVER GAIN vs. TEMPERATURE LNA ADJUSTABLE MAX PARTIALLY GAIN GAIN BIASED 35 LNA OFF -10 LNA ADJUSTABLE MAX PARTIALLY GAIN GAIN BIASED 25 20 15 10 AVOID THIS REGION 5 0 0.5 1.0 1.5 0 2.0 0.5 VCC = 2.7V 24 VCC = 4.8V 22 VCC = 3.3V 20 18 DIV1 = VCC 0 -20 LNAGAIN = VCC 26 RECEIVER GAIN (dB) NOISE FIGURE (dB) 30 AVOID THIS REGION -5 40 MAX2440/1/2-04 LNA OFF MAX2440/1/2-05 TEMPERATURE (°C) -15 1.0 1.5 2.0 -40 -20 0 20 40 60 80 100 LNAGAIN VOLTAGE (V) LNAGAIN VOLTAGE (V) TEMPERATURE (°C) RECEIVER NOISE FIGURE vs. TEMPERATURE AND SUPPLY VOLTAGE RECEIVER INPUT IP3 vs. TEMPERATURE MAX2440 RXOUT 1dB COMPRESSION POINT vs. TEMPERATURE -8 VLNAGAIN = 1V -10 VCC = 4.8V IIP3 (dBm) 4.5 VCC = 3.3V 4.0 VCC = 2.7V -12 -14 -16 VLNAGAIN = 2V 3.5 -18 3.0 -20 0 20 40 60 TEMPERATURE (°C) 80 100 -4 VCC = 4.8V -5 VCC = 2.7V -6 VCC = 3.3V -7 -8 -9 -20 -40 MAX2440/1/2-9 5.0 -3 1dB COMPRESSION POINT (dBm) LNAGAIN = VCC DIV1 = VCC MAX2440/1/2-08 -6 MAX2440/1/2-07 5.5 NOISE FIGURE (dB) ADJUSTABLE GAIN 0 TEMPERATURE (°C) 5 0 5 -15 VCC = 2.7V 0 -40 10 -10 1.0 PREGND = UNCONNECTED INCLUDES OSCILLATOR CURRENT 26 IIP3 (dBm) 2.5 15 MAX2440/1/2-06 34 3.0 ICC (µA) 36 LNA PARTIALLY BIASED LNA OFF 20 RECEIVER GAIN (dB) 38 VCOON = GND RXON = GND 4.0 RECEIVER GAIN vs. LNAGAIN 25 MAX2440/1/2-02 40 ICC (mA) 4.5 MAX2440/1/2-01 42 MAX2440/1/2-03 RECEIVER SUPPLY CURRENT vs. TEMPERATURE -40 -20 0 20 40 60 TEMPERATURE (°C) 80 100 -40 -20 0 20 40 60 80 TEMPERATURE (°C) _______________________________________________________________________________________ 5 MAX2440/MAX2441/MAX2442 Typical Operating Characteristics (MAX242X/MAX246X EV kit, VCC = +3.3V; fLO = 925.7MHz (MAX2440), fLO = 961MHz (MAX2441), fLO = 985MHz (MAX2442), fRXIN = 915MHz; PRXIN = -35dBm; VLNAGAIN = 2V; VVCOON = 2.4V; RXON = VCC; MOD = DIV1 = PREGND = GND; TA = +25°C; unless otherwise noted.) Typical Operating Characteristics (continued) (MAX242X/MAX246X EV kit, VCC = +3.3V; fLO = 925.7MHz (MAX2440), fLO = 961MHz (MAX2441), fLO = 985MHz (MAX2442), fRXIN = 915MHz; PRXIN = -35dBm; VLNAGAIN = 2V; VVCOON = 2.4V; RXON = VCC; MOD = DIV1 = PREGND = GND; TA = +25°C; unless otherwise noted.) RECEIVER IMAGE REJECTION vs. RF FREQUENCY RECEIVER IMAGE REJECTION vs. IF FREQUENCY RXON = VCC 50 MAX2441 35 IMAGE REJECTION (dB) 40 IMAGE REJECTION (dB) MAX2440/1/2-11 40 MAX2440/1/2-10 60 30 20 10 MAX2442 25 20 15 10 -10 5 -20 MAX2440 30 0 0 0 400 800 1200 1600 2000 1 10 RF FREQUENCY (MHz) -100 -80 IMAGINARY 30 25 -60 REAL 20 -40 15 10 -20 IMAGINARY IMPEDANCE (Ω) 40 MAX2440/1/2-13 550 45 35 500 450 400 350 300 250 200 150 LOAD IS PLOTTED RESISTANCE IN PARALLEL WITH A 10pF OSCILLOSCOPE PROBE (÷ 64/65 MODE) 100 50 5 0 -0 600 800 1000 1200 1000 PRESCALER OUTPUT LEVEL vs. LOAD RESISTANCE PRESCALER OUTPUT LEVEL (mVp-p) MAX2440/1/2-12 50 100 IF FREQUENCY (MHz) RXIN INPUT IMPEDANCE vs. FREQUENCY REAL IMPEDANCE (Ω) MAX2440/MAX2441/MAX2442 900MHz Image-Reject Receivers 1400 0 1 100 1k 10k LOAD RESISTANCE (Ω) FREQUENCY (MHz) 6 _______________________________________________________________________________________ 100k 900MHz Image-Reject Receivers PIN NAME 1 VCC 2 CAP1 FUNCTION Supply-Voltage Input for Master Bias Cell. Bypass with a 47pF low-inductance capacitor and 0.1µF to GND (pin 28 recommended). Receive Bias Compensation Pin. Bypass with a 47pF low-inductance capacitor and 0.01µF to GND. Do not make any other connections to this pin. 3 RXOUT 4, 9, 12–15 Single-Ended, 330Ω IF Output. AC couple to this pin. GND Ground Connection 5 RXIN Receiver RF Input, single-ended. The input match shown in Figure 1 maintains an input VSWR of better than 2:1 from 902MHz to 928MHz. 6 VCC Supply Voltage Input for Receive Low-Noise Amplifier. Bypass with a 47pF low-inductance capacitor to GND (pin 7 recommended). 7 GND Ground Connection for Receive Low-Noise Amplifier. Connect directly to ground plane using multiple vias. 8 GND Ground Connection for Signal-Path Blocks, except LNA. Connect directly to ground plane. 10 LNAGAIN Low-Noise Amplifier Gain-Control Input. Drive this pin high for maximum gain. When LNAGAIN is pulled low, the LNA is capacitively bypassed and the supply current is reduced by 4.5mA. This pin can also be driven with an analog voltage to adjust the LNA gain in intermediate states. Refer to the Receiver Gain vs. LNAGAIN Voltage graph in the Typical Operating Characteristics, as well as Table 1. 11 VCC Supply Voltage Input for Signal-Path Blocks, except LNA. Bypass with a 47pF low-inductance capacitor and 0.01µF to GND (pin 8 recommended). 16 RXON Driving RXON with a logic high enables the LNA, receive mixer, and IF output buffer. VCOON must also be high. 17 VCOON 18 DIV1 Driving DIV1 with a logic high disables the divide-by-64/65 prescaler and connects the PREOUT pin directly to an oscillator buffer amplifier, which outputs -8dBm into a 50Ω load. Tie DIV1 low for divide-by64/65 operation. Pull this pin low when in shutdown to minimize off current. 19 MOD Modulus Control for the Divide-by-64/65 Prescaler: high = divide-by-64, low = divide-by-65. Note that the DIV1 pin must be at logic low when using the prescaler mode. 20 PREGND Ground connection for the Prescaler. Tie PREGND to ground for normal operation. Leave floating to disable the prescaler and the output buffer. Tie MOD and DIV1 to ground and leave PREOUT floating when disabling the prescaler. 21 PREOUT Prescaler/Oscillator Buffer Output. In divide-by-64/65 mode (DIV1 = low), the output level is 500mVp-p into a high-impedance load. In divide-by-1 mode (DIV1 = high), this output delivers -8dBm into a 50Ω load. AC couple to this pin. 22 VCC Supply-Voltage Input for Prescaler. Bypass with a 47pF low-inductance capacitor and 0.01µF to GND (pin 20 recommended). 23 VCC Supply-Voltage Input for VCO and Phase Shifters. Bypass with a 47pF low-inductance capacitor to GND (pin 26 recommended). 24 TANK Differential Oscillator Tank Port. See Applications Information for information on tank circuits or on using an external oscillator. 25 TANK Differential Oscillator Tank Port. See Applications Information for information on tank circuits or on using an external oscillator. Driving VCOON with a logic high turns on the VCO, phase shifters, VCO buffers, and prescaler. The prescaler can be selectively disabled by floating the PREGND pin. _______________________________________________________________________________________ 7 MAX2440/MAX2441/MAX2442 Pin Description 900MHz Image-Reject Receivers MAX2440/MAX2441/MAX2442 Pin Description (continued) PIN NAME FUNCTION 26 GND Ground Connection for VCO and Phase Shifters 27 GND Ground (substrate) 28 GND Ground Connection for Master Bias Cell VCC VCC 1 0.1µF 2 GND PREGND CAP1 VCC GND 5 RXIN 47pF 12nH MAX2440 MAX2441 MAX2442 RXOUT 9 6 7 0.01µF 47pF 14 VARACTOR: ALPHA SMV1299-004 OR EQUIVALENT 4 10 47pF GND LNAGAIN 2.0 1.5 2.0 2.7 MAX2442 6.8 1.5 2.0 100nH 1k 10Ω TANK C2 47k 24 C26 10Ω TANK GND GND 6.8 VCC GND GND 6.8 RECEIVE IF OUTPUT (330Ω) L3 8 MAX2440 MAX2441 12 25 13 LNAGAIN 3 VCC VCC C26 C2, C3 (pF) (pF) L3 (nH) SEE APPLICATIONS INFORMATION SECTION L3: COILCRAFT 0805HS-060TMBC 26 27 GND VCC 11 PART 0.01µF GND 47pF 23 47pF 47pF 8.2nH 0.01µF 20 VCC GND RECEIVE RF INPUT VCO TANK COMPONENTS FOR 915MHz TYPICAL RF 47pF 47pF 28 0.1µF VCC VCC 22 1000pF PREOUT MOD DIV1 VCOON RXON GND 21 19 18 17 16 15 C3 TO PLL MOD DIV1 VCOON RXON Figure 1. Typical Operating Circuit 8 _______________________________________________________________________________________ 1k VCO ADJUST 47pF 900MHz Image-Reject Receivers The following sections describe each of the blocks shown in the Functional Diagram. Receiver The MAX2440/MAX2441/MAX2442’s receive path consists of a 900MHz low-noise amplifier, an image-reject mixer, and an IF buffer amplifier. The LNA’s gain and biasing are adjustable via the LNAGAIN pin. Proper operation of this pin can provide optimum performance over a wide range of signal levels. The LNA can be placed in four modes by applying a DC voltage on the LNAGAIN pin. See Table 1, as well as the relevant Typical Operating Characteristics plots. At low LNAGAIN voltages, the LNA is shut off, and the input signal capacitively couples directly into the mixer to provide maximum linearity for large-signal operation (receiver close to transmitter). As the LNAGAIN voltage is raised, the LNA begins to turn on. Between 0.5V and 1V at LNAGAIN, the LNA is partially biased and behaves like a Class C amplifier. Avoid this operating mode for applications where linearity is a concern. As the LNAGAIN voltage reaches 1V, the LNA is fully biased into Class A mode, and the gain is monotonically adjustable at LNAGAIN voltages above 1V. See the Receiver Gain, Receiver IP3, and Receiver Noise Figure vs. LNAGAIN plots in the Typical Operating Characteristics for more information. The downconverter is implemented using an imagereject mixer consisting of an input buffer with two outputs, each of which is fed to a double-balanced mixer. The local-oscillator (LO) port of each mixer is driven from a quadrature LO. The LO is generated from an onchip oscillator and an external tank circuit. Its signal is buffered and split into phase shifters, which provide 90° of phase shift across their outputs. This pair of LO signals is fed to the mixers. The mixers’ outputs are then passed through a second pair of phase shifters, which provide a 90° phase shift across their outputs. The Table 1. LNA Modes LNAGAIN VOLTAGE (V) 0 < V ≤ 0.5 MODE LNA capacitively bypassed, minimum gain, maximum IP3 0.5 < V < 1.0 LNA partially biased. Avoid this mode— the LNA operates in a Class C manner 1.0 < V ≤ 1.5 LNA gain is monotonically adjustable 1.5 < V ≤ VCC LNA at maximum gain (remains monotonic) resulting mixer outputs are then summed together. The final phase relationship is such that the desired signal is reinforced and the image signal is canceled. The downconverter mixer output appears on the RXOUT pin, a single-ended 330Ωoutput. Phase Shifters MAX2440/MAX2441/MAX2442 devices use passive networks to provide quadrature phase shifting for the receive IF and LO signals. Because these networks are frequency selective, proper part selection is important. Image rejection degrades as the IF and RF move away from the designed optimum frequencies. Refer to the Selector Guide on the front page of this data sheet. Local Oscillator (LO) The on-chip LO is formed by an emitter-coupled differential pair. An external LC resonant tank sets the oscillation frequency. A varactor diode is typically used to create a voltage-controlled oscillator (VCO). See the Applications Information section and Figure 2 for an example VCO tank circuit. The LO may be overdriven in applications where an external signal is available. The external LO signal should be about 0dBm from 50Ω, and should be AC coupled into either the TANK or TANK pin. Both TANK and TANK require pull-up resistors to V CC. See the Applications Information section and Figure 3 for details. The local oscillator resists LO pulling caused by changes in load impedance that occur as the part is switched from standby mode. The amount of LO pulling will be affected if there is power at the RXIN port due to imperfect isolation in an external transmit/receive (T/R) switch. Prescaler The on-chip prescaler can be used in two different modes: as a dual-modulus divide-by-64/65, or as oscillator buffer amplifier. The DIV1 pin controls this function. When DIV1 is low, the prescaler is in dual-modulus divide-by-64/65 mode; when it is high, the prescaler is disabled and the oscillator buffer amplifier is enabled. The buffer typically outputs -8dBm into a 50Ω load. To minimize shutdown supply current, pull the DIV1 pin low when in shutdown mode. In divide-by-64/65 mode, the division ratio is controlled by the MOD pin. When MOD is high, the prescaler is in divide-by-64 mode; when it is low, it divides the LO frequency by 65. The DIV1 pin must be at a logic low in this mode. _______________________________________________________________________________________ 9 MAX2440/MAX2441/MAX2442 Detailed Description MAX2440/MAX2441/MAX2442 900MHz Image-Reject Receivers To disable the prescaler entirely, leave PREGND and PREOUT floating. Also tie the MOD and DIV1 pins to GND. Disabling the prescaler does not affect operation of the VCO stage. Power Management MAX2440/MAX2441/MAX2442 supports three different power-management features to conserve battery life. The VCO section has its own control pin (VCOON), which also serves as a master bias pin. When VCOON is high, the LO, quadrature LO phase shifters, and prescaler or LO buffer are all enabled. The VCO can be powered up prior to receiving to allow it to stabilize. With VCOON high, bringing RXON high enables the receive path, which consists of the LNA, image-reject mixers, and IF output buffer. When this pin is low, the receive path is inactive. To disable all chip functions and reduce the supply current to typically less than 0.5µA, pull VCOON, DIV1, MOD, and RXON low. Applications Information Oscillator-Tank PC Board Layout The parasitic PC board capacitance, as well as PCB trace inductance and package inductance, can affect oscillation frequency, so be careful in laying out the PC board for the oscillator tank. Keep the tank layout as symmetrical, tightly packed, and close to the device as possible to minimize LO feedthrough. When using a PC board with a ground plane, a cut-out in the ground plane (and any other planes) below the oscillator tank will reduce parasitic capacitance. Using an External Oscillator If an external 50Ω LO signal source is available, it can be used as an input to the TANK or TANK pin in place of the on-chip oscillator (Figure 3). The oscillator signal is AC coupled into the TANK pin and should have a level of about 0dBm from a 50Ω source. For proper biasing of the oscillator input stage, TANK and TANK must be pulled up to the VCC supply via 50Ω resistors. If a differential LO source such as the MAX2620 is available, AC couple the inverting output into TANK. Oscillator Tank The on-chip oscillator requires a parallel-resonant tank circuit connected across TANK and TANK. Figure 2 shows an example of an oscillator tank circuit. It typically oscillates between 902MHz + IF and 928MHz + IF with a control voltage between 0 and 3.3V. Inductor L4 provides DC bias to the tank ports. L3 and the series combination of capacitors C2, C3, and both halves of the varactor diode capacitances set the resonant frequency as follows: 1 fr = 2π L3 CEFF ( )( CEFF = MAX2440 MAX2441 MAX2442 TANK 1 1 1 2 C2 + C 3 + C D1 L4 100nH R7 10Ω C2 R5 1k 1/2 D1 R8 47k ) L3 C26 C3 + C26 where CD1 is the capacitance of one varactor diode. Choose the tank components according to your application needs, such as phase-noise requirements, tuning range, and VCO gain. Higher-Q inductors yield lower phase noise but are more likely to produce a second-harmonic oscillation mode. Air-core spring inductors provide high Q, but radiate more than chip inductors. It may be necessary to shield the tank circuit for optimal isolation of the LO to other circuitry. R6 and R7 are 5Ω to 10Ω resistors that reduce the Q of parasitic resonances due to package inductance. 10 VCC TANK R6 10Ω 1/2 D1 VCO_CTRL C1 47pF R4 1k D1 = ALPHA SMV1299-004 SEE FIGURE 1 FOR C2, C3, C26, AND L3 COMPONENT VALUES. Figure 2. Oscillator Tank Schematic, Using the On-Chip VCO ______________________________________________________________________________________ Chip Information VCC MAX2440 MAX2441 MAX2442 TANK TRANSISTOR COUNT: 2802 CBLOCK 0.01µF 50Ω EXT LO VCC 50Ω TANK EXTERNAL LO LEVEL IS 0dBm FROM A 50Ω SOURCE. Figure 3. Using an External Local Oscillator Functional Diagram LNAGAIN 90° Σ RXIN RXOUT 0° DIV1 MOD CAP1 RXON 0° BIAS PHASE SHIFTER MAX2440 MAX2441 MAX2442 90° ÷1/64/65 PREOUT PREGND TANK TANK VCOON ______________________________________________________________________________________ 11 MAX2440/MAX2441/MAX2442 MAX2440/MAX2441/MAX2442 900MHz Image-Reject Receivers 900MHz Image-Reject Receivers SSOP.EPS MAX2440/MAX2441/MAX2442 Package Information Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 1998 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.