MAXIM MAX2531EGI

MAX2531EGI
Rev. A
RELIABILITY REPORT
FOR
MAX2531EGI
PLASTIC ENCAPSULATED DEVICES
April 3, 2003
MAXIM INTEGRATED PRODUCTS
120 SAN GABRIEL DR.
SUNNYVALE, CA 94086
Written by
Reviewed by
Jim Pedicord
Quality Assurance
Reliability Lab Manager
Bryan J. Preeshl
Quality Assurance
Executive Director
Conclusion
The MAX2531 successfully meets the quality and reliability standards required of all Maxim products. In addition,
Maxim’s continuous reliability monitoring program ensures that all outgoing product will continue to meet Maxim’s quality
and reliability standards.
Table of Contents
I. ........Device Description
II. ........Manufacturing Information
III. .......Packaging Information
IV. .......Die Information
V. ........Quality Assurance Information
VI. .......Reliability Evaluation
......Attachments
I. Device Description
A. General
The MAX2531 multiband LNA/Mixer IC is optimized for CDMA, GSM, and TDMA applications in cellular
band. The MAX2531 IC features a GPS LNA/mixer signal path for E911 and Traveler Assistance applications. The
cellular signal can be routed to either IF port. For example, one IF port can be connected to an IF filter with 30kHz
band-width, while the other port can drive an IF filter with a wider bandwidth. The GPS band has its own IF port.
To optimize dynamic range at minimum current, the MAX2531 implements multiple LNA and mixer states,
including high gain/high linearity, high gain/low linearity, mid gain, low gain, and ultra low gain. In high-gain/highlinearity mode, the high-intercept LNA minimizes desensitization in the presence of a large interfering signal. For the
other gain states, the LNA current is reduced to improve standby time. Each band is implemented with a separate
mixer to optimize performance for the specific band, and each mixer provides multiple linearity modes to optimize
linearity and current consumption. The ultra-low gain mode operates with very little current, which results in
significant power savings because the handset typically spends most of its time in this mode.
B. Absolute Maximum Ratings
Item
VCC to GND
Digital Input Voltage to Gnd
LNA Inout (Low-Gain Mode) Level
LO Input Level
Digital Input Current
Junction Temperature
Operating Temperature Range
Storage Temp.
Lead Temp. (soldering 10 sec.)
Continuous Power Dissipation (TA = +70°C)
28-Pin QFN
Derates above +70°C
28-Pin QFN
Rating
-0.3V to +4.3V
-0.3V to (VCC + 0.3V)
15dBm
5dBM
10mA
+150°C
-40°C to +85°C
-65°C to +150°C
+300°C
1.6W
21mW/°C
II. Manufacturing Information
A. Description/Function:
Quadruple-Mode PCS/Cellular/GPS LNA/Mixers
B. Process:
MB20 Bi-CMOS Process
C. Number of Device Transistors:
2538
D. Fabrication Location:
Oregon, USA
E. Assembly Location:
Korea
F. Date of Initial Production:
April, 2002
III. Packaging Information
A. Package Type:
28-Pin QFN
B. Lead Frame:
Copper
C. Lead Finish:
Solder Plate
D. Die Attach:
Silver-Filled Epoxy
E. Bondwire:
Gold (1.3 mil dia.)
F. Mold Material:
Epoxy with silica filler
G. Assembly Diagram:
# 05-9000-0247
H. Flammability Rating:
Class UL94-V0
I. Classification of Moisture Sensitivity
per JEDEC standard JESD22-A112:
Level 1
IV. Die Information
A. Dimensions:
89 x 87 mils
B. Passivation:
Si3N4 (Silicon nitride)
C. Interconnect:
Au
D. Backside Metallization:
None
E. Minimum Metal Width:
1.2 microns (as drawn) Metal 1, 2 & 3 5.6 microns (as drawn) Metal 4
F. Minimum Metal Spacing:
1.6 microns (as drawn) Metal 1, 2 & 3, 4.2 microns (as drawn) Metal 4
G. Bondpad Dimensions:
3.4 mil. Octagonal
H. Isolation Dielectric:
SiO2
I. Die Separation Method:
Wafer Saw
V. Quality Assurance Information
A. Quality Assurance Contacts: Jim Pedicord
(Reliability Lab Manager)
Bryan Preeshl
(Executive Director of QA)
Kenneth Huening (Vice President)
B. Outgoing Inspection Level:
0.1% for all electrical parameters guaranteed by the Datasheet.
0.1% For all Visual Defects.
C. Observed Outgoing Defect Rate: < 50 ppm
D. Sampling Plan: Mil-Std-105D
VI. Reliability Evaluation
A. Accelerated Life Test
The results of the 150°C biased (static) life test are shown in Table 1. Using these results, the Failure
Rate (λ) is calculated as follows:
λ=
1
=
MTTF
1.83
(Chi square value for MTTF upper limit)
192 x 9823 x 90 x 2
Temperature Acceleration factor assuming an activation energy of 0.8eV
λ = 5.39 x 10-9
λ = 5.39 F.I.T. (60% confidence level @ 25°C)
This low failure rate represents data collected from Maxim’s reliability qualification and monitor programs.
Maxim also performs weekly Burn-In on samples from production to assure reliability of its processes. The
reliability required for lots which receive a burn-in qualification is 59 F.I.T. at a 60% confidence level, which equates
to 3 failures in an 80 piece sample. Maxim performs failure analysis on rejects from lots exceeding this level. The
attached Burn-In Schematic #06-7030 shows the static circuit used for this test. Maxim also performs 1000 hour
life test monitors quarterly for each process. This data is published in the Product Reliability Report (RR-1M).
B. Moisture Resistance Tests
Maxim evaluates pressure pot stress from every assembly process during qualification of each new design.
Pressure Pot testing must pass a 20% LTPD for acceptance. Additionally, industry standard 85°C/85%RH or
HAST tests are performed quarterly per device/package family.
C. E.S.D. and Latch-Up Testing
The WC19-3 die type has been found to have all pins able to withstand a transient pulse of ±800V, per MilStd-883 Method 3015 (reference attached ESD Test Circuit).
Latch-Up testing has shown that this device withstands a current of ±250mA.
Table 1
Reliability Evaluation Test Results
MAX2531EGI
TEST ITEM
TEST CONDITION
Static Life Test (Note 1)
Ta = 150°C
Biased
Time = 192 hrs.
FAILURE
IDENTIFICATION
SAMPLE
SIZE
NUMBER OF
FAILURES
DC Parameters
& functionality
90
0
Moisture Testing (Note 2)
Pressure Pot
Ta = 121°C
P = 15 psi.
RH= 100%
Time = 168hrs.
DC Parameters
& functionality
77
0
85/85
Ta = 85°C
RH = 85%
Biased
Time = 1000hrs.
DC Parameters
& functionality
77
0
DC Parameters
77
Mechanical Stress (Note 2)
Temperature
Cycle
-65°C/150°C
1000 Cycles
Method 1010
Note 1: Life Test Data may represent plastic DIP qualification packages.
Note 2: Generic package/process data.
0
Attachment #1
TABLE II. Pin combination to be tested. 1/ 2/
Terminal A
(Each pin individually
connected to terminal A
with the other floating)
Terminal B
(The common combination
of all like-named pins
connected to terminal B)
1.
All pins except VPS1 3/
All VPS1 pins
2.
All input and output pins
All other input-output pins
1/ Table II is restated in narrative form in 3.4 below.
2/ No connects are not to be tested.
3/ Repeat pin combination I for each named Power supply and for ground
(e.g., where VPS1 is VDD, VCC, VSS, VBB, GND, +VS, -VS, VREF, etc).
3.4
Pin combinations to be tested.
a.
Each pin individually connected to terminal A with respect to the device ground pin(s) connected
to terminal B. All pins except the one being tested and the ground pin(s) shall be open.
b.
Each pin individually connected to terminal A with respect to each different set of a combination
of all named power supply pins (e.g., VSS1, or VSS2 or VSS3 or VCC1 , or VCC2 ) connected to
terminal B. All pins except the one being tested and the power supply pin or set of pins shall be
open.
c.
Each input and each output individually connected to terminal A with respect to a combination of
all the other input and output pins connected to terminal B. All pins except the input or output pin
being tested and the combination of all the other input and output pins shall be open.
TERMINAL C
R1
R2
S1
TERMINAL A
REGULATED
HIGH VOLTAGE
SUPPLY
S2
C1
DUT
SOCKET
SHORT
TERMINAL B
Mil Std 883D
Method 3015.7
Notice 8
TERMINAL D
R = 1.5kΩ
C = 100pf
CURRENT
PROBE
(NOTE 6)
28
27
26
100 pF
ONCE PER BOARD
50 OHM
50 OHM
50 OHM
100 pF
ONCE PER SOCKET
25
24
23
22
50 OHM
2
20
3
19
4
18
5
17
6
16
100 pF
100 pF
50 OHM
7
15
28 - QFN
9
10
11
12
100 pF
13
14
50 OHM
50 OHM
8
50 OHM
50 OHM
21
21 K
50 OHM
1
100 pF
50 OHM
50 OHM
27 OHM
3.6V
100 nF
DEVICES: MAX 2530/2531/2538/2539/2351/2358
DRAWN BY: HAK TAN
MAX. EXPECTED CURRENT = 40mA
NOTES:
DOCUMENT I.D. 06-7030
REVISION B
MAXIM TITLE: BI Circuit (MAX2530/2531/2538/2539/2351/2358) WC19Z
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