PD - 9.1404A
IRFI5210
PRELIMINARY
HEXFET® Power MOSFET
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Advanced Process Technology
Isolated Package
High Voltage Isolation = 2.5KVRMS
Sink to Lead Creepage Dist. = 4.8mm
P-Channel
Fully Avalanche Rated
D
VDSS = -100V
RDS(on) = 0.06Ω
G
ID = -23A
S
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized
device design that HEXFET Power MOSFETs are well
known for, provides the designer with an extremely efficient
and reliable device for use in a wide variety of applications.
The TO-220 Fullpak eliminates the need for additional
insulating hardware in commercial-industrial applications.
The moulding compound used provides a high isolation
capability and a low thermal resistance between the tab
and external heatsink. This isolation is equivalent to using
a 100 micron mica barrier with standard TO-220 product.
The Fullpak is mounted to a heatsink using a single clip or
by a single screw fixing.
TO-220 FULLPAK
Absolute Maximum Ratings
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Parameter
Max.
Continuous Drain Current, VGS @ -10V
Continuous Drain Current, VGS @ -10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 srew
-23
-16
-140
63
0.42
± 20
690
-21
6.3
-5.0
-55 to + 175
Units
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
RθJC
RθJA
Junction-to-Case
Junction-to-Ambient
Typ.
Max.
Units
–––
–––
2.4
65
°C/W
3/16/98
IRFI5210
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
RDS(on)
VGS(th)
gfs
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Min.
-100
–––
–––
-2.0
10
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
-0.11
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
17
86
79
81
IDSS
Drain-to-Source Leakage Current
LD
Internal Drain Inductance
–––
4.5
LS
Internal Source Inductance
–––
7.5
Ciss
Coss
Crss
C
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Drain to Sink Capacitance
–––
–––
–––
–––
2700
790
450
12
V(BR)DSS
∆V(BR)DSS/∆TJ
IGSS
Max. Units
Conditions
–––
V
VGS = 0V, ID = -250µA
––– V/°C Reference to 25°C, I D = -1mA
0.06
Ω
VGS = 10V, ID = -12A
-4.0
V
VDS = VGS, ID = -250µA
–––
S
VDS = -50V, ID = -21A
-25
VDS = -100V, VGS = 0V
µA
-250
VDS = -80V, VGS = 0V, TJ = 150°C
100
VGS = 20V
nA
-100
VGS = -20V
180
ID = -21A
25
nC VDS = -80V
97
VGS = -10V, See Fig. 6 and 13
–––
VDD = -50V
–––
ID = -21A
ns
–––
RG = 2.5Ω
–––
RD = 2.4Ω, See Fig. 10
D
Between lead,
–––
6mm (0.25in.)
nH
G
from package
–––
and center of die contact
S
–––
VGS = 0V
–––
VDS = -25V
pF
–––
ƒ = 1.0MHz, See Fig. 5
–––
ƒ = 1.0MHz
Source-Drain Ratings and Characteristics
IS
ISM
VSD
trr
Qrr
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Min. Typ. Max. Units
–––
–––
-23
–––
–––
-140
–––
–––
–––
–––
170
1.2
-1.3
260
1.8
A
V
ns
µC
Conditions
D
MOSFET symbol
showing the
G
integral reverse
S
p-n junction diode.
TJ = 25°C, IS = -12A, VGS = 0V
TJ = 25°C, IF = -21A
di/dt = -100A/µs
Notes:
Repetitive rating; pulse width limited by
Pulse width ≤ 300µs; duty cycle ≤ 2%.
max. junction temperature. ( See fig. 11 )
VDD = -25V, starting TJ = 25°C, L = 3.1mH
t=60s, ƒ=60Hz
RG = 25Ω, IAS = -21A. (See Figure 12)
ISD ≤ -21A, di/dt ≤ -480A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
Uses IRF5210 data and test conditions
IRFI5210
1000
1000
VGS
- 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
BOTTOM - 4.5V
10
-4.5V
40µ s P U LS E W ID TH
T c = 25°C
A
1
1
10
-ID , D rain-to-S ource C urrent (A )
-ID , D rain-to-S ource C urrent (A )
100
0.1
100
10
-4.5V
0.1
100
R D S (on ) , D rain-to-S ource O n R esistance
(N orm alized)
-I D , D rain-to -S o urc e C urre nt (A )
3.0
100
T J = 2 5 °C
T J = 1 7 5 °C
10
V D S = -5 0 V
4 0 µ s P U L S E W ID T H
6
7
8
9
-VG S , G a te -to -S o u rc e V o lta g e (V )
Fig 3. Typical Transfer Characteristics
10
A
100
Fig 2. Typical Output Characteristics
1000
5
1
-VD S , D rain-to-S ource V oltage (V )
Fig 1. Typical Output Characteristics
1
40µ s P U LS E W ID TH
T C = 175°C
1
-VD S , D rain-to-S ource V oltage (V )
4
VGS
- 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
BOTTOM - 4.5V
TOP
TOP
10
A
I D = -35A
2.5
2.0
1.5
1.0
0.5
VG S = -10V
0.0
-60 -40 -20
0
20
40
60
80
A
100 120 140 160 180
T J , Junction T em perature (°C )
Fig 4. Normalized On-Resistance
Vs. Temperature
IRFI5210
5000
C , C apacitanc e (pF )
C is s
V GS
C iss
C rss
C oss
=
=
=
=
20
0V ,
f = 1M H z
C gs + C gd , C ds S H O R TE D
C gd
C ds + C gd
-V G S , G ate-to-S ource V oltage (V )
6000
4000
C os s
3000
C rs s
2000
1000
0
10
V D S = -80V
V D S = -50V
V D S = -20V
16
12
8
4
FO R TE S T C IR C U IT
S E E FIG U R E 1 3
0
A
1
I D = -2 1A
0
100
-VD S , D rain-to-S ource V oltage (V )
80
120
160
A
200
Q G , Total G ate C harge (nC )
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000
1000
O P E R A TIO N IN TH IS A R E A LIM ITE D
B Y R D S (on)
-I D , D rain C urrent (A )
-I S D , R everse D rain C urrent (A )
40
100
TJ = 175°C
T J = 25°C
10
V G S = 0V
1
0.4
0.8
1.2
1.6
2.0
-VS D , S ource-to-D rain V oltage (V )
Fig 7. Typical Source-Drain Diode
Forward Voltage
A
2.4
10µ s
100
100µ s
10
1m s
10m s
T C = 25°C
T J = 175°C
S ingle P uls e
1
1
A
10
100
1000
-VD S , D rain-to-S ource V oltage (V )
Fig 8. Maximum Safe Operating Area
IRFI5210
VDS
25
VGS
RD
D.U.T.
RG
20
-
-ID , Drain Current (A)
+
VDD
-10V
15
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
10
Fig 10a. Switching Time Test Circuit
td(on)
5
tr
t d(off)
tf
VGS
10%
0
25
50
75
100
125
150
175
TC , Case Temperature ( ° C)
90%
VDS
Fig 9. Maximum Drain Current Vs.
Case Temperature
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
10
D = 0.50
1
0.20
0.10
PDM
0.05
0.1
t1
0.02
t2
0.01
Notes:
1. Duty factor D = t 1 / t 2
2. Peak TJ = P DM x Z thJC + TC
SINGLE PULSE
(THERMAL RESPONSE)
0.01
0.00001
0.0001
0.001
0.01
0.1
1
10
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
100
IRFI5210
L
VD S
+
-
D .U .T
RG
IA S
-20 V
tp
VD D
A
D R IV E R
0.01 Ω
15V
Fig 12a. Unclamped Inductive Test Circuit
IAS
E A S , S ingle P ulse A valanc he E nergy (m J)
2000
ID
-8.6A
-15A
-21A
TO P
B O TTO M
1600
1200
800
400
0
A
25
50
75
100
125
150
175
S tarting T J , Junc tion T em perature (°C )
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
tp
V (BR)DSS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
QG
12V
.2µF
.3µF
-10V
QGS
QGD
D.U.T.
+VDS
VGS
VG
-3mA
Charge
Fig 13a. Basic Gate Charge Waveform
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
IRFI5210
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
-
-
+
**
• dv/dt controlled by RG
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
RG
VGS*
+
-
*
VDD
* Reverse Polarity for P-Channel
** Use P-Channel Driver for P-Channel Measurements
Driver Gate Drive
P.W.
D=
Period
P.W.
Period
[VGS=10V ] ***
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
[VDD]
Forward Drop
Inductor Curent
Ripple ≤ 5%
*** VGS = 5.0V for Logic Level and 3V Drive Devices
Fig 14. For P-Channel HEXFETS
[ ISD]
IRFI5210
Package Outline
TO-220 Fullpak Outline
Dimensions are shown in millimeters (inches)
10.60 (.417)
10.40 (.409)
ø
3.40 (.133)
3.10 (.123)
4.80 (.189)
4.60 (.181)
-A3.70 (.145)
3.20 (.126)
16.00 (.630)
15.80 (.622)
2.80 (.110)
2.60 (.102)
LE A D A S S IG N ME N TS
1 - G A TE
2 - D R A IN
3 - SOURCE
7.10 (.280)
6.70 (.263)
1.15 (.045)
M IN .
NOTES:
1 D IME N S IO N IN G & TO LE R A N C IN G
P E R A N S I Y 14.5M , 1982
1
2
3
2 C O N TR O LLIN G D IM E N S IO N : IN C H .
3.30 (.130)
3.10 (.122)
-B-
13.70 (.540)
13.50 (.530)
C
A
1.40 (.055)
3X
1.05 (.042)
0.90 (.035)
3X 0.70 (.028)
0.25 (.010)
3X
M
A M
B
2.54 (.100)
2X
0.48 (.019)
0.44 (.017)
2.85 (.112)
2.65 (.104)
D
B
M IN IM U M C R E E P A G E
D IS TA N C E B E TW E E N
A -B -C -D = 4.80 (.189)
Part Marking Information
TO-220 Fullpak
E X A M P L E : T H IS IS A N IR F I8 4 0 G
W ITH A S S E M B L Y
LOT COD E E401
A
IN T E R N A T IO N A L
R E C T IF IE R
LOGO
PART NUMBER
IR F I8 4 0 G
E 40 1 92 45
ASSEMBLY
LOT CODE
D ATE CO DE
(Y Y W W )
Y Y = YE A R
W W = W EEK
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Data and specifications subject to change without notice.
3/98