INTEGRATED CIRCUITS DATA SHEET OM6353 GSM Baseband MCP Preliminary Specification File under Integrated Circuits, IC17; OM6353 2001 Jul 02 Philips Semiconductors Preliminary Specification 1.11 GSM Baseband MCP OM6353 CONTENTS 1 OM6353 GENERAL ITEMS . . . . . . . . . . . . . 3 2 DOCUMENT REFERENCES . . . . . . . . . . . . 3 3 FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . 3 4 DOCUMENT HISTORY . . . . . . . . . . . . . . . . 3 5 ORDERING INFORMATION. . . . . . . . . . . . . 4 6 FUNCTIONAL DESCRIPTION . . . . . . . . . . . 4 6.1 Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . 5 7 JTAG IDENTIFICATION . . . . . . . . . . . . . . . . 6 8 LFBGA180, 12X12MM2 PINNING INFORMATION6 8.1 8.2 Pin Description . . . . . . . . . . . . . . . . . . . . . . . 6 Detailed Pinning Information LFBGA180, 12x12 mm26 9 LFBGA180, 15X15MM2 PINNING INFORMATION14 9.1 Detailed Pinning Information LFBGA180, 15x15 mm214 10 LIMITING VALUES . . . . . . . . . . . . . . . . . . 23 11 PACKAGE OUTLINE LFBGA180, 12X12MM2 24 12 PACKAGE OUTLINE LFBGA180, 15X15 MM2 25 13 SOLDERING . . . . . . . . . . . . . . . . . . . . . . . . 26 13.1 Introduction to soldering surface mount packages26 Reflow soldering . . . . . . . . . . . . . . . . . . . . . 26 Wave soldering . . . . . . . . . . . . . . . . . . . . . . 26 Manual soldering. . . . . . . . . . . . . . . . . . . . . 26 Suitability of surface mount IC packages for wave and reflow soldering methods27 13.2 13.3 13.4 13.5 14 DEFINITIONS . . . . . . . . . . . . . . . . . . . . . . . 28 15 LIFE SUPPORT APPLICATIONS . . . . . . . . 28 16 PURCHASE OF PHILIPS I2C COMPONENTS 28 2001 Jul 02 2 Philips Semiconductors Preliminary Specification 1.11 GSM Baseband MCP 1 OM6353 OM6353 General Items The OM6353 is a multichip package (MCP) containing two integrated circuits. It is designed to provide the baseband processing for GSM handsets. The components are: • PCF50877, an integrated baseband processor (BBP) with an ARM micro controller, R.E.A.L. DSP, timer and interface hardware. • PCF50732, an analogue baseband and audio interface (ABBA) with voiceband processor (VSP), baseband and auxiliary CODECs. • Optionally a performance optimized and pin compatible MCP (OM6354/x/2) is available, using the PCF50874. For a detailed description on the Baseband Architecture comprising PCF50732 and PCF50877 or PCF50874, refer to the following datasheets and white papers: 2 Document References 1. Data sheet PCF50732 GSM Baseband and Audio Interface 2. Objective Specification PCF50877 ARM7 uC & RD16022 DSP Integrated Baseband Processor 3. Objective Specification PCF50874 ARM7 uC & RD16022 DSP Integrated Baseband Processor 4. Objective Specification PCF5087x baseband family specification Version 3.9p This product datasheet and the documents mentioned above are complementary. 3 Features The following hardware features are offered by the OM6353. • Low voltage operation (1.2V to 2.75V at 13MHz reference clock). • Low power consumption. • Small package area (12x12 mm2) and low weight. • BGA package with three ball rows only (15x15mm2) for simple motherboard routing. • Operating ambient temperature range from -40 to 85 degrees Celsius. 4 Document History This document has been updated with the following changes. Table 1 List of changes to the specification CHAPTERS FEATURES VERSION STATUS All Initial version, based on OM6354 spec 1.01 1.0 done 5 updated block diagram 1.01a done All added 15x15mm2 package 1.10 done 7.3.2 publication drawing for SOT697 included 1.11 done 4, 9, 12, 13 ordering information updated, limiting values, soldering, references 1.11 done 2001 Jul 02 3 Philips Semiconductors Preliminary Specification 1.11 GSM Baseband MCP 5 OM6353 Ordering Information The OM6353 version is available in the production package LFBGA180, both in 12x12mm2 and 15x15mm2: Table 2 Package Information of OM6353 PACKAGE TYPE NUMBER TYPE DESCRIPTION PITCH OVERALL DIMENSIONS DIES OM6353E/271/2 LFBGA180 Single task firmware 7v1 0.8 mm 12 mm x 12 mm x 1.05 mm PCF50877/271/1 (without solder balls) PCF50732-3E OM6353E/2A3/2 LFBGA180 Multi task firmware Av3 0.8 mm 12 mm x 12 mm x 1.05 mm PCF50877/2A3/1 (without solder balls) PCF50732-3E OM6353EL/2A3/3 LFBGA180 Multi task firmware Av3 0.8 mm 15 mm x 15 mm x 1.05 mm PCF50877/2A3/1 (without solder balls) PCF50732-3E 6 Functional Description The full functional description can be found in the respective individual device data sheets and the documentation related to the platform. All individual die signal pins are externally accessible to ease system development. Whenever two pins have been connected, the PCF50732 name took precedence over the PCF50877 name. For power supply connections established on the LFBGA substrate, refer to Table 7 “Power supply for MCP 12x12mm2” on page 14 and Table 10 “Power supply for MCP 15 x 15 mm2” on page 24 respectively Notation in the following block diagram: Names in italics denote MCP ball names. They are listed on the outside of the top level block. PCF50877 and PCF50732 pin names are shown close to the respective blocks. Doing so, interconnectivity is visualised. Note that the reset signals of both chips are tied together internally. 2001 Jul 02 4 Philips Semiconductors Preliminary Specification 1.11 GSM Baseband MCP RXD0 CTS0_N TXD0 RTS0_N TMS TDO TDI TRST_N TCK J_SEL 2001 Jul 02 RXD1 TXD1 RXD0 CTS0_N TXD0 RTS0_N VDDbb VDDvbout VDDvb VDDref CSI AUXST RESET_N RST_N DSP 11 CDI CCLK CDO CEN RXON TXON 11 12 SIXEN_N SIOXD SOXEN_N SIOXCLK BOEN BDIO BIEN BIOCLK DD FSC ADI AFS ACLK ADO DCL DU A D A D A D D A D A A D A D D A A D PCF50732 TMS TDO TDI TRST_N TCK J_SEL VDDD VSS VDDC VSS RFCU KBS PWM GPIO RFDO RFCLK RFDI 12 AUXDAC1 AUXDAC2 AUXDAC3 AMPCTRL VREF QP QN CKI CK32I CK32O AUXST GPON1..2 CEN RFE_N0,2 RXON TXON RFSIG0..10 CDO CCLK CDI AUXDAC1 AUXDAC2 AUXDAC3 AMPCTRL VREF QP QN IP IP IN IN AUXADC1..4 AUXADC1..4 EARP EARP EARN EARN AUXSP AUXSP BUZ BUZ MICP MICP MICN MICN AUXMICP AUXMICP AUXMICN AUXMICN MCLK MCLK ADO ACLK AFS ADI BIOCLK BIEN BDIO BOEN JTAG RXD1 TXD1 UART1 UART0 UART1 SC 1 BSI HD[15:0] HA[20:1] HRD_N HWR_N CS_N[3:0] 1 0 ASI HD0..15 HA1..20 HRD_N HWR_N CS_N0..3 SIMERR SIMCLK SIMIO SIOX SIMERR SIMCLK SIMIO SCL SDA GPON[2:0] RFE_N[2:0] RFSIG[12:0] SIOY SCL SDA PWM[1:0] PDCU SIMU PWM0..1 GPIO[10:0] CGU CKI CK32I CK32O 0 EMI EMI GPIO0..10 KBIO[7:0] VDDC VSS AVSS AVDD VDDE1 VDDE2 KBIO0..7 OOL II22C C RST_N RESET_N RSTO_N RSTO_N POWON POWON LOWVOLT_N LOWVOLT_N AUXON AUXON ONKEY ONKEY VDD_BB VDD_VBOUT VDD_VB VDD_REF VDD_D VSS Block Diagram AVSS AVDD VDDE1 VDDE2 6.1 OM6353 PCF50877 5 Philips Semiconductors Preliminary Specification 1.11 GSM Baseband MCP 7 OM6353 JTAG Identification For the OM6353, The JTAG identification is that of the PCF50877 die. The ID-code can be shifted out via the JTAG port using the IDCODE instruction. It consists of a version number (4 bits), a part number (16 bits), a manufacturer ID and a leading start bit as shown in Table 3. Table 3 JTAG ID Code VERSION PART. NO. MANUFACTURER START 4 bit 16 bit 11 bit 1 bit 00000010101 1 0001 0101 1000 0111 0111 DIRECTION OF DATA SHIFT 8 LFBGA180, 12x12mm2 pinning information 8.1 Pin Description Table 4 shows the pins of the OM6353 version in the LFBGA180 packages and a cross reference to the pins of the individual die pins. Please refer to the respective data sheets for a detailed description of the respective pins. Table 4 Pin Types TYPE DESCRIPTION O Output I Input I/O Bi-directional P Power G Ground Note: 1. All power pins of individual supply domains have to be connected externally. 2. All signal pins are available on the MCP outputs. The OM6353 exists in two LFBGA-180 packages (12 x 12 mm2 and 15x15 mm2). 8.2 Detailed Pinning Information LFBGA180, 12x12 mm2 In this section the information for the package LFBGA180, 12x12mm2 with five ball rows in 0.8mm pitch is given. Table 6 and Table 7 indicate how the pins of the PCF50877 and PCF50732 map to the package pin. Core supplies are VDDC and VDD_D. The PCF50877 IO supplies are VDDE1 and VDDE2. 2001 Jul 02 6 Philips Semiconductors Preliminary Specification 1.11 GSM Baseband MCP Table 5 OM6353 Top view of MCP 12x12mm2 5 6 7 A TRST_N 1 TMS TCK TXD1 RTS0_N RFSIG1 RFSIG4 ADI ADO AUXSP EARN VSS_VB MICP AUX MICN B HD6 HD15 SDA J_SEL CTS0_N RFSIG3 RFSIG6 ACLK AFS EARP BUZ VDD_VB MICN AUX MICP C VDDE2 SCL VSS RXD0 TXD0 RFSIG7 RFSIG5 VDDE1 VDD_D RESETN VSS_ VBOUT VDD_ VBOUT VSS_ REF VREF D HD12 TDI TDO RXD1 RFSIG0 RFSIG2 RFSIG10 CDI CEN MCLK VSSD AUX DAC3 AUX DAC2 VDD_ REF E HD11 HD14 HD13 HD7 HD4 PWM1 RFSIG8 VSS CDO CCLK BDIO AUX DAC1 VSS_ BB AUX ADC3 F HD10 HD9 HD8 PWM0 VDDC BIEN BIOCLK VDD_BB AUX ADC4 AUX ADC1 G VSS VDDE2 CS3_N HA20 CS1_N AUXST BOEN TXON VSS AUX ADC2 H HD5 HD2 HD1 HD0 HRD_N AMP CTRL VDDE1 RXON QP QN J VSS HA14 HD3 HA17 HA15 KBIO1 KBIO3 RFE_N0 IP IN K VSS HA19 HA16 HA18 HA5 VDDC VSS GPIO10 RFSIG9 KBIO0 RFE_N2 KBIO2 AUXON POWON L HA12 HA11 VDDE2 HA3 HWR_N GPIO1 GPIO5 GPIO2 GPIO6 GPON1 KBIO4 KBIO6 KBIO5 KBIO7 M HA9 HA13 HA6 HA1 CS2_N VDDE2 VSS VDDC LOW VOLT_N RSTO_N SIMERR SIMIO SIMCLK ONKEY N HA10 HA8 HA4 CS0_N VSS GPIO3 GPIO7 GPIO9 GPON2 VSS VSS VDDE1 NC VSS P VSS HA7 HA2 VDDE2 GPIO0 GPIO8 GPIO4 VDDE2 VDDE1 AVSS CKI AVDD CKI32I CKI32O 2001 Jul 02 2 3 4 8 7 9 10 11 12 13 14 Philips Semiconductors Preliminary Specification 1.11 GSM Baseband MCP Table 6 OM6353 Pin Description MCP 12x12mm OM6353 NAME CONNECTED TO DEVICE SIGNALS DESCRIPTION BALL PCF50877 TYPE SUPPLY PCF50732 NAME TYPE SUPPLY NAME Power and Ground VSS Ground connections C3, E8, G1, PCF50877 G13, J1, K1, K7, M7, N5, N10, N11, N14, P1 G VSS AVSS Analog ground PCF50877 P10 G AVSS VSS_BB Baseband analog ground E13 G VSS VSS_REF Bandgap Reference C13 ground G VSS VSS_VB Voiceband ground A12 G VSS VSS_VBOUT Voiceband output drivers ground C11 G VSS VSSD Digital ground D11 G VSS VDD_BB Analog supplies PCF50732 F12 P VDDbb VDD_REF D14 P VDDref VDD_VB B12 P VDDvb VDD_VBOUT C12 P VDDvbout P VDDD VDDD Digital supply PCF50732 C9 P AVDD Analog supply PCF50877 P12 P AVDD VDDE1 Digital supplies for PCF50877 C8, H11, N12, P9 P VDDE1 P8, C1, P4, M6, G2, L3 P VDDE2 F5, M8, K6 P VDDC VDDE2 VDDC Digital supply for core of PCF50877 Reference Voltage VREF bandgap reference for external noise decoupling C14 I/O VDDref VREF I VDDD RESET_N On/Off Logic RESET_N chip set reset output C10 I/O VDDE1 RST_N RSTON PCF50877 reset input M10 I VDDE1 RSTO_N LOWVOLT_N low voltage alarm M9 I VDDE1 LOWVOLT_N 2001 Jul 02 8 Philips Semiconductors Preliminary Specification 1.11 GSM Baseband MCP OM6353 OM6353 NAME CONNECTED TO DEVICE SIGNALS DESCRIPTION BALL PCF50877 TYPE SUPPLY PCF50732 NAME POWON power-on K14 O VDDE1 POWON AUXON auxiliary power-on signal K13 I VDDE1 AUXON ONKEY on/off key M14 I VDDE1 ONKEY TYPE SUPPLY NAME Clocks CKI 13MHz clock input P11 I AVDD CKI CKI32I 32kHz clock input P13 I VDDE1 CLK32I CK32O 32kHz clock output P14 O VDDE1 CLK32O MCLK 13MHz clock input D10 I VDDbb MCLK RF Control Interface CCLK RF interface clock E10 O VDDE1 RFCLK I VDDD CCLK CDO control serial data E9 I VDDE1 RFDI O VDDD CDO CDI control serial data D8 O VDDE1 RFDO I VDDD CDI CEN enable ctrl. serial D9 O VDDE1 RFE_N1 I VDDD CEN RFE_N2 additional RF interface enables K11 O VDDE1 RFE_N2 J12 O VDDE1 RFE_N0 TXON baseband transmit active G12 O VDDE1 RFSIG12 I VDDD TXON RXON baseband receive active H12 O VDDE1 RFSIG11 I VDDD RXON RFSIG10 signal generator output D7 O VDDE1 RFSIG10 K9 O VDDE1 RFSIG9 RFE_N0 RFSIG9 RFSIG8 E7 O VDDE1 RFSIG8 RFSIG7 C6 O VDDE2 RFSIG7 RFSIG6 B7 O VDDE2 RFSIG6 RFSIG5 C7 O VDDE2 RFSIG5 RFSIG4 A7 O VDDE2 RFSIG4 RFSIG3 B6 O VDDE2 RFSIG3 RFSIG2 D6 O VDDE2 RFSIG2 RFSIG1 A6 O VDDE2 RFSIG1 RFSIG0 D5 O VDDE2 RFSIG0 Baseband Interface BIOCLK interface clock F11 I VDDE1 SIOXCLK O VDDD BIOCLK BOEN baseband serial data enable RX G11 I VDDE1 SIXEN_N O VDDD BOEN BDIO baseband serial data E11 I/O VDDE1 SIOXD I/O VDDD BDIO BIEN baseband serial data enable TX F10 I VDDE1 SOXEN_N O VDDD BIEN 2001 Jul 02 9 Philips Semiconductors Preliminary Specification 1.11 GSM Baseband MCP OM6353 OM6353 NAME CONNECTED TO DEVICE SIGNALS DESCRIPTION BALL PCF50877 TYPE SUPPLY PCF50732 NAME TYPE SUPPLY NAME Audio Interface ACLK audio serial interface clock B8 I/O VDDE1 DCL I VDDD ACLK AFS audio serial frame B9 I/O VDDE1 FSC I VDDD AFS ADO TX audio serial A9 I VDDE1 DU O VDDD ADO ADI RX audio serial A8 O VDDE1 DD I VDDD ADI IIC Bus SCL interface clock C2 I/O VDDE2 SCL SDA data transfer B3 I/O VDDE2 SDA M4 O VDDE2 HA1 P3 O VDDE2 HA2 HA3 L4 O VDDE2 HA3 HA4 N3 O VDDE2 HA4 HA5 K5 O VDDE2 HA5 HA6 M3 O VDDE2 HA6 HA7 P2 O VDDE2 HA7 HA8 N2 O VDDE2 HA8 HA9 M1 O VDDE2 HA9 HA10 N1 O VDDE2 HA10 HA11 L2 O VDDE2 HA11 HA12 L1 O VDDE2 HA12 HA13 M2 O VDDE2 HA13 HA14 J2 O VDDE2 HA14 HA15 J5 O VDDE2 HA15 HA16 K3 O VDDE2 HA16 HA17 J4 O VDDE2 HA17 HA18 K4 O VDDE2 HA18 HA19 K2 O VDDE2 HA19 HA20 G4 O VDDE2 HA20 Memory Interface HA1 HA2 2001 Jul 02 memory address bus 10 Philips Semiconductors Preliminary Specification 1.11 GSM Baseband MCP OM6353 OM6353 NAME CONNECTED TO DEVICE SIGNALS DESCRIPTION BALL PCF50877 TYPE SUPPLY HD0 NAME H4 I/O VDDE2 HD0 HD1 H3 I/O VDDE2 HD1 HD2 H2 I/O VDDE2 HD2 HD3 J3 I/O VDDE2 HD3 HD4 E5 I/O VDDE2 HD4 HD5 H1 I/O VDDE2 HD5 HD6 B1 I/O VDDE2 HD6 HD7 E4 I/O VDDE2 HD7 HD8 F3 I/O VDDE2 HD8 HD9 F2 I/O VDDE2 HD9 HD10 F1 I/O VDDE2 HD10 HD11 E1 I/O VDDE2 HD11 HD12 D1 I/O VDDE2 HD12 HD13 E3 I/O VDDE2 HD13 HD14 E2 I/O VDDE2 HD14 HD15 B2 I/O VDDE2 HD15 L5 O VDDE2 HWR_N HWR_N HRD_N memory data bus PCF50732 memory control signals H5 O VDDE2 HRD_N CS_N0 N4 O VDDE2 CS0_N CS_N1 G5 O VDDE2 CS1_N CS_N2 M5 O VDDE2 CS2_N CS_N3 G3 O VDDE2 CS3_N Keyboard scanner KBIO7 L14 I/O VDDE1 KBIO7 KBIO6 keyboard matrix L12 I/O VDDE1 KBIO6 KBIO5 L13 I/O VDDE1 KBIO5 KBIO4 L11 I/O VDDE1 KBIO4 KBIO3 J11 I/O VDDE1 KBIO3 KBIO2 K12 I/O VDDE1 KBIO2 KBIO1 J10 I/O VDDE1 KBIO1 KBIO0 K10 O VDDE1 KBIO0 UART0 CTS0_N clear to send B5 I VDDE2 CTS0_N RTS0_N request to send A5 O VDDE2 RTS0_N TXD0 transmit data C5 O VDDE2 TXD0 RXD0 receive data C4 I/O VDDE2 RXD0 2001 Jul 02 11 TYPE SUPPLY NAME Philips Semiconductors Preliminary Specification 1.11 GSM Baseband MCP OM6353 OM6353 NAME CONNECTED TO DEVICE SIGNALS DESCRIPTION BALL PCF50877 TYPE SUPPLY PCF50732 NAME TYPE SUPPLY NAME UART1 TXD1 transmit data A4 O VDDE2 TXD1 RXD1 receive data D4 I/O VDDE2 RXD1 SIM Interface SIMCLK interface clock M13 O VDDE1 SIMCLK SIMIO data transfer M12 I/O VDDE1 SIMIO SIMERR error removal M11 I VDDE1 SIMERR K8 I/O VDDE2 GPIO10 General Purpose I/O Port GPIO10 GPIO9 general purpose signal N8 I/O VDDE2 GPIO9 GPIO8 P6 I/O VDDE2 GPIO8 GPIO7 N7 I/O VDDE2 GPIO7 GPIO6 L9 I/O VDDE2 GPIO6 GPIO5 L7 I/O VDDE2 GPIO5 GPIO4 P7 I/O VDDE2 GPIO4 GPIO3 N6 I/O VDDE2 GPIO3 GPIO2 L8 I/O VDDE2 GPIO2 GPIO1 L6 I/O VDDE2 GPIO1 GPIO0 P5 I/O VDDE2 GPIO0 E6 O VDDE2 PWM1 F4 O VDDE2 PWM0 I VDDE2 TCK Pulse Width Modulator PWM1 PWM0 pulse width modulator signal JTAG and Test Access Port TCK interface clock A3 TMS test mode select A2 I VDDE2 TMS TDI test data input D2 I VDDE2 TDI TDO test data output D3 O VDDE2 TDO TRST_N reset A1 I VDDE2 TRST_N J_SEL controller select BBP DSP or BBP SC B4 I VDDE2 J_SEL N9 O VDDE2 GPON2 L10 O VDDE2 GPON1 G10 O VDDE1 GPON0 Power-Down Control GPON2 GPON1 general purpose power down signal AUXST PCF50732 General Purpose Output 2001 Jul 02 12 I VDDD AUXST Philips Semiconductors Preliminary Specification 1.11 GSM Baseband MCP OM6353 OM6353 NAME DESCRIPTION CONNECTED TO DEVICE SIGNALS BALL PCF50877 TYPE SUPPLY AMPCTRL PCF50732 NAME TYPE SUPPLY NAME H10 O VDDD AMPCTRL baseband differential I signal J13 I/O VDDA1 IP J14 I/O VDDA1 IN baseband differential Q signal H13 I/O VDDA1 QP H14 I/O VDDA1 QN F14 I VDDD AUXADC1 AUXADC2 G14 I VDDD AUXADC2 AUXADC3 E14 I VDDD AUXADC3 AUXADC4 F13 I VDDD AUXADC4 E12 O VDDA1 AUXDAC1 D13 O VDDA1 AUXDAC2 D12 O VDDA1 AUXDAC3 microphone differential input A13 I VDDA3 MICP B13 I VDDA3 MICN auxiliary microphone differential input B14 I VDDA3 AUXMICP A14 I VDDA3 AUXMICN earphone differential output A11 O VDDA4 EARN B10 O VDDA4 EARP auxiliary earphone differential output A10 O VDDA4 AUXSP B11 O VDDA4 BUZ IF Signals IP IN QP QN Auxiliary Functions AUXADC1 AUXDAC1 AUXDAC2 auxiliary ADC input auxiliary DAC outputs AUXDAC3 Voiceband Codec MICP MICN AUXMICP AUXMICN EARN EARP AUXSP BUZ 2001 Jul 02 13 Philips Semiconductors Preliminary Specification 1.11 GSM Baseband MCP Table 7 OM6353 Power supply for MCP 12x12mm2 TYPE NUMBER DESCRIPTION PIN VDDC 3 core power supply pins F5, M8, K6 VDDE1 4 IO power supply pins C8, H11, N12, P9 VDDE2 6 IO power supply pins with level shifter P8, C1, G2, L3, P4, M6 VSS, VSS_VB, 19 VSS_VBOUT, VSS_REF, VSSD, VSS_BB, AVSS ground pins A12, C3, C11, C13, D11, E8, E13, G1, G13, J1, K1, K7, M7, N5, N10, N11, N14, P1, P10 VDD_D 1 Digital supply of PCF50732 C9 VDD_VB, VDD_VBOUT, VDD_REF, VDD_BB 4 Analog supplies of PCF50732 F12, D14, B12, C12 AVDD 1 PLL supply pin P12 NC 1 Not Connected N13 Notes: 1. All the power pins have to be connected externally. 2. For drop-in compatibility with OM6354, it is recommended to connect N13 to VDDC. Balls G2, L3, M6 and P4 are connected to VDDE3 in the OM6354 (which is not present on the OM6353 as the PCF50877 has no separate power supply for the memory interface). 3. In order to make room for all signal pins on the MCP outside connectors, five pairs of PCF50877 VSS pins have been connected on the LFBGA substrate. Thus, five balls have been used for ten die pins. All PCF50732 VSS pins are bonded out directly. 4. In order to make room for all signal pins on the MCP outside connectors, two pairs of PCF50877 VDDC pins, one pair of VDDE2 and one pair of VDDE2 have been connected on the LFBGA substrate. Thus, four balls have been used for eight die pins. All PCF50732 VDD pins are bonded out directly. 9 9.1 LFBGA180, 15x15mm2 pinning information Detailed Pinning Information LFBGA180, 15x15 mm2 In this section the information for the production package LFBGA180, 15 x 15 mm2 with three ball rows is given. Table 9 and Table 10 indicate how the pins of the PCF50877 and PCF50732 map to the package pin. Core supplies are VDDC and VDD_D. The PCF50877 IO supplies are VDDE1 and VDDE2. 2001 Jul 02 14 Philips Semiconductors Preliminary Specification 1.11 GSM Baseband MCP Table 8 OM6353 Top view of MCP 15x15mm 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 A TRST_ N SDA TDO TXD1 CTS0_ N RFSIG0 RFSIG1 RFSIG2 RFSIG6 RFSIG5 ADI ACLK ADO EARN BUZ VSS_VB MICP AUXMI CN B TDI J_SEL TCK VSS RXD0 RTS0_ N RFSIG3 RFSIG7 RFSIG4 RFSIG1 0 RFSIG8 VDD_D EARP AUXSP VDD_V B MICN AUXMI CP VREF C TMS RXD1 TXD0 VDDE2 VSS VDDC RFE_N 2 RFE_N 0 RFSIG9 VDDE1 VSS_D MCLK RESET N AFS VDD_V BOUT VSS_VB OUT VSS_R EF VDD_R EF D SCL PWM0 PWM1 AUXADC 3 AMCTR L AUXAD C3 E HD6 HD15 HD12 AUXADC 2 VSS_V B AUXAD C2 F HD13 HD14 HD11 VDD_VB AUXAD C1 AUXDA C1 G HD7 HD4 HD8 TXON VSS AUXAD C4 H HD10 HD9 VSS RXON QP QN J VDDE2 HD5 CS3_N CEN IP IN K VSS HD2 HD1 CCLK POWO N AUXON L VSS HA20 VDDC AUXST BIEN BIOCLK M HRD_N HD0 CS1_N VDDE1 CDO CDI N VDDE2 HD3 HA14 VDDE1 BOEN BDIO P HA12 HA11 HA16 RSTO_N SIMER R SIMCL K R HA9 HA8 HA7 KBIO3 KBIO7 SIMIO T HA13 HA6 HA3 HA1 HA17 VDDE2 VSS GPIO8 GPIO10 VSS AVSS CKI AVDD CKI32O CKI32I VSS n.c. ONKEY U VSS HA4 HA5 CS0_N HA15 HA18 GPIO0 GPIO5 VDDC GPIO2 GPIO6 VSS LOWVO LT_N VDDE1 VSS KBIO1 VSS KBIO5 V HA10 VDDE2 HA2 HWR_N CS2_N HA19 GPIO3 GPIO7 GPIO4 GPIO1 VDDE2 GPIO9 GPON2 GPON1 KBIO0 KBIO2 KBIO4 KBIO6 2001 Jul 02 15 Philips Semiconductors Preliminary Specification 1.11 GSM Baseband MCP Table 9 OM6353 Pin Description MCP 15x15mm2 OM6353 NAME DESCRIPTION CONNECTED TO DEVICE SIGNALS BALL PCF50877 TYPE SUPPLY PCF50732 NAME TYPE SUPPLY NAME Power and Ground VSS Ground connections B4, C5, PCF50877 G17, H3, K1, L1, T7, T10, T16, U1, U12, U15, U17 G VSS AVSS Analog ground PCF50877 T11 G AVSS VSS_BB Baseband analog ground E17 G VSS VSS_REF Bandgap Reference ground C17 G VSS VSS_VB Voiceband ground A16 G VSS C16 G VSS VSS_VBOUT Voiceband output drivers ground VSSD Digital ground C11 G VSS VDD_BB Analog supplies PCF50732 F16 P VDDbb C18 P VDDref VDD_VB B15 P VDDvb VDD_VBOUT C15 P VDDvbout P VDDD VDD_REF VDDD Digital supply PCF50732 B12 P AVDD Analog supply PCF50877 T13 P AVDD VDDE1 Digital supplies for PCF50877 C10, M16, N16, U14 P VDDE1 C4, J1, N1, P T6, V2, V11 VDDE2 C6, U9, L3 VDDC VDDE2 VDDC Digital supply for core of PCF50877 P Reference Voltage VREF bandgap reference for external noise decoupling B18 I/O VDDref VREF I VDDD RESET_N On/Off Logic RESET_N chip set reset output C13 I/O VDDE1 RST_N RSTON PCF50877 reset input P16 I VDDE1 RSTO_N U13 I VDDE1 LOWVOLT_N LOWVOLT_N low voltage alarm 2001 Jul 02 16 Philips Semiconductors Preliminary Specification 1.11 GSM Baseband MCP OM6353 OM6353 NAME CONNECTED TO DEVICE SIGNALS DESCRIPTION BALL PCF50877 TYPE SUPPLY PCF50732 NAME POWON power-on K17 O VDDE1 POWON AUXON auxiliary power-on signal K18 I VDDE1 AUXON ONKEY on/off key T18 I VDDE1 ONKEY TYPE SUPPLY NAME Clocks CKI 13MHz clock input T12 I AVDD CKI CKI32I 32kHz clock input T15 I VDDE1 CLK32I CK32O 32kHz clock output T14 O VDDE1 CLK32O MCLK 13MHz clock input C12 I VDDbb MCLK RF Control Interface CCLK RF interface clock K16 O VDDE1 RFCLK I VDDD CCLK CDO control serial data M17 I VDDE1 RFDI O VDDD CDO CDI control serial data M18 O VDDE1 RFDO I VDDD CDI CEN enable ctrl. serial J16 O VDDE1 RFE_N1 I VDDD CEN RFE_N2 additional RF interface enables C7 O VDDE1 RFE_N2 C8 O VDDE1 RFE_N0 TXON baseband transmit active G16 O VDDE1 RFSIG12 I VDDD TXON RXON baseband receive active H16 O VDDE1 RFSIG11 I VDDD RXON RFSIG10 signal generator output B10 O VDDE1 RFSIG10 C9 O VDDE1 RFSIG9 RFSIG8 B11 O VDDE1 RFSIG8 RFSIG7 B8 O VDDE2 RFSIG7 RFSIG6 A9 O VDDE2 RFSIG6 RFSIG5 A10 O VDDE2 RFSIG5 RFSIG4 B9 O VDDE2 RFSIG4 RFSIG3 B7 O VDDE2 RFSIG3 RFSIG2 A8 O VDDE2 RFSIG2 RFSIG1 A7 O VDDE2 RFSIG1 RFSIG0 A6 O VDDE2 RFSIG0 RFE_N0 RFSIG9 Baseband Interface BIOCLK interface clock L18 I VDDE1 SIOXCLK O VDDD BIOCLK BOEN baseband serial data enable RX N17 I VDDE1 SIXEN_N O VDDD BOEN BDIO baseband serial data N18 I/O VDDE1 SIOXD I/O VDDD BDIO BIEN baseband serial data enable TX L17 I VDDE1 SOXEN_N O VDDD BIEN 2001 Jul 02 17 Philips Semiconductors Preliminary Specification 1.11 GSM Baseband MCP OM6353 OM6353 NAME CONNECTED TO DEVICE SIGNALS DESCRIPTION BALL PCF50877 TYPE SUPPLY PCF50732 NAME TYPE SUPPLY NAME Audio Interface ACLK audio serial interface clock A12 I/O VDDE1 DCL I VDDD ACLK AFS audio serial frame C14 I/O VDDE1 FSC I VDDD AFS ADO TX audio serial A13 I VDDE1 DU O VDDD ADO ADI RX audio serial A11 O VDDE1 DD I VDDD ADI SCL interface clock D1 I/O VDDE2 SCL SDA data transfer A2 I/O VDDE2 SDA T4 O VDDE2 HA1 I2C Bus Memory Interface HA1 HA2 memory address bus V3 O VDDE2 HA2 HA3 T3 O VDDE2 HA3 HA4 U2 O VDDE2 HA4 HA5 U3 O VDDE2 HA5 HA6 T2 O VDDE2 HA6 HA7 R3 O VDDE2 HA7 HA8 R2 O VDDE2 HA8 HA9 R1 O VDDE2 HA9 HA10 V1 O VDDE2 HA10 HA11 P2 O VDDE2 HA11 HA12 P1 O VDDE2 HA12 HA13 T1 O VDDE2 HA13 HA14 N3 O VDDE2 HA14 HA15 U5 O VDDE2 HA15 HA16 P3 O VDDE2 HA16 HA17 T5 O VDDE2 HA17 HA18 U6 O VDDE2 HA18 HA19 V6 O VDDE2 HA19 HA20 L2 O VDDE2 HA20 2001 Jul 02 18 Philips Semiconductors Preliminary Specification 1.11 GSM Baseband MCP OM6353 OM6353 NAME CONNECTED TO DEVICE SIGNALS DESCRIPTION BALL PCF50877 TYPE SUPPLY HD0 NAME M2 I/O VDDE2 HD0 HD1 K3 I/O VDDE2 HD1 HD2 K2 I/O VDDE2 HD2 HD3 N2 I/O VDDE2 HD3 HD4 G2 I/O VDDE2 HD4 HD5 J2 I/O VDDE2 HD5 HD6 E1 I/O VDDE2 HD6 HD7 G1 I/O VDDE2 HD7 HD8 G3 I/O VDDE2 HD8 HD9 H2 I/O VDDE2 HD9 HD10 H1 I/O VDDE2 HD10 HD11 F3 I/O VDDE2 HD11 HD12 E3 I/O VDDE2 HD12 HD13 F1 I/O VDDE2 HD13 HD14 F2 I/O VDDE2 HD14 HD15 E2 I/O VDDE2 HD15 V4 O VDDE2 HWR_N HWR_N HRD_N memory data bus PCF50732 memory control signals M1 O VDDE2 HRD_N CS_N0 U4 O VDDE2 CS0_N CS_N1 M3 O VDDE2 CS1_N CS_N2 V5 O VDDE2 CS2_N CS_N3 J3 O VDDE2 CS3_N Keyboard scanner KBIO7 R17 I/O VDDE1 KBIO7 KBIO6 keyboard matrix V18 I/O VDDE1 KBIO6 KBIO5 U18 I/O VDDE1 KBIO5 KBIO4 V17 I/O VDDE1 KBIO4 KBIO3 R16 I/O VDDE1 KBIO3 KBIO2 V16 I/O VDDE1 KBIO2 KBIO1 U16 I/O VDDE1 KBIO1 KBIO0 V15 O VDDE1 KBIO0 UART0 CTS0_N clear to send A5 I VDDE2 CTS0_N RTS0_N request to send B6 O VDDE2 RTS0_N TXD0 transmit data C3 O VDDE2 TXD0 RXD0 receive data B5 I/O VDDE2 RXD0 2001 Jul 02 19 TYPE SUPPLY NAME Philips Semiconductors Preliminary Specification 1.11 GSM Baseband MCP OM6353 OM6353 NAME CONNECTED TO DEVICE SIGNALS DESCRIPTION BALL PCF50877 TYPE SUPPLY PCF50732 NAME TYPE SUPPLY NAME UART1 TXD1 transmit data A4 O VDDE2 TXD1 RXD1 receive data C2 I/O VDDE2 RXD1 SIM Interface SIMCLK interface clock P18 O VDDE1 SIMCLK SIMIO data transfer R18 I/O VDDE1 SIMIO SIMERR error removal P17 I VDDE1 SIMERR T9 I/O VDDE2 GPIO10 General Purpose I/O Port GPIO10 GPIO9 general purpose signal V12 I/O VDDE2 GPIO9 GPIO8 T8 I/O VDDE2 GPIO8 GPIO7 V8 I/O VDDE2 GPIO7 GPIO6 U11 I/O VDDE2 GPIO6 GPIO5 U8 I/O VDDE2 GPIO5 GPIO4 V9 I/O VDDE2 GPIO4 GPIO3 V7 I/O VDDE2 GPIO3 GPIO2 U10 I/O VDDE2 GPIO2 GPIO1 V10 I/O VDDE2 GPIO1 GPIO0 U7 I/O VDDE2 GPIO0 D3 O VDDE2 PWM1 D2 O VDDE2 PWM0 interface clock B3 I VDDE2 TCK TMS test mode select C1 I VDDE2 TMS TDI test data input B1 I VDDE2 TDI TDO test data output B3 O VDDE2 TDO TRST_N reset A1 I VDDE2 TRST_N J_SEL controller select BBP DSP or BBP SC B2 I VDDE2 J_SEL V13 O VDDE2 GPON2 V14 O VDDE2 GPON1 L16 O VDDE1 GPON0 Pulse Width Modulator PWM1 PWM0 pulse width modulator signal JTAG and Test Access Port TCK Power-Down Control GPON2 GPON1 general purpose power down signal AUXST I VDDD AUXST O VDDD AMPCTRL PCF50732 General Purpose Output AMPCTRL 2001 Jul 02 D17 20 Philips Semiconductors Preliminary Specification 1.11 GSM Baseband MCP OM6353 OM6353 NAME DESCRIPTION CONNECTED TO DEVICE SIGNALS BALL PCF50877 TYPE SUPPLY PCF50732 NAME TYPE SUPPLY NAME IF Signals IP IN QP QN baseband differential I signal J17 I/O VDDA1 IP J18 I/O VDDA1 IN baseband differential Q signal H17 I/O VDDA1 QP H18 I/O VDDA1 QN Auxiliary Functions AUXADC1 F17 I VDDD AUXADC1 AUXADC2 auxiliary ADC input E16 I VDDD AUXADC2 AUXADC3 D16 I VDDD AUXADC3 G18 I VDDD AUXADC4 F18 O VDDA1 AUXDAC1 E18 O VDDA1 AUXDAC2 D18 O VDDA1 AUXDAC3 microphone differential input A17 I VDDA3 MICP B16 I VDDA3 MICN auxiliary microphone differential input B17 I VDDA3 AUXMICP A18 I VDDA3 AUXMICN earphone differential output A14 O VDDA4 EARN B13 O VDDA4 EARP auxiliary earphone differential output B14 O VDDA4 AUXSP A15 O VDDA4 BUZ AUXADC4 AUXDAC1 AUXDAC2 auxiliary DAC outputs AUXDAC3 Voiceband Codec MICP MICN AUXMICP AUXMICN EARN EARP AUXSP BUZ 2001 Jul 02 21 Philips Semiconductors Preliminary Specification 1.11 GSM Baseband MCP OM6353 Table 10 Power supply for MCP 15x15mm2 TYPE NUMBER DESCRIPTION PIN VDDC 3 core power supply pins C6, L3, U9 VDDE1 4 IO power supply pins C10, M16, N16, U14 VDDE2 6 IO power supply pins with level shifter C4, J1,N1, T6, V2, V11 VSS, VSS_VB, 19 VSS_VBOUT, VSS_REF, VSSD, VSS_BB, AVSS ground pins B4, C5, G17, H3, K1, L1, T7, T10, T16, U1, U12, U15, U17, T11, C11, A16, C16, C17, E17 VDD_D 1 Digital supply of PCF50732 B12 VDD_VB, VDD_VBOUT, VDD_REF, VDD_BB 4 Analog supplies of PCF50732 B15, C15, C18, F16 AVDD 1 PLL supply pin T13 n.c. 1 Not Connected T17 Notes: 1. All the power pins have to be connected externally. 2. For drop-in compatibility with OM6354, it is recommended to connect N13 to VDDC. Balls G2, L3, M6 and P4 are connected to VDDE3 in the OM6354 (which is not present on the OM6353 as the PCF50877 has no separate power supply for the memory interface). 3. In order to make room for all signal pins on the MCP outside connectors, five pairs of PCF50877 VSS pins have been connected on the LFBGA substrate. Thus, five balls have been used for ten die pins. All PCF50732 VSS pins are bonded out directly. 4. In order to make room for all signal pins on the MCP outside connectors, two pairs of PCF50877 VDDC pins, one pair of VDDE2 and one pair of VDDE2 have been connected on the LFBGA substrate. Thus, four balls have been used for eight die pins. All PCF50732 VDD pins are bonded out directly. 2001 Jul 02 22 Philips Semiconductors Preliminary Specification 1.11 GSM Baseband MCP OM6353 10 Limiting Values In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER MIN. MAX. UN IT −0.5 +3.3 V VDDD PCF50732 Digital and Analog supplies VDD_BB VDD_VB VDD_VBOUT VDD_REF -0.5 +3.3 V VDDE1 -0.5 +3.3 V V VDDC PCF50877 Core supply voltage PCF50877 IOs supply voltage VDDE1 VDDE2 PCF50877 IOs supply voltage VDDE2 -0.5 +3.3 VI Input voltage on any pin with respect to ground (VSSx) −0.5 VDDx+0.5 V IIBBI1 PCF50732 DC current into any pin (except EARP/EARN,AUX,BUZ) -10 +10 mA IIBBI2 PCF50732 DC current into EARP/EARN, AUX, BUZ -100 +100 mA II, IO DC current into any input or output −10 +10 mA Ptot total power dissipation − 1.36 W Tstg storage temperature range −65 +150 °C Tamb operating ambient temperature range −40 +85 °C Tj operating junction temperature range − +125 °C Notes: 1. Stresses above those listed under Maximum Absolute Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other condition above those indicated in the operation section of this specification is not implied. 2. For operating at elevated temperatures, the device must be derated based on 125°C maximum junction temperature. 3. This product includes circuitry specifically designed for the protection of internal devices from damaging effects of excessive static charge. Nonetheless it is suggested that conventional precautions be taken to avoid applying any voltage larger than the rated maximum. 4. Thermal resistance for LFBGA180 package from junction to free air: Rthj-a typ. 29.5K/W. 2001 Jul 02 23 Philips Semiconductors Preliminary Specification 1.11 GSM Baseband MCP OM6353 11 Package Outline LFBGA180, 12x12mm2 LFBGA180: plastic low profile fine-pitch ball grid array package; 180 balls; body 12 x 12 x 1.05 mm B D SOT622-1 A ball A1 index area A2 E A A1 detail X C e1 v M B b e y y1 C Æw M v M A P N M e L K J H e1 G F E D C B A 1 2 3 4 5 6 7 8 9 10 11 12 13 14 X 5 0 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 b mm 1.50 0.41 0.31 1.20 0.90 0.51 0.41 OUTLINE VERSION SOT622-1 2001 Jul 02 D E 12.10 12.10 11.90 11.90 e e1 v w y y1 0.8 10.40 0.15 0.1 0.1 0.2 REFERENCES IEC JEDEC EIAJ MO-151 EUROPEAN PROJECTION ISSUE DATE 00-06-23 24 Philips Semiconductors Preliminary Specification 1.11 GSM Baseband MCP OM6353 12 Package Outline LFBGA180, 15x15 mm2 2001 Jul 02 25 Philips Semiconductors Preliminary Specification 1.11 GSM Baseband MCP OM6353 13 Soldering 13.1 Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. 13.2 Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 230 °C. 13.3 Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results: • Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. • For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. • For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. 13.4 Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. 2001 Jul 02 26 Philips Semiconductors Preliminary Specification 1.11 GSM Baseband MCP 13.5 OM6353 Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE WAVE BGA, LFBGA, SQFP, TFBGA not suitable suitable(2) HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS not PLCC(3), SO, SOJ suitable LQFP, QFP, TQFP SSOP, TSSOP, VSO REFLOW(1) suitable suitable suitable not recommended(3)(4) suitable not recommended(5) suitable Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”. 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 2001 Jul 02 27 Philips Semiconductors Preliminary Specification 1.11 GSM Baseband MCP OM6353 14 Definitions Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Application information Where application information is given, it is advisory and does not form part of the specification. 15 Life Support Applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 16 Purchase of Philips I2C Components Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011. 2001 Jul 02 28 Philips Semiconductors Preliminary Specification 1.11 GSM Baseband MCP OM6353 Printed in The Netherlands 2001 Jul 02 29