Product Specification PE4245 SPDT UltraCMOS™ RF Switch DC - 4000 MHz Product Description The PE4245 RF Switch is designed to cover a broad range of applications from near DC to 4000 MHz. This switch integrates on-board CMOS control logic with a low voltage CMOS compatible control input. Using a +3-volt nominal power supply voltage, a 1 dB compression point of +27 dBm can be achieved. The PE4245 also exhibits excellent isolation of better than 42 dB at 1000 MHz and is offered in a small 3x3 mm DFN package. Features • Single 3.0 V Power Supply • Low insertion loss: 0.6 dB at 1000 MHz, 0.7 dB at 2000 MHz • High isolation of 42 dB at 1000 MHz, 32 dB at 2000 MHz • Typical 1 dB compression of +27 dBm The PE4245 is manufactured on Peregrine’s UltraCMOS™ process, a patented variation of silicon-on-insulator (SOI) technology on a sapphire substrate, offering the performance of GaAs with the economy and integration of conventional CMOS. • Single-pin CMOS logic control • Available in a 6-lead DFN package Figure 1. Functional Diagram Figure 2. Package Type 6-lead DFN RFC RF1 RF2 CMOS Control Driver CTRL Table 1. Electrical Specifications @ +25 °C, VDD = 3 V (ZS = ZL = 50 Ω) Parameter Conditions Operation Frequency1 Insertion Loss Isolation – RFC to RF1/RF2 Isolation – RF1 to RF2 Return Loss Minimum Typical DC 1000 MHz 2000 MHz 1000 MHz 2000 MHz 1000 MHz 2000 MHz 1000 MHz 2000 MHz 39 30 34 27 21 20 0.6 0.7 42 32 36 29 23 22 Maximum Units 4000 MHz 0.75 0.85 dB dB dB dB dB dB dB dB ‘ON’ Switching Time CTRL to 0.1 dB final value, 2 GHz 200 ns ‘OFF’ Switching Time CTRL to 25 dB isolation, 2 GHz 90 ns 15 mVpp Video Feedthrough2 Input 1 dB Compression 2000 MHz 26 27 dBm Input IP3 2000 MHz, 14 dBm 43 45 dBm Notes: 1. Device linearity will begin to degrade below 10 MHz. 2. The DC transient at the output of any port of the switch when the control voltage is switched from Low to High or High to Low in a 50 Ω test set-up, measured with 1ns risetime pulses and 500 MHz bandwidth. Document No. 70-0104-06 │ www.psemi.com ©2003-2008 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 8 PE4245 Product Specification Figure 3. Pin Configuration Table 4. Absolute Maximum Ratings Symbol RF2 1 GND 2 RF1 3 6 Exposed Solder Pad - Shorted to Pin 2 (bottom side) RFC 5 CTRL 4 VDD VDD Pin No. Pin Name 1 RF2 RF2 port (Note 1) GND Ground Connection. Traces should be physically short and connected to the ground plane. This pin is connected to the exposed solder pad that also must be soldered to the ground plane for best performance. Description 3 RF1 RF1 port (Note 1) 4 VDD Nominal 3 V supply connection. CTRL CMOS logic level: High = RFC to RF1 signal path Low = RFC to RF2 signal path 5 6 RFC Notes: 1. All RF pins must be DC blocked with an external series capacitor or held at 0 VDC. Table 3. Operating Ranges Parameter Min Typ Max Units VDD Power Supply Voltage 2.7 3.0 3.3 V 250 TOP Operating temperature range -40 Control Voltage High 0.7x VDD Control Voltage Low 500 nA 85 °C Units Power supply voltage -0.3 4.0 V V VI Voltage on any input -0.3 VDD+ 0.3 TST Storage temperature range -65 150 °C PIN Input power (50Ω) 30 dBm VESD ESD voltage (Human Body Model) 1500 V Table 5. Control Logic Truth Table Control Voltage Signal Path CTRL = CMOS High RFC to RF1 CTRL = CMOS Low RFC to RF2 When handling this UltraCMOS™ device, observe the same precautions that you would use with other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the rating specified in Table 4. Latch-Up Avoidance Unlike conventional CMOS devices, UltraCMOS™ devices are immune to latch-up. V 0.3x VDD V ©2003-2008 Peregrine Semiconductor Corp. All rights reserved. Page 2 of 8 Max Electrostatic Discharge (ESD) Precautions Common RF port for switch (Note 1) IDD Power Supply Current VDD = 3V, VCTRL = 3V Min Exceeding absolute maximum ratings may cause permanent damage. Operation should be restricted to the limits in the Operating Ranges table. Operation between operating range maximum and absolute maximum for extended periods may reduce reliability. Table 2. Pin Descriptions 2 Parameter/Conditions Document No. 70-0104-06 │ UltraCMOS™ RFIC Solutions PE4245 Product Specification Typical Performance Data @ 25 °C (Unless Otherwise Noted) Figure 4. Insertion Loss - RFC to RF1 T = -40 °C to 85 °C Figure 5. Input 1dB Compression Point and IIP3 0 60 50 50 40 40 30 30 -40°C -0.3 85°C -0.9 IIP3 (dBm) -0.6 25°C -1.2 -1.5 0 800 1600 2400 3200 20 4000 0 800 Frequency (MHz) 2400 3200 20 4000 Frequency (MHz) Figure 6. Insertion Loss - RFC to RF2 T = -40 °C to 85 °C Figure 7. Isolation - RFC to RF1 0 0 -40°C -0.3 -20 -0.6 85°C -0.9 Isolation (dB) Insertion Loss (dB) 1600 1dB Compression Point (dBm) Insertion Loss (dB) 60 25°C -1.2 -40 -60 -80 -1.5 -100 0 800 1600 2400 Frequency (MHz) Document No. 70-0104-06 │ www.psemi.com 3200 4000 0 800 1600 2400 3200 4000 Frequency (MHz) ©2003-2008 Peregrine Semiconductor Corp. All rights reserved. Page 3 of 8 PE4245 Product Specification Typical Performance Data @ 25 °C Figure 8. Isolation – RFC to RF2 Figure 9. Isolation – RF1 to RF2, RF2 to RF1 0 0 -20 -40 Isolation (dB) Isolation (dB) -25 -60 -50 -75 -80 -100 -100 0 800 1600 2400 3200 4000 0 800 Frequency (MHz) 3200 4000 Figure 11. Return Loss – RF1, RF2 0 0 -10 -10 Return Loss (dB) Return Loss (dB) 2400 Frequency (MHz) Figure 10. Return Loss – RFC to RF1, RF2 -20 1600 RF1 -30 RF1 -20 RF2 -30 RF2 -40 -40 0 800 1600 2400 3200 4000 Frequency (MHz) ©2003-2008 Peregrine Semiconductor Corp. All rights reserved. Page 4 of 8 0 800 1600 2400 3200 4000 Frequency (MHz) Document No. 70-0104-06 │ UltraCMOS™ RFIC Solutions PE4245 Product Specification Evaluation Kit The SPDT Switch Evaluation Kit board was designed to ease customer evaluation of the PE4245 SPDT switch. The RF common port is connected through a 50 Ω transmission line to the top left SMA connector, J1. Port 1 and Port 2 are connected through 50 Ω transmission lines to the top two SMA connectors on the right side of the board, J2 and J3. A through transmission line connects SMA connectors J4 and J5. This transmission line can be used to estimate the loss of the PCB over the environmental conditions being evaluated. Figure 12. Evaluation Board Layouts Peregrine Specification 101/0085 The board is constructed of a two metal layer FR4 material with a total thickness of 0.031”. The bottom layer provides ground for the RF transmission lines. The transmission lines were designed using a coplanar waveguide with ground plane model using a trace width of 0.0476”, trace gaps of 0.030”, dielectric thickness of 0.028”, metal thickness of 0.0021” and εr of 4.4. J6 provides a means for controlling DC and digital inputs to the device. Starting from the lower left pin, the second pin to the right (J6-3) is connected to the device CTRL input. The fourth pin to the right (J6-7) is connected to the device VDD input. Figure 13. Evaluation Board Schematic Peregrine Specification 102/0110 Document No. 70-0104-06 │ www.psemi.com ©2003-2008 Peregrine Semiconductor Corp. All rights reserved. Page 5 of 8 PE4245 Product Specification Figure 14. Package Drawing 6-lead DFN NOTE: The exposed solder pad (on the bottom of the package) is electrically connected to pin 2 (fused.) ©2003-2008 Peregrine Semiconductor Corp. All rights reserved. Page 6 of 8 Document No. 70-0104-06 │ UltraCMOS™ RFIC Solutions PE4245 Product Specification Figure 15. Tape and Reel Specifications 6-lead DFN Table 6. Dimensions Dimension DFN 3x3 mm Ao 3.23 ± 0.1 Bo 3.17 ± 0.1 Ko 1.37 ± 0.1 P 4 ± 0.1 W 8 +0.3, -0.1 T 0.254 ± 0.02 R7 Quantity 3000 R13 Quantity N.A. Note: R7 = 7 inch Lock Reel, R13 = 13 inch Lock Reel Table 7. Ordering Information Order Code Part Marking Description Package Shipping Method 4245-51 4245 PE4245G-06DFN 3x3mm-12800F Green 6-lead 3x3 mm DFN Tape or loose 4245-52 4245 PE4245G-06DFN 3x3mm-3000C Green 6-lead 3x3 mm DFN 3000 units / T&R 4245-00 PE4245-EK PE4245-06DFN 3x3mm-EK Evaluation Kit 1 / Box Document No. 70-0104-06 │ www.psemi.com ©2003-2008 Peregrine Semiconductor Corp. All rights reserved. Page 7 of 8 PE4245 Product Specification Sales Offices The Americas North Asia Pacific Peregrine Semiconductor Corporation Peregrine Semiconductor K.K. 9380 Carroll Park Drive San Diego, CA 92121 Tel: 858-731-9400 Fax: 858-731-9499 Teikoku Hotel Tower 10B-6 1-1-1 Uchisaiwai-cho, Chiyoda-ku Tokyo 100-0011 Japan Tel: +81-3-3502-5211 Fax: +81-3-3502-5213 Europe Peregrine Semiconductor, Korea Peregrine Semiconductor Europe #B-2402, Kolon Tripolis, #210 Geumgok-dong, Bundang-gu, Seongnam-si Gyeonggi-do, 463-480 S. Korea Tel: +82-31-728-4300 Fax: +82-31-728-4305 Bâtiment Maine 13-15 rue des Quatre Vents F-92380 Garches, France Tel: +33-1-47-41-91-73 Fax : +33-1-47-41-91-73 South Asia Pacific Space and Defense Products Peregrine Semiconductor, China Americas: Shanghai, 200040, P.R. China Tel: +86-21-5836-8276 Fax: +86-21-5836-7652 Tel: 858-731-9453 Europe, Asia Pacific: 180 Rue Jean de Guiramand 13852 Aix-En-Provence Cedex 3, France Tel: +33(0) 4 4239 3361 Fax: +33(0) 4 4239 7227 For a list of representatives in your area, please refer to our Web site at: www.psemi.com Data Sheet Identification Advance Information The product is in a formative or design stage. The data sheet contains design target specifications for product development. Specifications and features may change in any manner without notice. Preliminary Specification The data sheet contains preliminary data. Additional data may be added at a later date. Peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product. Product Specification The data sheet contains final data. In the event Peregrine decides to change the specifications, Peregrine will notify customers of the intended changes by issuing a DCN (Document Change Notice). ©2003-2008 Peregrine Semiconductor Corp. All rights reserved. Page 8 of 8 The information in this data sheet is believed to be reliable. However, Peregrine assumes no liability for the use of this information. Use shall be entirely at the user’s own risk. No patent rights or licenses to any circuits described in this data sheet are implied or granted to any third party. Peregrine’s products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death might occur. Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. The Peregrine name, logo, and UTSi are registered trademarks and UltraCMOS and HaRP are trademarks of Peregrine Semiconductor Corp. Document No. 70-0104-06 │ UltraCMOS™ RFIC Solutions