19-2884; Rev 0; 7/03 KIT ATION EVALU E L B A IL AVA 2.4GHz 802.11b Zero-IF Transceiver with Integrated PA and Tx/Rx Switch Features The MAX2822 single-chip transceiver is designed for 802.11b (11Mbps) applications operating in the 2.4GHz to 2.5GHz ISM band. The transceiver includes all the circuitry required to implement an 802.11b RF-to-baseband transceiver solution, including the power amplifier, transmit/receive switch, and 50Ω matching. The fully integrated receive path, transmit path, VCO, frequency synthesis, and baseband/control interface provide all the required active RF circuitry. Only a small number of passive components are needed to form the complete radio front-end solution. The IC eliminates the need for external IF SAW and RF image-reject filters by utilizing a direct-conversion radio architecture and monolithic baseband filters for both receiver and transmitter. It is specifically optimized for 802.11b (11Mbps CCK) and 22Mbps PBCC™ applications. The baseband filtering and Rx and Tx signal paths support the CCK modulation scheme for BER = 10-5 at the required sensitivity levels. The transceiver is suitable for the full range of 802.11b data rates (1Mbps, 2Mbps, 5.5Mbps, and 11Mbps) as well as the higher-rate 22Mbps PBCC standard. The MAX2822 is available in the very small 7mm x 7mm 48lead QFN or thin QFN packages. The small solution size makes it ideal for small form-factor 802.11b applications such as PDAs, SmartPhones, and embedded modules. ♦ 2.4GHz to 2.5GHz ISM Band Operation ♦ 802.11b (11Mbps CCK and 22Mbps PBCC) PHY Compatible ♦ Integrated +17dBm PA ♦ Integrated PA Power Detector ♦ Integrated Transmit/Receive Switch ♦ Complete RF-to-Baseband Transceiver Direct Up/Down Conversion Monolithic Low-Phase-Noise VCO Integrated Baseband Lowpass Filters Integrated PLL with 3-Wire Serial Interface Digital Bias Control for PA Transmit Power Control Receive Baseband AGC Complete Baseband Interface Digital Tx/Rx Mode Control ♦ -95dBm Rx Sensitivity at 1Mbps ♦ -85dBm Rx Sensitivity at 11Mbps Applications Ordering Information 802.11b PDAs and SmartPhones ♦ Single +2.7V to +3.0V Supply ♦ 2µA Shutdown Mode ♦ Very Small 48-Pin QFN Package PART TEMP RANGE PIN-PACKAGE 802.11b Embedded Modules MAX2822EGM -40°C to +85°C 48 QFN 802.11b PC Cards, Mini-PCI Cards MAX2822ETM -40°C to +85°C 48 Thin QFN Pin Configuration/Functional Diagram appears at end of data sheet. PBCC is a trademark of Texas Instruments, Inc. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX2822 General Description MAX2822 2.4GHz 802.11b Zero-IF Transceiver with Integrated PA and Tx/Rx Switch ABSOLUTE MAXIMUM RATINGS VCC Pins to GND ...................................................-0.3V to +3.6V RF I/O: RFP, RFN (current into pin).....................................50mA Baseband Inputs: TX_BBIP, TX_BBIN, TX_BBQP, TX_BBQN to GND ..................................-0.3V to (VCC + 0.3V) Baseband Outputs: RX_BBIP, RX_BBIN, RX_BBQP, RX_BBQN to GND ..................................-0.3V to (VCC + 0.3V) Analog Inputs: RX_AGC, TX_GC, TUNE, ROSCN, ROSCP to GND ......................................-0.3V to (VCC + 0.3V) Analog Outputs: PWR_DET, CP_OUT to GND....................................................-0.3V to (VCC + 0.3V) Digital Inputs: RX_ON, TX_ON, SHDNB, CSB, SCLK, DIN, RF_GAIN, RX_1K to GND...............-0.3V to (VCC + 0.3V) Bias Voltages: RBIAS, BYP ..................................+0.9V to +1.5V Short-Circuit Duration Digital Output: DOUT ..........................10s RF Input Power ...............................................................+10dBm Continuous Power Dissipation (TA = +70°C) 48-Lead QFN (derate 27.0mW/°C above +70°C) ......2162mW Operating Temperature Range ...........................-40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +160°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC ELECTRICAL CHARACTERISTICS (MAX2822 EV kit: VCC = +2.7V to +3.0V, RF_GAIN = VIH, 0V ≤ VTX_GC ≤ +2.0V, 0V ≤ VRX_AGC ≤ +2.0V, RBIAS = 12kΩ, no input signals at RF and baseband inputs, RF I/O terminated into 50Ω though a 2:1 balun, receiver baseband outputs are open, transmitter baseband inputs biased at +1.2V, registers set to default power-up settings, TA = -40°C to +85°C, unless otherwise noted. Typical values are for VCC = +2.7V, TA = +25°C, unless otherwise noted.) (Note 1) PARAMETERS CONDITIONS Supply Voltage MIN TYP 2.7 Shutdown Current SHDNB = VIL, RX_ON = VIL, TX_ON = VIL Standby-Mode Supply Current SHDNB = VIH, RX_ON = VIL, TX_ON = VIL TA = +25°C Receive-Mode Supply Current SHDNB = VIH, RX_ON = VIH, TX_ON = VIL TA = +25°C Transmit-Mode Supply Current SHDNB = VIH, RX_ON = VIL, TX_ON = VIH, bias registers set as in Table 9 UNITS 3.0 V 2 50 µA 25 35 TA = -40°C to +85°C 40 80 TA = -40°C to +85°C 100 110 POUT = +3dBm POUT = +12dBm MAX mA mA 98 TA = +25°C 157 TA = -40°C to +85°C 175 185 POUT = +17dBm mA 220 LOGIC INPUTS: SHDNB, RX_ON, TX_ON, SCLK, DIN, CSB, RF_GAIN VCC 0.5 Digital Input Voltage High (VIH) V Digital Input Voltage Low (VIL) 0.5 V Digital Input Current High (IIH) -5 +5 µA Digital Input Current Low (IIL) -5 +5 µA LOGIC OUTPUT: DOUT Digital Output Voltage High (VOH) Sourcing 100µA Digital Output Voltage Low (VOL) Sinking 100µA VCC 0.5 V 0.5 V ANALOG OUTPUT: PWR_DET Power-Detector Output Impedance 2 400 _______________________________________________________________________________________ Ω 2.4GHz 802.11b Zero-IF Transceiver with Integrated PA and Tx/Rx Switch (MAX2822 EV kit: VCC = +2.7V to +3.0V, RF_GAIN = VIH, 0V ≤ VTX_GC ≤ +2.0V, 0V ≤ VRX_AGC ≤ +2.0V, RBIAS = 12kΩ, no input signals at RF and baseband inputs, RF I/O terminated into 50Ω though a 2:1 balun, receiver baseband outputs are open, transmitter baseband inputs biased at +1.2V, registers set to default power-up settings, TA = -40°C to +85°C, unless otherwise noted. Typical values are for VCC = +2.7V, TA = +25°C, unless otherwise noted.) (Note 1) PARAMETERS CONDITIONS MIN TYP MAX UNITS RX BASEBAND I/O RX_AGC Input Resistance 0V ≤ VRX_AGC ≤ +2.0V Rx I/Q Common-Mode Voltage Rx I/Q Output DC Offsets 3σ limit 50 kΩ 1.25 V ±15 mV TX BASEBAND I/O TX BB Input Common-Mode Range 1.0 TX BBI and BBQ Input Bias Current 1.2 1.4 V -10 µA kΩ TX BB Input Impedance Differential resistance 100 TX_GC Input Bias Current 0V ≤ VTX_GC ≤ +2.0V 10 µA TX_GC Input Impedance Resistance 250 kΩ 20 kΩ REFERENCE OSCILLATOR INPUT Reference Oscillator Input Impedance VOLTAGE REFERENCE Reference Voltage ILOAD = ±2mA 1.10 1.20 1.30 V AC ELECTRICAL CHARACTERISTICS—RECEIVE MODE (MAX2822 EV kit: VCC = +2.7V to +3.0V, fRF and fLO = 2400MHz to 2499MHz, fOSC = 22MHz or 44MHz, receive baseband output levels = 500mVP-P, VSHDNB = VRX_ON = VIH, VTX_ON = VIL, VCSB = VIH, VSCLK = VDIN = VIL, VRF_GAIN = VIH, 0V ≤ VRX_AGC ≤ +2.0V, RBIAS = 12kΩ, ICP = +2mA, BWPLL = 45kHz, registers set to default power-up settings, TA = +25°C, unless otherwise noted. Typical values are for VCC = +2.7V, fLO = 2437MHz, fOSC = 22MHz, unless otherwise noted.) (Note 2) PARAMETER CONDITIONS MIN TYP MAX UNITS 2499 MHz 2499 MHz RECEIVER CASCADED PERFORMANCE (RF INPUT TO BASEBAND OUTPUT) RF Frequency Range 2400 LO Frequency Range 2400 RF_GAIN = VIH, VRX_AGC = 0V Voltage Gain (Note 3) RF Gain Step TA = +25°C 97 TA = -40°C to +85°C 95 105 RF_GAIN = VIH, VRX_AGC = +2.0V 35 RF_GAIN = VIL, VRX_AGC = 0V 75 RF_GAIN = VIL, VRX_AGC = +2.0V 3 From RF_GAIN = VIH to RF_GAIN = VIL 32 dB dB _______________________________________________________________________________________ 3 MAX2822 DC ELECTRICAL CHARACTERISTICS (continued) MAX2822 2.4GHz 802.11b Zero-IF Transceiver with Integrated PA and Tx/Rx Switch AC ELECTRICAL CHARACTERISTICS—RECEIVE MODE (continued) (MAX2822 EV kit: VCC = +2.7V to +3.0V, fRF and fLO = 2400MHz to 2499MHz, fOSC = 22MHz or 44MHz, receive baseband output levels = 500mVP-P, VSHDNB = VRX_ON = VIH, VTX_ON = VIL, VCSB = VIH, VSCLK = VDIN = VIL, VRF_GAIN = VIH, 0V ≤ VRX_AGC ≤ +2.0V, RBIAS = 12kΩ, ICP = +2mA, BWPLL = 45kHz, registers set to default power-up settings, TA = +25°C, unless otherwise noted. Typical values are for VCC = +2.7V, fLO = 2437MHz, fOSC = 22MHz, unless otherwise noted.) (Note 2) PARAMETER CONDITIONS RF_GAIN = VIH, RX gain ≥ 80dB DSB Noise Figure (Note 4) Adjacent Channel Rejection Input Third-Order Intercept Point (Note 6) Input Second-Order Intercept Point (Note 7) LO Leakage MIN TYP MAX 5.5 6.0 RF_GAIN = VIH, RX gain = 50dB 8 RF_GAIN = VIL, RX gain = 50dB 35 RX gain = 70dB (Note 5) 45 RF_GAIN = VIH, RX gain = 80dB -13 RF_GAIN = VIL, RX gain = 50dB +19 UNITS dB dB dBm RF_GAIN = VIH, RX gain = 80dB +23 RF_GAIN = VIL, RX gain = 50dB +60 At balun input -65 dBm 15 dB MHz Input Return Loss dBm RECEIVER BASEBAND BASEBAND FILTER RESPONSE -3dB Frequency Attenuation Relative to Passband Default bandwidth setting BW(2:0) = (010) 7 At 12.5MHz 40 At 16MHz 65 At 20MHz 70 At 25MHz 85 dB BASEBAND OUTPUT CHARACTERISTICS Rx I/Q Gain Imbalance 3σ limit ±1 dB Rx I/Q Phase Quadrature Imbalance 3σ limit ±5 Degrees Rx I/Q Output 1dB Compression Differential voltage into 5kΩ 1 VP-P Rx I/Q Output THD VOUT = 500mVP-P at 5.5MHz, ZL = 5kΩ||5pF -35 dBc VRX_AGC = 0 to +2.0V 70 dB AGC Slope Peak gain slope 60 dB/V AGC Response Time 20dB gain step (80dB to 60dB), settling to ±1dB 2 µs BASEBAND AGC AMPLIFIER AGC Range 4 _______________________________________________________________________________________ 2.4GHz 802.11b Zero-IF Transceiver with Integrated PA and Tx/Rx Switch (MAX2822 EV kit, characteristics relative to RFP/RFN: VCC = +2.7V to +3.0V, fRF and fLO = 2400MHz to 2499MHz, fOSC = 22MHz or 44MHz, transmit baseband input signal: 500mVP-P at 5.5MHz, VSHDNB = VRX_ON = VIL, VTX_ON = VIH, VCSB = VIH, VSCLK = VDIN = VIL, VRF_GAIN = VIH, 0V ≤ VTX_AGC ≤ +2.0V, RBIAS = 12kΩ, ICP = +2mA, BWPLL = 45kHz, baseband inputs DC biased to +1.2V, registers set to default power-up settings, measurements taken within 1s of TXON rising edge, TA = +25°C, unless otherwise noted. Typical values are for VCC = +2.7V, fLO = 2437MHz, fOSC = 22MHz, unless otherwise noted.) (Note 2) PARAMETER CONDITIONS MIN TYP MAX UNITS TRANSMIT SIGNAL PATH: BASEBAND INPUT TO RF OUTPUT RF Output Frequency Range 2400 2499 MHz LO Output Frequency Range 2400 2499 MHz 11Mbps CCK signal, ACPR (adj) ≤ -30dBc, ACPR (alt) ≤ -50dBc (Note 4) Tx RF Output Power TA = +25°C +16.5 TA = -40°C to +85°C +15.5 +17.5 dBm Adjacent (adj): -22MHz ≤ fOFFSET ≤ -11MHz, 11MHz ≤ fOFFSET ≤ 22MHz, POUT = +16.5dBm -33 Tx RF ACPR (Note 8) dBc Alternate (alt): -33MHz ≤ fOFFSET < -22MHz, 22MHz < fOFFSET ≤ 33MHz, POUT = +16.5dBm In-Band Spurious Signals Relative to Carrier Tx RF Harmonics -56 fRF = 2400MHz to 2483MHz (Note 9) Unwanted sideband -40 LO signal -30 Spurs > ±22MHz -80 11Mbps CCK at +16.5dBm 2 × fRF -45 3 × fRF -30 < 2400MHz -50 2500MHz to 3350MHz -35 dBc dBm Tx RF Spurious Signal Emissions (Outside 2400MHz to 2483.5MHz) Nonharmonic Signals > 3350MHz -40 Tx RF Output Noise fOFFSET ≥ 22MHz, 0V ≤ VTX_GC ≤ +2.0V -125 dBm/Hz Tx RF Output Return Loss 100Ω balanced output impedance, POUT = +17dBm 10 dB 10 MHz dBm Tx BASEBAND FILTER RESPONSE -3dB Frequency Attenuation Relative to Passband At 22MHz 25 At 44MHz 50 dB Tx GAIN-CONTROL CHARACTERISTICS Gain-Control Range 0V ≤ VTX_GC ≤ +2.0V 20 dB Gain-Control Slope Peak gain slope 30 dB/V Gain-Control Response Time VTX_GC = +2.0V to 0V step, settled to within ±1dB 0.3 µs _______________________________________________________________________________________ 5 MAX2822 AC ELECTRICAL CHARACTERISTICS—TRANSMIT MODE MAX2822 2.4GHz 802.11b Zero-IF Transceiver with Integrated PA and Tx/Rx Switch AC ELECTRICAL CHARACTERISTICS—TRANSMIT MODE (continued) (MAX2822 EV kit, characteristics relative to RFP/RFN: VCC = +2.7V to +3.0V, fRF and fLO = 2400MHz to 2499MHz, fOSC = 22MHz or 44MHz, transmit baseband input signal: 500mVP-P at 5.5MHz, VSHDNB = VRX_ON = VIL, VTX_ON = VIH, VCSB = VIH, VSCLK = VDIN = VIL, VRF_GAIN = VIH, 0V ≤ VTX_AGC ≤ +2.0V, RBIAS = 12kΩ, ICP = +2mA, BWPLL = 45kHz, baseband inputs DC biased to +1.2V, registers set to default power-up settings, measurements taken within 1s of TXON rising edge, TA = +25°C, unless otherwise noted. Typical values are for VCC = +2.7V, fLO = 2437MHz, fOSC = 22MHz, unless otherwise noted.) (Note 2) PARAMETER CONDITIONS MIN TYP MAX UNITS POWER DETECTOR Power-Detection Range 0.1V ≤ VPWR_DET ≤ 1.5V 17 POUT = +3dBm ±0.7 POUT = +17dBm ±0.5 Power-Detection Error (3σ Limit) Fixed VPWR_DET, TA = +25°C Power-Detection Error Variation with Temperature TA = -40°C to +85°C, relative to TA = +25°C dB dB ±0.3 dB AC ELECTRICAL CHARACTERISTICS—SYNTHESIZER (MAX2822 EV kit: VCC = +2.7V to +3.0V, fRF and fLO = 2400MHz to 2499MHz, fOSC = 22MHz or 44MHz, SHDNB = VIH, CSB = VIH, RBIAS = 12kΩ, ICP = +2mA, BWPLL = 45kHz, registers set to default power-up settings, TA = +25°C, unless otherwise noted. Typical values are for VCC = +2.7V, fLO = 2437MHz, fOSC = 22MHz, unless otherwise noted.) (Note 2) PARAMETER CONDITIONS MIN TYP MAX UNITS 2499 MHz FREQUENCY SYNTHESIZER LO Frequency Range Reference Frequency 2400 SYNTH:R(0) = 0 22 SYNTH:R(0) = 1 44 Minimum Channel Spacing Charge-Pump Output Current Charge-Pump Compliance Range Reference Spur Level (Note 10) 1 MHz ±2 mA VCC 0.4 0.4 -11MHz ≤ fOFFSET ≤ 11MHz -41 -22MHz ≤ fOFFSET < -11MHz, 11MHz < fOFFSET ≤ 22MHz -75 fOFFSET < -22MHz, fOFFSET > 22MHz -90 fOFFSET = 10kHz -80 fOFFSET = 100kHz -87 Closed-Loop Integrated Phase Noise Noise integrated from 100Hz to 10MHz, measured at the TX_RF output 2.5 Reference Oscillator Input Level AC-coupled sine wave input 200 fLO = 2400MHz 0.4 Closed-Loop Phase Noise MHz 300 V dBc dBc/Hz °RMS 500 mVP-P VOLTAGE-CONTROLLED OSCILLATOR VCO Tuning Voltage Range VCO Tuning Gain 6 fLO = 2499MHz fLO = 2400MHz fLO = 2499MHz 2.3 170 130 _______________________________________________________________________________________ V MHz/V 2.4GHz 802.11b Zero-IF Transceiver with Integrated PA and Tx/Rx Switch (MAX2822 EV kit: VCC = +2.7V to +3.0V, fRF and fLO = 2400MHz to 2499MHz, fOSC = 22MHz or 44MHz, SHDNB = VIH, CSB = VIH, RBIAS = 12kΩ, ICP = +2mA, BWPLL = 45kHz, registers set to default power-up settings, TA = +25°C, unless otherwise noted. Typical values are for VCC = +2.7V, fLO = 2437MHz, fOSC = 22MHz, unless otherwise noted.) (Note 2) PARAMETER Channel-Switching Time CONDITIONS MIN fLO = 2400MHz ↔ 2499MHz, fLO settles to ±10kHz (Note 11) TYP MAX UNITS 150 200 µs Rx to Tx, fLO settles to within ±30kHz, relative to the rising edge of TX_ON 5 Tx to Rx, fLO settles to within ±30kHz, relative to the rising edge of RX_ON 10 Standby-to-Receive Mode Standby to Rx, fLO settles to within ±30kHz, relative to the rising edge of RX_ON 10 µs Standby-to-Transmit Mode Standby to Tx, fLO settles to within ±30kHz, relative to the rising edge of TX_ON 5 µs µs Rx/Tx Turnaround Time AC ELECTRICAL CHARACTERISTICS—SERIAL INTERFACE TIMING (MAX2822 EV kit: VCC = +2.7V to +3.0V, registers set to default power-up settings, TA = +25°C, unless otherwise noted.) (Note 2) PARAMETER CONDITIONS MIN TYP MAX UNITS SERIAL INTERFACE TIMING (SEE FIGURE 1) tCSO SCLK rising edge to CSB falling edge wait time 5 ns tCSS Falling edge of CSB to rising edge of first SCLK time 5 ns tDS Data-to-serial clock setup time 5 ns tDH Data-to-clock hold time 10 ns tCH Serial clock pulse-width high 10 ns tCL Clock pulse-width low 10 ns tCSH Last SCLK rising edge to rising edge of CSB 5 ns tCSW CSB high pulse width 10 ns tCS1 Time between the rising edge of CSB and the next rising edge of SCLK 5 ns fCLK Clock frequency 50 MHz Parameters are production tested at +25°C only. Min/max limits over temperature are guaranteed by design and characterization. Guaranteed by design and characterization. Defined as the baseband differential RMS output voltage divided by the RMS input voltage (at the RF balun input). Specification excludes the loss of the external balun. The external balun loss is typically ~0.5dB. CCK interferer at 25MHz offset. Desired signal equals -73dBm. Interferer amplitude increases until baseband output from interferer is 10dB below desired signal. Adjacent channel rejection = PINTERFERER - PDESIRED . Note 6: Measured at balun input. Two CW tones at -43dBm with 15MHz and 25MHz offset from the MAX2822 channel frequency. IP3 is computed from 5MHz IMD3 product measured at the Rx I/Q output. Note 7: Two CW interferers at -38dBm with 24.5MHz and 25.5MHz offset from the MAX2822 channel frequency. IP2 is computed from the 1MHz IMD2 product measured at the RX I/Q output. Note 8: VTXGC adjusted for +16.5dBm output power; adjacent and alternate channel power relative to the desired signal. Power measured with 100kHz video BW and 100kHz resolution BW. Note 9: CW tone at 2.25MHz offset from carrier with VTXGC set for maximum modulated POUT at -30dBc/-50dBc (ADJ/ALT) ACPR limits. Unwanted sideband refers to suppressed image resulting from I/Q baseband input tones. Note 10: Relative amplitude of reference spurious products appearing in the Tx RF output spectrum relative to a CW tone at 2.25MHz offset from the LO. Note 11: Time required to reprogram the PLL, change the operating channel, and wait for the operating channel center frequency to settle within ±10kHz of the nominal (final) channel frequency. Note 1: Note 2: Note 3: Note 4: Note 5: _______________________________________________________________________________________ 7 MAX2822 AC ELECTRICAL CHARACTERISTICS—SYSTEM TIMING 2.4GHz 802.11b Zero-IF Transceiver with Integrated PA and Tx/Rx Switch MAX2822 Typical Operating Characteristics (MAX2822 EV kit, VCC = +2.7V, fBB = 1MHz, fLO = 2437MHz, receive baseband outputs = 500mVP-P, transmit baseband inputs = 400mVP-P, ICP = +2mA, BWPLL = 45kHz, differential RF input/output matched to 50Ω through a balun, baseband input biased at +1.2V, registers set to default power-up settings, TA = +25°C, unless otherwise noted.) 240 70 230 50 210 50 40 200 30 190 180 20 180 170 10 200 30 190 20 160 STBY 0 2.70 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 2.75 2.80 RECEIVER GAIN vs. GAIN-CONTROL VOLTAGE 60 LNA LOW GAIN 40 LNA HIGH GAIN 20 VRX_AGC = 2.0V 20 15 6 8 10 12 14 16 18 20 RECEIVER NOISE FIGURE vs. GAIN fBB = 2.25MHz fLO = 2437MHz 45 LOW-GAIN LNA 40 35 30 25 20 15 10 HIGH-GAIN LNA 10 LOW-GAIN LNA 5 0 2420 2400 2440 2460 2480 2500 0 10 20 30 40 50 60 70 80 90 100 110 FREQUENCY (MHz) RX GAIN (dB) RECEIVER BLOCKER REJECTION vs. RF FREQUENCY RECEIVER BLOCKER REJECTION vs. CARRIER OFFSET RECEIVER FILTER RESPONSE (1kHz TO 1MHz) 2LO/3 LO/2 GAIN = 80dB PINT (MAX) FOR SNR DEGRADED TO 10dB (PER = 8%) -20 -30 -40 -50 GAIN = 80dB PINT (MAX) FOR SNR DEGRADED TO 10dB (PER = 8%) -60 -70 RF FREQUENCY (MHz) 0 -10 -20 RX_1K = VIH -30 -40 RX_1K = VIL -50 -60 -70 -80 -90 -80 800 1000 1200 1400 1600 1800 2000 2200 2400 MAX2822 toc09 -10 10 NORMALIZED RESPONSE (dB) 0 MAX2822 toc07 LO/3 INTERFERER LEVEL (dBm) INTERFERER LEVEL (dBm) 4 VRX_AGC (V) -60 8 2 50 0 -20 -50 -4 -2 0 OUTPUT POWER (dBm) 25 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 -10 -40 +3dBm APPLICATION 30 5 10 -30 80 HIGH-GAIN LNA 0 0 160 3.00 35 10 0 +12dBm APPLICATION 120 NOISE FIGURE (dB) 70 30 140 100 MAX2822 toc08 RECEIVER GAIN (dB) 80 50 2.95 160 170 40 RX GAIN, HIGH-GAIN LNA (dB) 90 2.90 +17dBm APPLICATION 180 RECEIVER VOLTAGE GAIN vs. FREQUENCY MAX2822 toc04 VOUT = 500mVP-P fBB = 1MHz fLO = 2437MHz 100 2.85 200 VCC (V) TEMPERATURE (°C) 110 220 TX, FIXED, POUT = +17dBm 210 40 0 60 TRACES END AT LINEARITY LIMITS (-30dBc/-50dBc) MAX2822 toc06 220 RX, LNA LOW GAIN ICC (mA) 80 RX, LNA HIGH GAIN TX ICC (mA) 240 60 STBY 220 90 230 10 250 250 70 TX (POUT = +17dBm) 240 MAX2822 toc05 RX AND STBY ICC (mA) 80 RX, LNA HIGH GAIN 260 100 RX AND STBY ICC (mA) RX, LNA LOW GAIN 90 SUPPLY CURRENT vs. TX OUTPUT POWER MAX2822 toc02 260 TX ICC (mA) MAX2822 toc01 MAX2822 toc03 SUPPLY CURRENT vs. SUPPLY VOLTAGE SUPPLY CURRENT vs. TEMPERATURE 100 10 15 20 25 30 35 40 OFFSET FROM CARRIER (MHz) 45 50 1 10 100 FREQUENCY (kHz) _______________________________________________________________________________________ 1000 2.4GHz 802.11b Zero-IF Transceiver with Integrated PA and Tx/Rx Switch (MAX2822 EV kit, VCC = +2.7V, fBB = 1MHz, fLO = 2437MHz, receive baseband outputs = 500mVP-P, transmit baseband inputs = 400mVP-P, ICP = +2mA, BWPLL = 45kHz, differential RF input/output matched to 50Ω through a balun, baseband input biased at +1.2V, registers set to default power-up settings, TA = +25°C, unless otherwise noted.) -30 -40 -50 -60 -50 -60 -70 -80 -70 -90 -80 -100 1 -30 -40 -50 -60 1 2 3 4 5 6 7 8 0 5 10 15 20 25 30 35 FREQUENCY (MHz) FREQUENCY (GHz) BB FREQUENCY (MHz) RECEIVER BASEBAND OUTPUT SPECTRUM (MODULATED) TRANSMITTER OUTPUT POWER vs. SUPPLY VOLTAGE TRANSMITTER OUTPUT POWER vs. FREQUENCY SIGNAL APPLIED -60 -70 NO SIGNAL APPLIED 17 16 TA = +85°C 15 14 VIN = 400mVP-P 802.11b SIGNAL VTX_GC FOR +17.0dBm OUTPUT POWER AT 2437MHz, +25°C 13 12 -80 0 5 10 15 20 25 30 35 2.75 2.88 ACPR vs. OUTPUT POWER +12dBm APP. -50 802.11b SPEC LIMITS -32 -52 -34 ALT -54 ALT ALT -36 -56 -38 -58 -60 ADJ ADJ -42 -62 0 2 2.90 2.95 4 6 8 10 12 14 16 18 20 OUTPUT POWER (dBm) MAX2822 toc15 TA = +25°C 16.5 16.0 15.5 TA = +85°C 15.0 3.00 VIN = 400mVP-P 802.11b SIGNAL VTX_GC FOR +17.0dBm OUTPUT POWER AT 2437MHz, +25°C 2400 2420 2440 2460 2480 RF FREQUENCY (MHz) TRANSMITTER OUTPUT SPECTRUM TRANSMITTER GAIN vs. GAIN-CONTROL VOLTAGE fLO = 2437MHz fBB = 1MHz RBW = 100kHz 0 -10 -20 -30 -40 -50 -60 ADJ -40 2.85 10 -48 17.0 14.5 20 POWER (dBm) -28 -30 -46 +17dBm APP. ACPR, ALTERNATE (dBc) +3dBm APP. TA = -40°C 17.5 VCC (V) BB FREQUENCY (MHz) -26 18.0 14.0 2.70 40 MAX2822 toc16 MAX2822 toc14 TA = +25°C 18.5 -70 5 2500 MAX2822 toc18 -50 18 TRANSMITTER OUTPUT POWER (dBm) -40 TA = -40°C 40 19.0 NORMALIZED TRANSMITTER GAIN (dB) -30 19 MAX2822 toc17 -20 TRANSMITTER OUTPUT POWER (dBm) POUT IS 50Ω REFERRED (SINGLE ENDED) RX GAIN = 50dB RBW = 100kHz fLO = 2437MHz LNA HIGH GAIN -10 20 MAX2822 toc13 0 ACPR, ADJACENT (dBc) -20 -80 0 100 10 POUT IS 50Ω REFERRED (SINGLE ENDED) RBW = 100kHz fLO = 2437MHz LNA HIGH GAIN -10 -70 -110 -90 BASEBAND OUTPUT POWER (dBm) -40 0 BASEBAND OUTPUT POWER (dBm) -30 f-3dB = 7.5MHz MAX2811 toc11 f-3dB = 8.5MHz POUT IS 50Ω REFERRED (SINGLE ENDED) RBW = 100kHz fLO = 2437MHz LNA HIGH GAIN -20 LEAKAGE POWER (dBm) NORMALIZED RESPONSE (dB) 0 -20 -10 MAX2822 toc10 10 -10 RECEIVER BASEBAND OUTPUT SPECTRUM (SINGLE TONE) RECEIVER LEAKAGE SPECTRUM MAX2822 toc12 RECEIVER FILTER RESPONSE (1MHz TO 100MHz) 0 -5 TA = +85°C TA = +25°C -10 TA = -40°C -15 -20 -25 NORMALIZED TO +25°C VTX_GC = 0V -30 -80 0 1 2 3 4 5 FREQUENCY (GHz) 6 7 8 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 VTX_GC (V) _______________________________________________________________________________________ 9 MAX2822 Typical Operating Characteristics (continued) Typical Operating Characteristics (continued) (MAX2822 EV kit, VCC = +2.7V, fBB = 1MHz, fLO = 2437MHz, receive baseband outputs = 500mVP-P, transmit baseband inputs = 400mVP-P, ICP = +2mA, BWPLL = 45kHz, differential RF input/output matched to 50Ω through a balun, baseband input biased at +1.2V, registers set to default power-up settings, TA = +25°C, unless otherwise noted.) 2.60 -15 -20 -25 -30 -35 -40°C 2.50 2.45 +25°C 2.40 +85°C 2.35 -60 -70 -80 -90 -100 -45 2.25 -110 -50 2.20 10 15 20 25 30 35 40 45 50 1.5 2.0 2.5 1 10 100 1000 VCO/PLL SETTING TIME RX/TX TURNAROUND TIME PA POWER-DETECTOR OUTPUT VOLTAGE vs. OUTPUT POWER FREQUENCY ERROR (kHz) 10 0 -10 -20 30 20 10 0 -10 -20 -30 -30 -40 -40 -50 -50 40 80 120 160 200 240 280 320 360 400 TIME (µs) TRIGGERED ON RISING EDGE OF TXON SYNTHESIZER SETTINGS DO NOT CHANGE 40 2.0 MODULATED BASEBAND INPUT SIGNAL 1.8 DETECTOR OUTPUT VOLTAGE (V) 50 1.6 MAX2822 toc24 fOFFSET (kHz) 20 0 1.0 VTUNE (V) BWLOOP = 45kHz fLO = 2499MHz TO 2400MHz 30 0.5 BASEBAND FREQUENCY (MHz) 50 40 -120 0 MAX2822 toc23 5 MAX2822 toc22 0 fOSC = 2437MHz ICP = 2mA PLL BW = 45kHz TTL INTEGRATED PHASE NOISE = 2.0°RMS -50 2.30 -40 10 -40 PHASE NOISE (dBc/Hz) 2.55 -10 LO FREQUENCY (GHz) NORMALIZED RESPONSE (dB) -5 2.65 MAX2822 toc20 NORMALIZED TO 1MHz 0 MAX2822 toc19 5 SYNTHESIZER CLOSED-LOOP PHASE NOISE LO FREQUENCY vs. TUNING VOLTAGE MAX2822 toc21 TRANSMITTER BASEBAND FILTER RESPONSE FREQUENCY ERROR (kHz) MAX2822 2.4GHz 802.11b Zero-IF Transceiver with Integrated PA and Tx/Rx Switch 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 0 2 4 6 8 10 12 14 16 18 20 TIME (µs) 0 2 4 6 8 10 12 14 16 18 20 OUTPUT POWER (dBm) ______________________________________________________________________________________ 2.4GHz 802.11b Zero-IF Transceiver with Integrated PA and Tx/Rx Switch VCC_LNA RX_AGC TX_ON VCC_RMX RX_ON VCC_BUF N.C. RX_BBIP RX_BBIN RX_BBQN RX_BBQP RX_1K DOUT 48 47 46 45 44 43 42 41 40 39 38 37 PROGRAMMING AND MODE CONTROL 1 36 SHDNB 35 VCC_RXF VREF 2 RF_GAIN VCC_REF 4 GND 5 RFP 6 RFN 34 VCC_LO 3 INPUT MATCH 33 VCC_VCO 32 BYP MAX2822 T/R SWITCH 90 31 TUNE 0 30 GND_VCO 7 GND 8 VCC_PA 9 OUTPUT MATCH PWR DET 90 INTEGER-N SYNTHESIZER 0 29 GND_CP PWR_DET 28 CP_OUT VCC_DRVR 10 27 VCC_CP ∑ VOS COMP SERIAL INTERFACE BIAS 11 26 CSB 25 SCLK 13 14 15 16 17 18 19 20 21 22 23 24 VCC_TMX TX_BBIN TX_BBIP TX_BBQP TX_BBQN VCC_TXF GND_DIG VCC_DIG PWR_DET ROSCP ROSCN DIN TX_GC 12 ______________________________________________________________________________________ 11 MAX2822 Pin Configuration/Functional Diagram 2.4GHz 802.11b Zero-IF Transceiver with Integrated PA and Tx/Rx Switch MAX2822 Pin Description PIN NAME FUNCTION 1 VCC_LNA Supply Voltage Connection for LNA. Bypass with a capacitor as close to the pin as possible. Do not share the bypass capacitor ground vias with other branches. 2 VREF 3 RF_GAIN LNA Gain-Select Logic Input. Logic high for LNA high-gain mode, logic low for LNA low-gain mode. 4 VCC_REF Supply Voltage for Bias Circuitry and Autotuner. Bypass with a capacitor as close to the pin as possible. Do not share the bypass capacitor ground vias with other branches. 5, 8 GND Ground 6 RFP RF Balanced I/O Port (Positive). On-chip matched for 100Ω balanced. 7 RFN 9 VCC_PA 10 11 Voltage Reference Output for Baseband IC. Requires external RF bypass to GND. RF Balanced I/O Port (Negative). On-chip matched for 100Ω balanced. Supply Voltage Connection for Power Amplifier. Requires external RF bypass to GND. VCC_DRVR Supply Voltage Connection for PA Driver. Requires external RF bypass to GND. BIAS Precision Bias Resistor Pin. Connect a 12kΩ precision resistor (≤ 2%) to GND. Transmit Gain-Control Input. Analog high-impedance input. Connect directly to baseband IC DAC output. See Figure 3 for transmitter gain vs. gain-control voltage. 12 TX_GC 13 VCC_TMX Supply Voltage for Transmit Mixer and VGA. Bypass with a capacitor as close to the pin as possible. Do not share the bypass capacitor ground vias with other branches. 14 TX_BBIN Transmit Negative In-Phase Baseband Input. Analog high-impedance differential input. Connect directly to baseband IC DAC voltage output. Requires a 1.2V common-mode voltage. 15 TX_BBIP Transmit Positive In-Phase Baseband Input. Analog high-impedance differential input. Connect directly to baseband IC DAC voltage output. Requires a 1.2V common-mode voltage. 16 TX_BBQP Transmit Positive Quadrature Baseband Input. Analog high-impedance differential input. Connect directly to baseband IC DAC voltage output. Requires a 1.2V common-mode voltage. 17 TX_BBQN Transmit Negative Quadrature Baseband Input. Analog high-impedance differential input. Connect directly to baseband IC DAC voltage output. Requires a 1.2V common-mode voltage. 18 VCC_TXF Supply Voltage for Transmit Baseband Filter. Bypass with capacitor as close to the pin as possible. Do not share the bypass capacitor ground vias with other branches. 19 GND_DIG Digital Ground 20 VCC_DIG Supply Voltage for Digital Circuitry. Bypass with capacitor as close to the pin as possible. Do not share the bypass capacitor ground vias with other branches. 21 PWR_DET Transmitter Power-Detector Output 22 ROSCP Reference Oscillator Positive Input. Analog high-impedance differential input. DC-coupled. Requires external AC-coupling. Connect an external reference oscillator to this analog input. 23 ROSCN Reference Oscillator Negative Input. Analog high-impedance differential input. DC-coupled. Requires external AC-coupling. Bypass this analog input to ground with capacitor for single-ended operation. 24 DIN 25 SCLK 3-Wire Serial Interface Data Input. Digital high-impedance input. Connect directly to baseband IC serial interface CMOS output (SPI™/QSPI™/MICROWIRE™ compatible). 3-Wire Serial Interface Clock Input. Digital high-impedance input. Connect this digital input directly to baseband IC serial interface CMOS output (SPI/QSPI/MICROWIRE compatible). SPI and QSPI are trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp. 12 ______________________________________________________________________________________ 2.4GHz 802.11b Zero-IF Transceiver with Integrated PA and Tx/Rx Switch PIN NAME FUNCTION 26 CSB 3-Wire Serial Interface Enable Input. Digital high-impedance input. Connect directly to baseband IC serial interface CMOS output (SPI/QSPI/MICROWIRE compatible). 27 VCC_CP Supply Voltage for PLL Charge Pump. Bypass with capacitor as close to the pin as possible. Do not share the bypass capacitor ground vias with other branches. 28 CP_OUT PLL Charge-Pump Output. Analog high-impedance output. Current source. Connect directly to the PLL loop filter input. 29 GND_CP PLL Charge-Pump Ground. Connect to PC board ground plane. 30 GND_VCO 31 TUNE 32 BYP 33 VCC_VCO 34 VCC_LO Supply Voltage for VCO, LO Buffers, and LO Quadrature Circuitry. Bypass with capacitor as close to the pin as possible. Do not share the bypass capacitor ground vias with other branches. 35 VCC_RXF Supply Voltage for Receiver Baseband Filter. Bypass with capacitor as close to the pin as possible. Do not share the bypass capacitor ground vias with other branches. 36 SHDNB Active-Low Shutdown Input. Digital high-impedance CMOS input. Connect directly to baseband IC modecontrol CMOS output. Logic low to disable all device functions. Logic high to enable normal chip operation. 37 DOUT Serial Interface Data Output. Digital CMOS output. Optional connection. 38 RX_1K Receiver 1kHz Highpass Bandwidth Control. Digital CMOS input. Connect directly to baseband IC CMOS output. Controls receiver baseband highpass -3dB corner frequency; logic low for 10kHz, logic high for 1kHz. See the Applications Information section for proper use of this function. 39 RX_BBQP Receive Positive Quadrature Baseband Output. Analog low-impedance differential buffer output. Connect output directly to baseband ADC input. Internally biased to 1.2V common-mode voltage and can drive loads up to 5kΩ || 5pF. 40 RX_BBQN Receive Negative Quadrature Baseband Output. Analog low-impedance differential buffer output. Connect output directly to baseband ADC input. Internally biased to 1.2V common-mode voltage and can drive loads up to 5kΩ || 5pF. 41 RX_BBIN Receive Negative In-Phase Baseband Output. Analog low-impedance differential buffer output. Connect output directly to baseband ADC input. Internally biased to 1.2V common-mode voltage and can drive loads up to 5kΩ || 5pF. 42 RX_BBIP Receive Positive In-Phase Baseband Output. Analog low-impedance differential buffer output. Connect output directly to baseband ADC input. Internally biased to 1.2V and can drive loads up to 5kΩ || 5pF. 43 N.C. 44 VCC_BUF VCO Ground. Connect to PC board ground plane. VCO Frequency Tuning Input. Analog high-impedance voltage input. Connect directly to the PLL loop filter output. VCO Bias Bypass. Bypass with a 2000pF capacitor to ground. Supply Voltage for VCO. Bypass with capacitor as close to the pin as possible. Do not share the bypass capacitor ground vias with other branches. Important note: Operate from separate regulated supply voltage. No Connection. Make no connections to this pin. Supply Voltage for Receiver Baseband Buffer. Bypass with capacitor as close to the pin as possible. Do not share the bypass capacitor ground vias with other branches. ______________________________________________________________________________________ 13 MAX2822 Pin Description (continued) 2.4GHz 802.11b Zero-IF Transceiver with Integrated PA and Tx/Rx Switch MAX2822 Pin Description (continued) PIN NAME 45 RX_ON 46 VCC_RMX 47 TX_ON 48 RX_AGC Exposed Paddle GND FUNCTION Receiver-On Control Input. Digital CMOS input. Connect to baseband IC mode-control CMOS output. Supply Voltage for Receiver Downconverter. Bypass with capacitor as close to the pin as possible. Do not share the bypass capacitor ground vias with other branches. Transmitter-On Control Input. Digital CMOS input. Connect directly to baseband IC mode-control CMOS output. Receive AGC Control. Analog high-impedance input. Connect directly to baseband IC DAC voltage output. See Figure 2 for gain vs. VRX_AGC. DC and AC Ground Return for IC. Connect to PC board ground plane using multiple vias. Table 1. Operating Mode Truth Table OPERATING MODE MODE-CONTROL INPUTS SHDNB TX_ON RX_ON RX_PATH TX_PATH PLL/VCO/LO GEN Shutdown 0 X X OFF OFF OFF Standby 1 0 0 OFF OFF ON Receive 1 0 1 ON OFF ON Transmit 1 1 0 OFF ON ON Not Allowed 1 1 1 — — — Detailed Description Operating Modes The MAX2822 has four primary modes of operation: shutdown, standby, receive active, and transmit active. The modes are controlled by the digital inputs SHDNB, TX_ON, and RX_ON. Table 1 shows the operating mode vs. the digital mode-control inputs. Shutdown Mode Shutdown mode is enabled by driving SHDNB low. In shutdown mode, all circuit blocks are powered down, except for the serial interface circuitry. While the device is in shutdown, the serial interface registers can still be loaded by applying VCC to the digital supply voltage (VCC_DIG). All previously programmed register values are preserved during the shutdown mode, as long as VCC_DIG is applied. Standby Mode Standby mode is achieved by driving SHDNB high, and RX_ON and TX_ON low. In standby mode, the PLL, VCO, LO generation circuitry, and filter autotuner are powered on by default. The standby mode is intended to provide time for the slower-settling circuitry (PLL and autotuner) to turn on and settle to the correct frequency before making Rx or Tx active. The 3-wire serial inter14 CIRCUIT BLOCK STATES face is active and can load register values at any time. Refer to the serial interface specifications for details. Receive Mode Receive mode is enabled by driving SHDNB high, RX_ON high, and TX_ON low. In receive mode, all receive circuit blocks are powered on and all VCO, PLL, and autotuner circuits are powered on. None of the transmit path blocks are active in this mode. Although the receiver blocks turn on quickly, the DC offset nulling requires ~10µs to settle. The receiver signal path is ready ~10µs after a low-to-high transition on RX_ON. Transmit Mode Transmit mode is enabled by driving the digital inputs SHDNB high, RX_ON low, and TX_ON high. In transmit mode, all transmit circuit blocks are powered on and all VCO, PLL, and autotuner circuits are powered on. None of the receive path blocks are active in this mode. Although the transmitter blocks turn on quickly, the baseband DC offset calibration requires ~2.2µs to complete. In addition, the Tx driver amplifier is ramped from the low-gain state (minimum RF output) to highgain state (peak RF output) over the next 1µs to 2µs. Also, the LO takes a few microseconds after TX_ON rises to resettle. The transmit signal path is ready ~5µs after a low-to-high transition on TX_ON. ______________________________________________________________________________________ 2.4GHz 802.11b Zero-IF Transceiver with Integrated PA and Tx/Rx Switch The MAX2822 contains programmable registers to control various modes of operation for the major circuit blocks. The registers can be programmed through the 3-wire SPI/QSPI/MICROWIRE-compatible serial port. The MAX2822 includes five programmable registers: 1) Block-enable register 2) Synthesizer register 3) Channel frequency register 4) Receiver settings register 5) Transmitter settings register Each register consists of 16 bits. The four most significant bits (MSBs) are the register’s address. The twelve least significant bits (LSBs) are used for register data. Table 2 summarizes the register configuration. A detailed description of each register is provided in Tables 4–8. Data bits are shifted in the MSB first. The data sent to the MAX2822, in 16-bit words, is framed by CSB. When CSB is low, the clock is active and data is shifted with the rising edge of the clock. When CSB transitions to high, the shift register is latched into the register selected by the contents of the address bits. Only the last 16 bits shifted into the MAX2822 are retained in the shift register. No check is made on the number of clock pulses. Figure 1 documents the serial interface timing for the MAX2822. Power-Up Default States The MAX2822 provides power-up loading of default states for each of the registers. The states are loaded on a VCC_DIG supply voltage transition from 0V to V CC . The default values are retained until reprogrammed through the serial interface or the power-supply voltage is taken to 0V. The default state of each register is described in Table 3. Note: Putting the IC in shutdown mode does not change the contents of the programming registers. Block-Enable Register The block-enable register permits individual control of the enable state for each major circuit block in the MAX2822. The actual enable condition of the circuit block is a logical function of the block-enable bit setting and other control input states. Table 4 documents the logical definition of state for each major circuit block. Synthesizer Register The synthesizer register (SYNTH) controls the reference frequency divider and charge-pump current of the PLL. See Table 5 for a description of the bit settings. Channel Frequency Register The channel frequency register (CHANNEL) sets the RF carrier frequency for the MAX2822. The channel is programmed as a number from 0 to 99. The actual frequency is 2400 + channel in MHz. The default setting is 37 for 2437MHz. See Table 6 for a description of the bit settings. CSB tCSW tCSO tCSH tCSS SCLK tDS tCH tDH tCS1 tCL DIN BIT 1 BIT 2 BIT 6 BIT 7 BIT 8 BIT 14 BIT 15 BIT 16 tDV tTR tDO DOUT BIT 1 BIT 2 BIT 6 BIT 7 BIT 8 BIT 14 BIT 15 BIT 16 Figure 1. MAX2822 Serial Interface Timing Diagram ______________________________________________________________________________________ 15 MAX2822 Programmable Registers MAX2822 2.4GHz 802.11b Zero-IF Transceiver with Integrated PA and Tx/Rx Switch Receiver Settings Register Transmitter Settings Register The receiver settings register (RECEIVE) controls the receive filter -3dB corner frequency and VGA DC offset nulling parameters. The defaults are intended to provide proper operation. However, the filter frequency and detector can be modified if desired. Do not reprogram VGA DC offset nulling parameters. These settings were optimized during development. See Table 7 for a description of the bit settings. The transmitter settings register (TRANSMIT) provides a 6-bit digital control of the PA bias and 1-bit enable for the transmit power detector. Bits D0:D3 control the PA output stage bias current (0000 lowest, 1111 highest) and PA driver stage bias current (00 lowest, 11 highest). The appropriate values vs. target output power are given in Table 9. The detector enable bit allows independent turn-on of the detector for testing purposes. Table 2. Programming Register Definition Summary 4 ADDRESS BITS REGISTER NAME ENABLE 12 DATA BITS A3 A2 A1 A0 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 MSB 15 14 13 12 11 10 9 8 7 6 5 4 3 2 LSB 0 0 0 1 E11 E10 E9 E8 E7 E6 E5 E4 E3 E2 E1 E0 SYNTH 0 0 1 0 X X X X 0 1 0 0 0 0 0 R0 CHANNEL 0 0 1 1 X X X X X CF6 CF5 CF4 CF3 CF2 CF1 CF0 RECEIVE 0 1 0 0 2C2 2C1 2C0 1C2 1C1 1C0 DL1 DL0 SF BW2 BW1 BW0 TRANSMIT 0 1 0 1 X X X X X DE DR1 DR0 PA3 PA2 PA1 PA0 X = Don’t care. Table 3. Register Power-Up Defaults States REGISTER ADDRESS DEFAULT ENABLE 0001 0000 0001 1110 Block-Enable Control Settings (E) SYNTH 0010 0000 0100 0000 Synthesizer Settings: • Reference frequency (R) CHANNEL 0011 0000 0010 0101 Channel frequency settings (CF) RECEIVE 0100 1111 1101 0010 Receiver Settings: • -3dB lowpass filter bandwidth (BW) • Detector midpoint level (DL) 0000 0010 1101 Transmit Settings: • PA bias (PA) • PA driver bias (D) • PA driver enable (DE) TRANSMIT 16 0101 FUNCTION ______________________________________________________________________________________ 2.4GHz 802.11b Zero-IF Transceiver with Integrated PA and Tx/Rx Switch ADDRESS 0001 DATA BIT CONTENT DEFAULT MAX2822 Table 4. Block-Enable Register (ENABLE) DESCRIPTION AND LOGICAL DEFINITION D11 E(11) 0 Reserved D10 E(10) 0 PA Bias-Control Enable (PAB_EN) PAB_EN = SHDNB • (E(10) + TX_ON) D9 E(9) 0 Transmit Baseband Filters Enable (TXFLT_EN) TXFLT_EN = SHDNB • (E(9) + TX_ON) D8 E(8) 0 Tx Upconverter + VGA + Driver Amp Enable (TXUVD_EN) TXUVD_EN = SHDNB • (E(8) + TX_ON) D7 E(7) 0 Reserved D6 E(6) 0 Rx Downconverter + Filters + AGC Amps Enable (RXDFA_EN) RXDFA_EN = SHDNB • (E(6) + RX_ON) D5 E(5) 0 Receive LNA Enable (RXLNA_EN) RXLNA_EN = SHDNB • (E(5) + RX_ON ) D4 E(4) 1 Autotuner Enable (AT_EN) AT_EN = SHDNB • (E(4) + RX_ON + TX_ON) D3 E(3) 1 PLL Charge-Pump Enable (CP_EN) CP_EN = SHDNB • E(3) D2 E(2) 1 PLL Enable (PLL_EN) PLL_EN = SHDNB • E(2) D1 E(1) 1 VCO Enable (VCO_EN) VCO_EN = SHDNB • E(1) D0 E(0) 0 Reserved Table 5. Synthesizer Settings Register (SYNTH) ADDRESS 0010 DATA BIT CONTENT DEFAULT D11:D8 X 0000 DESCRIPTION D7 — 0 Must be 0 for proper operation D6 — 1 Must be 1 for proper operation D5:D0 R(5:0) 000000 Reference Frequency Divider: • 000000 = 22MHz • 000001 = 44MHz Reserved Table 6. Channel Frequency Register (CHANNEL) ADDRESS 0011 DATA BIT CONTENT DEFAULT D11:D7 X 00000 D6:D0 CF(6:0) 0100101 DESCRIPTION Reserved Channel Frequency Select: fLO = (2400 + CF(6:0))MHz • 0000000 = 2400MHz • 0000001 = 2401MHz • ………… • 1100010 = 2498MHz • 1100011 = 2499MHz ______________________________________________________________________________________ 17 MAX2822 2.4GHz 802.11b Zero-IF Transceiver with Integrated PA and Tx/Rx Switch Table 7. Receiver Settings Register (RECEIVE) ADDRESS DATA BIT CONTENT DEFAULT D11:D4 — 11111111 D3 — 0 D2:D0 BW(2:0) 010 DESCRIPTION Must be 11111111 for proper operation Must be 0 for proper operation Receive Filter -3dB Frequency Select (frequencies are approximate): • 000 = 8.5MHz • 001 = 8.0MHz • 010 = 7.5MHz • 011 = 7.0MHz • 100 = 6.5MHz • 101 = 6.0MHz 0100 Table 8. Transmit Settings Register (TRANSMIT) ADDRESS DATA BIT CONTENT DEFAULT D11:D7 X X Reserved D6 DE 0 Transmit Power-Detector Enable 10 PA Predriver Bias: • 11 = Highest predriver bias • ………… • 00 = Lowest predriver bias D5:D4 D(1:0) 0101 D3:D0 PA(3:0) 1101 PA Bias Select: • 1111 = Highest PA bias • ………… • 0000 = Lowest PA bias Applications Information Receive Path RF I/O and Tx/Rx Switching LNA Given the LNA input is internally matched to 100Ω differential, it is important that the differential pair from RFP/RFN to the RF BPF be an identical pair of transmission lines to present a 100Ω differential impedance to the balun. Identical line layout on the differential input traces is important in maintaining good IP2 performance and RF common-mode noise rejection. The MAX2822 completely integrates the power amplifier, low-noise amplifier, transmit/receive (Tx/Rx) switch, as well as all matching components, to allow direct connection to the antenna through a balun or combination balun/filter. This single RF interface (RFP and RFN) is internally matched to form a 100Ω balanced port—no additional components are required to impedancematch the I/O. Most applications employ a 100Ω balanced to 50Ω single-ended RF bandpass filter between the RF port and the antenna. 18 DESCRIPTION The MAX2822 has two LNA gain modes that are digitally controlled by the logic signal applied to RF_GAIN. RF_GAIN high enables the high-gain mode, and RF_GAIN low enables the low-gain mode. The LNA gain step is nominally 32dB. In most applications, RF_GAIN is connected directly to a CMOS output of the baseband IC, and the baseband IC controls the state of the LNA gain based on the detected signal amplitude. ______________________________________________________________________________________ 2.4GHz 802.11b Zero-IF Transceiver with Integrated PA and Tx/Rx Switch Receive Gain Control The MAX2822 receive path gain is varied through an external voltage applied to the pin RX_AGC. Maximum gain is at V RX_AGC = 0V and minimum gain is at VRX_AGC = 2V. The RX_AGC input is a high-impedance analog input designed for direct connection to the RX_AGC DAC output of the baseband IC. The gaincontrol range, which is continuously variable, is typically 70dB. The gain-control characteristic is shown in the Typical Operating Characteristics Receiver Voltage Gain vs. Gain-Control Voltage graph and again as a full-page plot in Figure 2. Some local noise filtering through a simple RC network at the input is permissible. However, the time constant of this network should be kept sufficiently low to not limit the desired response time of the Rx gain-control function. Receiver Baseband Amplifier Outputs The MAX2822 receiver baseband outputs (RX_BBIP, RX_BBIN, RX_BBQP, and RX_BBQN) are differential low-impedance buffer outputs. The outputs are designed to be directly connected (DC-coupled) to the in-phase (I) and quadrature-phase (Q) ADC inputs of the baseband IC. The Rx I/Q outputs are internally biased to +1.2V common-mode voltage. The outputs are capable of driving loads up to 5kΩ || 5pF with the full bandwidth baseband signals at a differential amplitude of 500mVP-P. Proper board layout is essential to maintain good balance between I/Q traces. This provides good quadrature phase accuracy. Transmit Path Transmitter Baseband Inputs The MAX2822 transmitter baseband inputs (TX_BBIP, TX_BBIN, TX_BBQP, and TX_BBQN) are high-impedance differential analog inputs. The inputs are designed to be directly connected (DC-coupled) to the in-phase (I) and quadrature-phase (Q) DAC outputs of the baseband IC. The inputs must be externally biased to +1.2V common-mode voltage. Typically, the DAC outputs are current outputs with external resistor loads to ground. I and Q are driven by a 400mVP-P (nominal) differential baseband signal. Proper board layout is essential to maintain good balance between I/Q traces. This provides good quadrature phase accuracy by maintaining equal parasitic capacitance on the lines. In addition, it is important not to expose the Tx I/Q circuit board traces going from the digital baseband IC to the MAX2822. The lines should be shielded on an inner layer to prevent coupling of RF to these Tx I/Q inputs and possible envelope demodulation of the RF signal. Transmit Path Baseband Lowpass Filtering The MAX2822 on-chip transmit lowpass filters provide the filtering necessary to attenuate the unwanted higherfrequency spurious signal content that arises from the DAC clock feedthrough and sampling images. In addition, the filter provides additional attenuation of the second sidelobe of signal spectrum. The filter frequency response is set on-chip. No user adjustment or programming is required. The Typical Gain vs. Frequency profile is shown in the Typical Operating Characteristics. Transmitter DC Offset Calibration In a zero-IF system, the DC offset of the Tx baseband signal path must be reduced to as near zero as possible to minimize LO leakage at the RF output. Given that the amplifier stages, baseband filters, and Tx DAC possess some finite DC offset that is too large for the required LO leakage specification, it is necessary to null the DC offset. The MAX2822 accomplishes this through an on-chip calibration sequence. During this sequence, the net Tx baseband signal path offsets are sampled and cancelled in the baseband amplifiers. This calibration occurs in the first ~2.2µs after TX_ON is taken high. The calibration corrects for any DC offset from the DAC, but this DC offset must not change after this cal sequence. Be sure the DAC outputs are set to zero state before taking TX_ON high. ______________________________________________________________________________________ 19 MAX2822 Receiver Baseband Lowpass Filtering The MAX2822 on-chip receive lowpass filters provide the steep filtering necessary to attenuate the out-ofband (> 11MHz) interfering signals to sufficiently low levels to preserve receiver sensitivity. The filter frequency response is precisely controlled on-chip and does not require user adjustment. However, a provision is made to permit the -3dB corner frequency and entire response to be slightly shifted up or down in frequency. This is intended to offer some flexibility in trading off adjacent channel rejection vs. passband distortion. The filter -3dB frequency is programmed through the serial interface. The specific bit setting vs. -3dB frequency is shown in Table 7. The typical receive baseband filter gain vs. frequency profile is shown in the Typical Operating Characteristics. Default filter settings are optimal (-3dB corner at 7.5MHz)—this provides the best trade-off between noise filtering and baseband distortion to obtain best receive sensitivity. No user adjustment is required. MAX2822 2.4GHz 802.11b Zero-IF Transceiver with Integrated PA and Tx/Rx Switch RECEIVER GAIN vs. GAIN-CONTROL VOLTAGE 110 VOUT = 500mVP-P fBB = 1MHz fLO = 2437MHz 100 90 80 LNA HIGH GAIN RECEIVER GAIN (dB) 70 60 LNA LOW GAIN 50 40 30 20 10 0 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 VRX_AGC (V) Figure 2. Receiver Gain vs. VRX_AGC 20 ______________________________________________________________________________________ 1.8 2.0 2.4GHz 802.11b Zero-IF Transceiver with Integrated PA and Tx/Rx Switch MAX2822 TRANSMITTER GAIN vs. GAIN-CONTROL VOLTAGE 5 NORMALIZED TO +25°C VTX_GC = 0V 0 NORMALIZED TRANSMITTER GAIN (dB) -5 TA = +85°C -10 TA = +25°C TA = -40°C -15 -20 -25 -30 0 0.2 0.4 0.6 0.8 1.0 VTX_GC (V) 1.2 1.4 1.6 1.8 2.0 Figure 3. Transmitter Gain vs. VTX_GC ______________________________________________________________________________________ 21 MAX2822 2.4GHz 802.11b Zero-IF Transceiver with Integrated PA and Tx/Rx Switch idle current based on the output power level of the PA. See Table 8 for a description of the TRANSMIT control bits, and the corresponding PA predriver and PA bias currents. These two bias current settings significantly affect both efficiency and linearity. They should be chosen based on the target output power for the application. Table 9 shows the recommended register settings for three target output powers. The DC offset circuitry uses a sample-and-hold technique to accomplish this DC offset nulling. Over time (many seconds), the sample-and-hold storage cap slowly discharges, causing the DC value at the Tx BB to slowly increase, and the LO level in the RF output to slowly increase. This can be seen on the bench during evaluation, when the transceiver is left in Tx mode for more than 30 to 60 seconds. Even under worst-case conditions, however, the DC null value changes very little during the longest 802.11b Tx burst of 20ms—LO suppression in 802.11b applications always remains around the -30dBc typical level specified in the Electrical Characteristics table. Synthesizer Channel Frequency and Reference Frequency The synthesizer/PLL channel frequency and reference settings establish the divider/counter settings in the integer-N synthesizer of the MAX2822. Both the channel frequency and reference divider are programmable through the serial interface. The channel frequency is programmed as a channel number 0 to 99 to set the carrier frequency to 2400MHz to 2499MHz (LO frequency = channel + 2400). The reference divider is programmable to allow for 22MHz or 44MHz reference oscillators. These settings are intended to cover only the required 802.11b channel spacing and the two typical crystal oscillator options used in the radios. Transmit Gain Control The transmit gain-control input provides a direct analog control over the transmit path gain. The transmit gain of the MAX2822 is controlled by an external voltage at pin TX_GC. The typical gain-control characteristic is provided in the Typical Operating Characteristics Transmitter Gain Control vs. Gain-Control Voltage graph and again as a full-page plot in Figure 3. The input is a high-impedance analog input designed to directly connect to the DAC output of the baseband IC. Some local noise filtering through a simple RC network at the input is permissible. However, the time constant of this network should be kept sufficiently low so the desired response time of the Tx gain-control function is not limited. Reference Oscillator Input The reference oscillator inputs ROSCP and ROSCN are high-impedance analog inputs. They are designed to be connected to the reference oscillator output through a coupling capacitor. The input amplitude can range from 200mVP-P to 500mVP-P; therefore, in the case of a reference oscillator with a CMOS output, the signal must be attenuated before being applied to the ROSC inputs. The signal can be attenuated with a resistor- or capacitor-divider network. During the Tx turn-on sequence, internally the gain is set at the minimum while the Tx baseband offset calibration is taking place. The RF output is effectively blanked for the first 2.2µs after TX_ON is taken high. After 2.2µs, the blanking is released, and the gain-control amplifier ramps to the gain set by the external voltage applied to the TX_GC input. Loop Filter The PLL uses a classical charge pump into an external loop filter (C-RC) in which the filter output connects to the voltage tuning input of the VCO. This simple thirdorder lowpass loop filter closes the loop around the synthesizer. The Typical Application Circuit shows the loop filter elements around the MAX2822. The capacitor and resistor values are set to provide the loop bandwidth required to achieve the desired lock time while also maintaining loop stability. Refer to the MAX2822 Power Amplifier The MAX2822 provides two programmable analog current sources for internally biasing the on-chip RF power amplifier and the PA predriver. The PA predriver current is controlled by two bits in the TRANSMIT control register (TRANSMIT:D5, D4). The value of the PA bias current is determined by four bits (TRANSMIT:D3–D0). This programmability permits optimizing of the power amplifier Table 9. Suggested PA and PA Driver Bias Current Settings 22 TARGET OUTPUT POWER (dBm) PA DRIVER BIAS SETTING (TRANSMIT: D5, D4) PA BIAS SETTING (TRANSMIT: D3–D0) +3 00 0011 +12 01 0111 +17 10 1101 ______________________________________________________________________________________ 2.4GHz 802.11b Zero-IF Transceiver with Integrated PA and Tx/Rx Switch PC Board Layout Careful PC board layout is mandatory for any radio to meet its specifications. General rules for RF layout apply: keep differential pairs close together, keep all RF traces as short as possible, keep RF bypassing as close to the IC as possible, provide a separate filtered supply line from a large central filter capacitor for each VCC pin (star supply bypassing topology), and have each ground pin use its own via to the ground plane— do not connect ground pins directly to the ground slug on the IC. In addition, below is a list of more specific layout issues to keep in mind for the MAX2822: • RF I/O: Keep RF differential pair from the IC to the balun/filter electrically and environmentally symmetrical. That is, shape the top layer ground equally on either side of the traces, and place the RF decoupling caps for the nearby RF supplies in a symmetrical fashion. This minimizes second-order distortion of the signal on the differential pair. • RBIAS: This external resistor sets the bias for the RF section of the transceiver, and this pin is connected directly to the bias section. The network connected to this port must look high impedance to RF, so do not place any RF filtering here—use only a 1% or 2% 12kΩ resistor, as specified in the Typical Application Circuit. Place this resistor as close to the IC as possible on the top layer of the PC board. • GND_DIG: Use a via to connect this digital ground to the main PC board ground plane. The small inductance of the trace and the via helps to filter out the noise from the digital interface, and helps keep the main system ground clean. It is very important not to connect this directly to the IC ground slug, or directly to any other ground pins, which allows noise from the digital section to couple into sensitive sections of the radio. • PLL section (CP_OUT, GND_CP, GND_VCO, TUNE): The capacitors directly at the output of the PLL’s charge pump need to have their ground return connected as close to the charge pump’s ground as possible, and as isolated from the VCO’s ground as possible. Create separate vias to the ground plane for each of the two grounds (GND_CP and GND_VCO). Referring to the Typical Application Circuit, connect the ground side of C30 and C52 to the ground path for GND_CP, and connect the ground side of C31 to the ground path for GND_VCO. Keeping the charge-pump return currents from bouncing the VCO’s ground minimizes the LO comparison frequency spurs. • BYP: This bypass capacitor is directly connected to the VCO bias circuitry—it is used to filter out noise within the loop bandwidth of the PLL (about 50kHz). The value for this capacitor is critical—be sure to use the 2000pF capacitor specified in the Typical Application Circuit. Keep this cap as close to the IC as possible, since noise pickup on this trace couples directly into the VCO bias and degrade phase noise. Supply and Regulation The typical application circuit for the MAX2822 employs two low-dropout linear regulators (LDOs)—one supplies the internal VCO, and the other supplies everything else (see the Pin Description table for details on supply pin names, numbers, and functions). Supplying the VCO from a dedicated LDO minimizes noise pickup by the VCO that can degrade phase noise and produce spurs. The VCO only draws 10mA, so power dissipation is not an issue. Choose a small, low-noise, high-PSRR LDO like the MAX8510. This LDO comes in a tiny 5-pin SC70 package and is available in many preset output voltages in the 2.7V to 3.0V range. Having the VCO and the rest of the IC supplied from different voltages is acceptable. Therefore, if the MAX2822 main supply is 2.7V, but the application already has a low-noise, 3.0V supply available, simply run the VCO from this 3.0V supply—there is no need for another dedicated 2.7V supply for the VCO. Switching power supplies should not be used to directly power any RF transceiver; the spurious content of their outputs often falls in the middle of the system’s baseband spectrum (50kHz to 11MHz). This can couple into the Tx path and degrade the output spectrum, and can couple into the Rx path and degrade sensitivity and BER. When laying out the supply lines for the IC, always use a star bypassing topology. Have a large (10µF) lowESR capacitor at the main supply connection point, and run dedicated traces to each of the supply pins (there are about ten in total). Each supply pin should have a pair of smaller decoupling caps (10nF and 100pF work well). It is especially important to isolate the supplies for the LNA bias (VCC_LNA) and the Rx baseband filter bias (VCC_BUF). Also be sure to use local RF decoupling on the logic lines. Proper decoupling minimizes noise pickup and coupling. ______________________________________________________________________________________ 23 MAX2822 EV kit schematic for component values. A 45kHz loop bandwidth is recommended to ensure the loop settles quickly enough to achieve 5µs Tx turnaround time and 10µs Rx turnaround time. This is the loop filter on the EV kit. Narrowing the loop bandwidth increases the settling time and results in unacceptable Tx/Rx turnaround time performance. 2.4GHz 802.11b Zero-IF Transceiver with Integrated PA and Tx/Rx Switch MAX2822 Typical Application Circuit DIGITAL MODE-CONTROL SIGNALS FROM/TO BASEBAND IC Rx ANALOG OUTPUT SIGNAL DIGITAL MODE-CONTROL SIGNALS TO/FROM BASEBAND IC TO BASEBAND IC 48 BIAS TX_GC DOUT RX_1K RX_BBQP RX_BBQN RX_BBIN RX_BBIP N.C. VCC_BUF RX_ON PROGRAMMING AND MODE CONTROL 1 36 2 35 3 4 34 INPUT MATCH 33 5 6 32 MAX2822 T/R SWITCH 90 31 8 9 30 OUTPUT MATCH PWR DET 90 INTEGER-N SYNTHESIZER 0 29 PWR_DET 28 10 27 ∑ VOS COMP SERIAL INTERFACE 11 12 26 25 13 14 15 16 SHDNB VCC_RXF VCC_LO VCC_VCO BYP TUNE 0 7 VCC_TMX DAC OUTPUT FROM BASEBAND IC 37 17 18 19 20 21 22 23 GND_VCO GND_CP CP_OUT LOOP FILTER VCC_CP CSB SCLK SERIAL INTERFACE TO BASEBAND IC 24 DIN VCC_DRVR 38 ROSCN VCC_PA 39 ROSCP GND 40 PWR_DET RFN 41 VCC_DIG RFP RF I/O TO RF BPF AND ANT 42 GND_DIG GND 43 VCC_TXF VCC_REF 44 TX_BBQN RF_GAIN 45 TX_BBQP Rx GAIN-CONTROL SIGNALS TO/FROM BASEBAND IC 46 TX_BBIP VREF TO BBIC 47 TX_BBIN VCC_LNA VCC_RMX TX_ON RX_AGC DAC OUTPUT FROM BASEBAND IC REFERENCE OSCILLATOR INPUT Tx ANALOG INPUT SIGNAL FROM BASEBAND IC PA POWER-DETECTOR OUTPUT Chip Information TRANSISTOR COUNT: 16,097 24 ______________________________________________________________________________________ 2.4GHz 802.11b Zero-IF Transceiver with Integrated PA and Tx/Rx Switch 32, 44, 48L QFN.EPS PACKAGE OUTLINE 32,44,48L QFN, 7x7x0.90 MM 21-0092 H 1 2 ______________________________________________________________________________________ 25 MAX2822 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) MAX2822 2.4GHz 802.11b Zero-IF Transceiver with Integrated PA and Tx/Rx Switch Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) U PACKAGE OUTLINE, 32,44,48L QFN, 7x7x0.90 MM 21-0092 26 ______________________________________________________________________________________ H 2 2 2.4GHz 802.11b Zero-IF Transceiver with Integrated PA and Tx/Rx Switch 32, 44, 48L QFN .EPS D2 D CL D/2 b D2/2 k E/2 E2/2 E CL (NE-1) X e E2 k L DETAIL A e (ND-1) X e CL CL L L e A1 A2 e A PROPRIETARY INFORMATION TITLE: PACKAGE OUTLINE 32, 44, 48L QFN THIN, 7x7x0.8 mm APPROVAL DOCUMENT CONTROL NO. 21-0144 REV. B 1 2 ______________________________________________________________________________________ 27 MAX2822 Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) MAX2822 2.4GHz 802.11b Zero-IF Transceiver with Integrated PA and Tx/Rx Switch Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) COMMON DIMENSIONS EXPOSED PAD VARIATIONS ** NOTE: T4877-1 IS A CUSTOM 48L PKG. WITH 4 LEADS DEPOPULATED. TOTAL NUMBER OF LEADS ARE 44. PROPRIETARY INFORMATION TITLE: PACKAGE OUTLINE 32, 44, 48L QFN THIN, 7x7x0.8 mm APPROVAL DOCUMENT CONTROL NO. 21-0144 REV. B 2 2 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 28 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2003 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.