APA2603B 2.5W Stereo Class-D Audio Power Amplifier (with DC Volume Control) Features General Description • • Operating Voltage: 3.3V-5.5V High Efficiency 85% at PO=2.5W, 4Ω Speaker, The APA2603B is a stereo, high efficiency, filter-free ClassD audio amplifier available in a SOP-16, QFN4x4-20A VDD=5V Filter-Free Class-D Amplifier package. The APA2603B provide the precise DC volume control, Low Shutdown Current - IDD=1µA at VDD=5V the gain range is from -80dB (V VOLUME =5V) to +20dB (VVOLUME=0V) with 64 steps precise control. It’s easy to get 64 Steps Volume Adjustable from -80dB to +20dB by DC Voltage with Hysteresis the suitable amplifier’s gain with the 64 steps gain setting. The filter-free architecture eliminates the output filters Output Power at THD+N=1% - 2.5W at VDD=5V, RL=4Ω compared to the traditional Class-D audio amplifier, and reduces the external component counts and the compo- Less External Components Required Internal AGC Function nents high, it could save the PCB space, system cost, simplifies the design and the power loss at filter. Input signal and output signal in phase Thermal and Over-Current Protections with APA2603B provides an internal AGC (Non-Clip) function, and this function can low down the dynamic range for • Auto-Recovery Lead Free and Green Device Available (RoHS large input signal. APA2603B can provide from 20dB to 80dB with 64 steps gain decrease for non-clipping • Compliant) Power Enhanced Packages SOP-16 and QFN4x4- function, and this function can avoid output signal clipping. The APA2603B also integrates the de-pop circuitry that 20A reduces the pops and click noises during power on/off or shutdown enable process. • • • • • • • • The APA2603B has build-in over-current and thermal protection that prevent the chip being destroyed by short circuit or over temperature situation. Applications • • • Simplified Application Circuit LCD TVs DVD Player Active Speakers ROUTStereo Input Signals RIN ROUT+ LIN Stereo Speakers APA2603B LOUT+ DC Volume Control VOLUME LOUT- ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright ANPEC Electronics Corp. Rev. A.5 - Feb., 2013 1 www.anpec.com.tw APA2603B SD BYPASS RIN GND GND LIN VOLUME MUTE 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 APA2603B ROUTVDD ROUT+ GND GND LOUT+ VDD LOUT- 16 VDD 17 LOUT+ 18 GND 19 ROUT+ 20 VDD Pin Configuration 15 LOUT- ROUT- 1 14 NC NC 2 APA2603B SD 3 13 VDD Bypass 4 12 NC RIN 5 11 NC NC 10 Mute 9 Volume 8 LIN 7 GND 6 SOP-16 (Top View) QFN4x4-20A (Top View) Ordering and Marking Information Package Code K : SOP-16 QA : QFN4x4-20A Operating Ambient Temperature Range o I : -40 to 85 C Handling Code TR : Tape & Reel Lead Free Code G : Halogen and Lead Free Device APA2603B Lead Free Code Handling Code Temperature Range Package Code APA2603B K : APA2603B QA : APA2603B XXXXX XXXXX - Date Code B APA2603 XXXXX XXXXX - Date Code Note : ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by weight). Copyright ANPEC Electronics Corp. Rev. A.5 - Feb., 2013 2 www.anpec.com.tw APA2603B Absolute Maximum Ratings (Note 1) Symbol VDD TJ Parameter Rating Supply Voltage (VDD to GND) -0.3 to 6.5 Input Voltage (LINN, RINN to GND) -0.3 to VDD+0.3 Input Voltage (SD, MUTE, VOLUME and BYPASS to GND) -0.3 to VDD+0.3 Maximum Junction Temperature V 150 TSTG Storage Temperature Range TSDR Maximum Soldering Temperature Range, 10 Seconds PD Unit ο -65 to +150 C 260 Power Dissipation Internally Limited W Note1: Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions”is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Thermal Characteristics Parameter Symbol θJA θJC Typical Value Unit Thermal Resistance -Junction to Ambient (Note 2) Thermal Resistance -Junction to Case SOP-16 QFN4x4-20A 80 45 ο SOP-16 QFN4x4-20A 16 7 ο C/W (Note 3) C/W Note 2: Please refer to “ Layout Recommendation”, the PGND PIN on the central of the IC should connect to the ground plan, and the PCB is a 2-layer, 5-inch square area with 2oz copper thickness. Note 3: The case temperature is measured at the center of the PGND PIN on the underside of the SOP-16 package. Recommended Operating Conditions Symbol Range Parameter Unit Min Max 3.3 5.5 VDD Supply Voltage VIH High Level Threshold Voltage SD, MUTE 2 VDD VIL Low Level Threshold Voltage SD, MUTE 0 0.8 VICM Common Mode Input Voltage 1 VDD-1 TA Ambient Temperature Range -40 85 TJ Junction Temperature Range -40 125 RL Speaker Resistance 3.5 - Copyright ANPEC Electronics Corp. Rev. A.5 - Feb., 2013 3 V V ο C Ω www.anpec.com.tw APA2603B Electrical Characteristics VDD=5V, VGND=0V, TA= 25οC, (unless otherwise noted) Symbol IDD IMUTE ISD Ii FOSC Parameter Supply Current Supply Current (Mute Mode) Supply Current (SD Mode) Input Current Test Conditions Max. VMUTE=0V, V/SD=5V, No Load - 8 20 VMUTE=5V, V/SD=5V, No Load - 8 20 VMUTE=0V, V/SD=0V, No Load - - 1 SD, MUTE, VOLUME - - 1 400 500 600 215 270 325 205 260 310 225 285 340 215 270 325 240 300 360 220 280 335 - 1.2 2 s 2.2 2.4 - W RL=4Ω, PO=1.7W - 0.1 0.3 RL=8Ω, PO=1W - 0.08 0.2 Oscillator Frequency Static Drain-Source On-State Resistance P-channel Power MOSFET N-channel Power MOSFET P-channel Power MOSFET N-channel Power MOSFET P-channel Power MOSFET N-channel Power MOSFET VDD=4.5V, IL=0.6A VDD=3.6V, IL=0.4A TSTART-UP Start-Up Time from Shutdown Unit Typ. VDD=5.5V, IL=0.8A RDSON APA2603B Min. Bypass Capacitor, CB=2.2µF. mA µA kHz mΩ VDD=5V, TA=25° C, GAIN=20dB PO THD+N Crosstalk Output Power THD+N=1% fin=1kHz Total Harmonic Distortion Plus Noise fin=1kHz Channel Separation PO=0.24W, RL=4Ω, fin=1kHz RL=4Ω - -90 -60 fin=100Hz - -60 -50 fin=1kHz - -70 -60 80 85 - % Power Supply Rejection Ratio RL=4Ω, Input AC-Ground SNR Signal to Noise Ratio With A-weighting Filter VO=0.96W, RL=8Ω AttMute Mute Attenuation fin=1kHz, RL=8Ω, Vin=1Vrms - -100 -80 Shutdown Attenuation fin=1kHz, RL=8Ω, Vin=1Vrms With A-weighting Filter (Gain=20dB), AC=GND - -120 -90 - 75 100 µVrms RL=4Ω, Gain=20dB - 10 30 mV - 1.1 - W PSRR Attshutdown Vn Output Noise VOS Output Offset Voltage dB VDD=3.6V, TA=25° C, GAIN=20dB PO Crosstalk Output Power THD+N=1% fin=1kHz Channel Separation PO=0.12W, RL=4Ω, fin=1kHz RL=4Ω - -90 -60 fin=100Hz - -60 -50 fin=1kHz - -70 -60 80 85 - Power Supply Rejection Ratio RL=4Ω, Input AC-Ground SNR Signal to Noise Ratio With A-weighting Filter PO = 0.96W, RL = 8Ω AttMute Mute Attenuation fin=1kHz, RL=8Ω, Vin=1Vrms - -100 -80 Shutdown Attenuation fin=1kHz, RL=8Ω, Vin=1Vrms With A-weighting Filter (Gain=20dB), AC=GND - -120 -90 - 75 100 µVrms RL=4Ω, Gain=20dB - 10 30 mV PSRR Attshutdown Vn Output Noise VOS Output Offset Voltage Copyright ANPEC Electronics Corp. Rev. A.5 - Feb., 2013 4 www.anpec.com.tw APA2603B Typical Operating Characteristics THD+N vs. Output Power THD+N vs. Output Power 10 f=1kHz RL=8Ω Av=20dB AES-17(20kHz) 1 VDD=3.6V VDD=3.3V THD+N (%) 1 THD+N (%) 10 f=1kHz RL=4Ω Av=20dB AES-17(20kHz) VDD=5V 0.1 VDD=3.6V VDD=3.3V VDD=5V 0.1 VDD=5.5V VDD=5.5V 0.01 0 0.5 1 1.5 2 2.5 0.01 0 3 400m THD+N vs. Frequency 10 10 VDD=5V RL=8Ω Po=1W AES-17(20kHz) 1 THD+N (%) THD+N (%) 1 Av=20dB 0.1 Av=10dB 0.01 Av=20dB 0.1 Av=10dB 0.01 0.001 0.001 20 100 1k 10k 20k 20 100 Frequency (Hz) 10k 20k Output Noise Voltage vs . Frequency 100µ V DD=5V V DD=3.6V R L=4Ω Input AC GND AES -17 (20kHz) Output Noise Voltage(Vrms) Output Noise Voltage(Vrms) 80 µ 1k Frequency (Hz) Output Noise Voltage vs . Frequency 100µ 1.6 1.2 THD+N vs. Frequency R T VDD=5V RL=4Ω Po=1.7W AES-17(20kHz) 800m Output Power (W) Output Power (W) Av=20dB Av=14dB 60µ Av=6 dB 40µ 20 µ 80µ R L =4Ω Input AC GND AES-17(20kHz) Av=20dB Av=14dB 60µ Av=6dB 40µ 20µ 20 100 1k 20 10k 20k Frequency (Hz) Copyright ANPEC Electronics Corp. Rev. A.5 - Feb., 2013 5 100 1k Frequency (Hz) 10k 20k www.anpec.com.tw APA2603B Typical Operating Characteristics Frequence Response Frequence Response +360 +360 +20 +20 +260 Gain(dB) +180 Av=20dB +260 Phase,Av=20dB Phase,Av=6dB Phase,Av=0dB +10 +180 +6 +6 +100 Av=6dB +100 Av=6dB Av=0dB Av=0dB 0 0 +0 20 100 1k 20k +0 100k 20 100 Frequency (Hz) -60 20k 100k Mute Attenuation vs. Frequence -60 VDD=5V RL=8Ω Av=20dB Vo=1Vrms AES-17(20kHz) -80 1k Frequency (Hz) Shutdown Attenuation vs. Frequence Gain(dB) Phase(Deg) Phase,Av=20dB Phase,Av=6dB Phase,Av=0dB +10 VDD=5V RL=8Ω +16 Po=150mW Phase(Deg) Gain(dB) Av=20dB VDD=3.6V RL=4Ω Po=150mW +16 -40 VDD=5V RL=8Ω Av=20dB Vo=1Vrms AES-17(20kHz) -60 -100 -80 -120 -90 -140 20 +0 1k -100 20 10k 20k 1k 10k 20k Frequency (Hz) PSRR VS Frequency Crosstalk vs. Frequency -60 -70 Crosstalk(dB) -20 100 Frequency (Hz) VDD=5V RL=4Ω Av=20dB Vrr=0.2Vrms AES-17(20kHz) -10 PSRR(dB) 100 -30 -40 Input floating -50 VDD=5V RL=4Ω Po=0.24W AES-17(20kHz) R-Channel to L-Channel -80 -90 L-Channel to R-Channel -60 Input to GND -100 20 -70 20 100 1k 10k 20k Copyright ANPEC Electronics Corp. Rev. A.5 - Feb., 2013 100 1k 10k 20k Frequency (Hz) Frequency (Hz) 6 www.anpec.com.tw APA2603B Typical Operating Characteristics AGC Function Output Power vs. Input AC Crosstalk vs. Frequency -60 2.8 VDD=3.3V RL=4Ω Po=0.12W AES-17(20kHz) 2.4 Output Power (W) Crosstalk(dB) -70 R-Channel to L-Channel -80 -90 L-Channel to R-Channel 2.0 1.6 1.2 VDD=5V RL=4Ω Av=20dB AES-17(20kHz) 0.8 0.4 -100 20 100 1k 10k 20k Frequency (Hz) 0.2 5 Supply Current(mA) 1.2 Output Power (W) 0.8 1.2 1 1.4 Supply Current vs. Supply Voltage 1.4 1.0 0.8 0.6 VDD=5V RL=8Ω Av=20dB AES-17(20kHz) 0.2 0.6 Input AC (Vrms) AGC Function Output Power vs. Input AC 0.4 0.4 NO Load 4 3 2 1 0 0.2 0.4 0.6 0.8 1 1.2 0 1.4 1 2 Input AC (Vrms) 3 4 5 6 Supply Voltage(V) Shutdown Current vs. Supply Voltage Gain vs. Volume Voltage 20 Gain Down 0.6 Gain Up Gain (dB) Supply Current(µA) 0 0.5 0.4 0.3 -20 -40 0.2 0.1 VDD=5.0V No Load AUX-0025 AES-17(20kHz) -60 0 1 2 3 4 5 0 6 Copyright ANPEC Electronics Corp. Rev. A.5 - Feb., 2013 1 2 3 4 5 DC Volume Voltage (V) Supply Voltage(V) 7 www.anpec.com.tw APA2603B Typical Operating Characteristics Efficiency vs. Output Power (8Ω) Efficiency vs. Output Power (4Ω) 100 100 VDD =3.3 V 80 80 V DD=5V 60 50 40 30 10 60 50 40 30 RL =4Ω +33µΗ fin=1kHz Av=20dB AES-17 (20kHz) 20 10 0 0 .5 1 1.5 2 2.5 0 0.2 0 .4 0.6 0.8 1 Output Power(W) Output Power(W) Copyright ANPEC Electronics Corp. Rev. A.5 - Feb., 2013 R L=8Ω+33µΗ fin=1 kHz Av=20 dB AES -17(20kHz) 20 0 0 VDD =5V 70 Efficiency(%) 70 Efficiency(%) VDD =3.3V 90 90 8 www.anpec.com.tw APA2603B Pin Description PIN NO. QFN4x4SOP-16 20A I/O/P NAME FUNCTION 1 3 SD I 2 4 BYPASS P Shutdown Mode Control Input, Place entire IC in shutdown mode when held low. Bias Voltage for Power Amplifiers. 3 4,5,12,1 3 6 5 RIN I Negative Input of Right Channel Power Amplifier. 6,18 GND P Ground Connection. 7 LIN I Negative Input of Left Channel Power Amplifier. 7 8 VOLUME I 8 9 MUTE I 9 15 LOUT- O To Set The Amplifier’s Gain by Using The DC Voltage. Mute control signal input, hold low for normal operation, hold high to mute. Negative Output of Left Channel Power Amplifier. 10,15 13,16,20 VDD P Power Supply. 11 17 LOUT+ O Positive Output of Left Channel Power Amplifier. 14 19 ROUT+ O Positive Output of Right Channel Power Amplifier. 16 1 ROUT- O Negative Output of Right Channel Power Amplifier. Typical Application Circuit 1 SD Shutdown Control CB Right Channel Input Signal 2.2µF Ci1 1µf ROUT- 16 VDD 15 2 BYPASS ROUT+ 14 3 RIN GND 13 4 GND Left Channel Input Signal VDD R1 5 GND Ci2 1µF APA2603B (Top View) 6 LIN LOUT+ 11 4Ω VDD CS1 CS3 10µF 0.1µF VDD 10 7 VOLUME LOUT- 9 8 MUTE 50kΩ Mute Control Copyright ANPEC Electronics Corp. Rev. A.5 - Feb., 2013 GND 12 CS2 0.1µF 4Ω 9 www.anpec.com.tw APA2603B Block Diagram Gate Drive RIN ROUT+ VDD Gate Drive BYPASS ROUT- BYPASS Mute Control MUTE AGC Control Biases & Reference Protection Function GND VOLUME Volume Control SD Oscillator Shutdown Control Gate Drive LIN LOUT+ VDD Gate Drive Copyright ANPEC Electronics Corp. Rev. A.5 - Feb., 2013 10 LOUT- www.anpec.com.tw APA2603B DC Volume Control Table VDD=5V, VGND=0V, TA= 25οC Step Gain (dB) Down (%) Down (V) Up(%) Volume H to L Up (V) Recom(%) Recom(V) Volume L to H 1 20.0 1.70 0.09 0.00 0.00 0.00 0.00 2 19.6 3.25 0.16 2.20 0.11 2.73 0.14 3 19.2 4.80 0.24 3.75 0.19 4.28 0.21 4 18.8 6.35 0.32 5.30 0.27 5.83 0.29 5 18.4 7.90 0.40 6.85 0.34 7.38 0.37 6 18.0 9.45 0.47 8.40 0.42 8.93 0.45 7 17.6 11.00 0.55 9.95 0.50 10.48 0.52 8 17.2 12.55 0.63 11.50 0.58 12.03 0.60 9 16.8 14.10 0.71 13.05 0.65 13.58 0.68 10 16.4 15.65 0.78 14.60 0.73 15.13 0.76 11 16.0 17.20 0.86 16.15 0.81 16.68 0.83 12 15.6 18.75 0.94 17.70 0.89 18.23 0.91 13 15.2 20.30 1.02 19.25 0.96 19.78 0.99 14 14.8 21.85 1.09 20.80 1.04 21.33 1.07 15 14.4 23.40 1.17 22.35 1.12 22.88 1.14 16 14.0 24.95 1.25 23.90 1.20 24.43 1.22 17 13.6 26.50 1.33 25.45 1.27 25.98 1.30 18 13.2 28.05 1.40 27.00 1.35 27.53 1.38 19 12.8 29.60 1.48 28.55 1.43 29.08 1.45 20 12.4 31.15 1.56 30.10 1.51 30.63 1.53 21 12.0 32.70 1.64 31.65 1.58 32.18 1.61 22 11.6 34.25 1.71 33.20 1.66 33.73 1.69 23 11.2 35.80 1.79 34.75 1.74 35.28 1.76 24 10.8 37.35 1.87 36.30 1.82 36.83 1.84 25 10.4 38.90 1.95 37.85 1.89 38.38 1.92 26 10.0 40.45 2.02 39.40 1.97 39.93 2.00 27 9.6 42.00 2.10 40.95 2.05 41.48 2.07 28 9.2 43.55 2.18 42.50 2.13 43.03 2.15 29 8.8 45.10 2.26 44.05 2.20 44.58 2.23 30 8.4 46.65 2.33 45.60 2.28 46.13 2.31 31 8.0 48.20 2.41 47.15 2.36 47.68 2.38 32 7.6 49.75 2.49 48.70 2.44 49.23 2.46 Copyright ANPEC Electronics Corp. Rev. A.5 - Feb., 2013 11 www.anpec.com.tw APA2603B DC Volume Control Table (Cont.) VDD=5V, VGND=0V, TA= 25οC Step Gain (dB) Down (%) Down (V) Up(%) Volume H to L Up (V) Recom(%) Recom(V) Volume L to H 33 7.2 51.30 2.57 50.25 2.51 50.78 2.54 34 6.8 52.85 2.64 51.80 2.59 52.33 2.62 35 6.4 54.40 2.72 53.35 2.67 53.88 2.69 36 6.0 55.95 2.80 54.90 2.75 55.43 2.77 37 5.6 57.50 2.88 56.45 2.82 56.98 2.85 38 5.2 59.05 2.95 58.00 2.90 58.53 2.93 39 4.8 60.60 3.03 59.55 2.98 60.08 3.00 40 4.4 62.15 3.11 61.10 3.06 61.63 3.08 41 4.0 63.70 3.19 62.65 3.13 63.18 3.16 42 3.6 65.25 3.26 64.20 3.21 64.73 3.24 43 3.2 66.80 3.34 65.75 3.29 66.28 3.31 44 2.8 68.35 3.42 67.30 3.37 67.83 3.39 45 2.4 69.90 3.50 68.85 3.44 69.38 3.47 46 2.0 71.45 3.57 70.40 3.52 70.93 3.55 47 1.6 73.00 3.65 71.95 3.60 72.47 3.62 48 1.2 74.55 3.73 73.50 3.68 74.02 3.70 49 0.8 76.10 3.81 75.05 3.75 75.57 3.78 50 0.4 77.65 3.88 76.60 3.83 77.12 3.86 51 0.0 79.20 3.96 78.15 3.91 78.67 3.93 52 -1.0 80.75 4.04 79.70 3.99 80.22 4.01 53 -2.0 82.30 4.12 81.25 4.06 81.77 4.09 54 -3.0 83.85 4.19 82.80 4.14 83.32 4.17 55 -5.0 85.40 4.27 84.35 4.22 84.87 4.24 56 -7.0 86.95 4.35 85.90 4.30 86.42 4.32 57 -9.0 88.50 4.43 87.45 4.37 87.97 4.40 58 -11.0 90.05 4.50 89.00 4.45 89.52 4.48 59 -17.0 91.60 4.58 90.55 4.53 91.07 4.55 60 -23.0 93.15 4.66 92.10 4.61 92.62 4.63 61 -29.0 94.70 4.74 93.65 4.68 94.17 4.71 62 -35.0 96.25 4.81 95.20 4.76 95.72 4.79 63 -41.0 97.80 4.89 96.75 4.84 97.27 4.86 64 -80.0 100.00 5.00 98.30 4.92 100.00 5.00 Copyright ANPEC Electronics Corp. Rev. A.5 - Feb., 2013 12 www.anpec.com.tw APA2603B Function Description Class-D Operation Bypass Voltage Output = 0V The bypass voltage is equal to VDD/2, this voltage is for bias the internal preamplifier stages. The external ca- V OUT+ pacitor for this reference (C1) is a critical component and serves several important functions. V OUT- DC Volume Control Function V OUT (VOUT+ -V OUT- ) The APA2603B has an internal stereo volume control I whose setting is the function of the DC voltage applied to the VOLUME input pin. The APA2603B volume control con- OUT Output > 0V sists of 64 steps that are individually selected by a variable DC voltage level on the VOLUME control pin. The V OUT+ V OUT- range of the steps controlled by the DC voltage, are from +20dB to -80dB. Each gain step corresponds to a spe- V OUT (V OUT+ -V OUT- ) I cific input voltage range, as shown in the table. To minimize the effect of noise on the volume control pin, which OUT can affect the selected gain level, hysteresis and clock delay are implemented. The amount of hysteresis corre- Output < 0V VOUT+ sponds to half of the step width, as shown in the “DC Volume Control Graph”. V OUT- For the highest accuracy, the voltage shown in the “recV ommended voltage” column of the table is used to select a desired gain. This recommended voltage is exactly half- OUT (V OUT+ -V OUT- ) way between the two nearest transitions. The gains level have are 0.4dB/step from 20dB to 0dB; 1dB/step from I OUT 0dB to -3dB; 2dB/step from -3dB to -11dB and 6dB/step from -11dB to -41dB and the last step at -80dB as mute Figure1. The APA2603B Output Waveform (Voltage& Current) mode. The APA2603B power amplifier modulation scheme is shown in figure 1; the outputs VOUT+ and VOUTN are in phase with each other when no input signals. When output > 0V, the duty cycle of VOUT+ is greater than 50% and VOUT- is less than 50%; when Output <0V, the duty cycle of VOUT+ is less than 50% and VOUT- is greater than 50%. This method reduces the switching current across the load, and reduces the I 2R losses in the load that improve the amplifier’s efficiency. This modulation scheme has very short pulses across the load, this making the small ripple current and very little loss on the load, and the LC filter can be eliminate in most applications. Added the LC filter can increase the efficiency by filter the ripple current. Copyright ANPEC Electronics Corp. Rev. A.5 - Feb., 2013 13 www.anpec.com.tw APA2603B Function Description (Cont.) The situation will circulate until the over-current or short- AGC (Non-Clipping) Function circuits has be removed. The APA2603B provides the 64 steps non-clipping control, and the range is from 20dB to -80dB. When the output Thermal Protection reaches the maximum power setting value, the internal Programmable Gain Amplifier (PGA) will decrease the gain The over-temperature circuit limits the junction temperature of the APA2603B. When the junction temperature ex- for prevent the output waveform clipping. This feature prevents speaker damage from occurring clipping. The AGC pin to set the non-clipping function. ceeds TJ=+155oC, a thermal sensor turns off the output buffer, allowing the devices to cool. The thermal sensor MUTE Operation allows the amplifier to start-up after the junction temperature down about 125 oC. The thermal protection is de- When place the logic high on MUTE pin, the APA2603B’s outputs runs at a constant 50% duty cycle, and the signed with a 25 oC hysteresis to lower the average TJ during continuous thermal overload conditions, increas- APA2603B is at mute state. Place the logic low on MUTE pin enables the outputs, and the output changes the duty ing lifetime of the IC. cycle with the input signal. This pin could be used as a quick disable/enable of outputs when changing channels on a television or transitioning between different audio sources. The MUTE pin must not be floating. Shutdown Operation In order to reduce power consumption while not in use, the APA2603B contains a shutdown function to externally turn off the amplifier bias circuitry. This shutdown feature turns the amplifier off when logic low is placed on the SD pin for APA2603B. The trigger point between a logic high and logic low level is typically 1.5V. It is the best to switch between ground and the supply voltage VDD to provide maximum device performance. By switching the SD pin to a low level, the amplifier enters a low-consumptioncurrent state, IDD for APA2603B is in shutdown mode. On normal operating, APA2603B’s SD pin should pull to a high level to keep the IC out of the shutdown mode. The SD pin should be tied to a definite voltage to avoid unwanted state changes. Over-Current Protection The APA2603B monitors the output current, and when the current exceeds the current-limit threshold, the APA2603B turn-off the output stage to prevent the output device from damages in over-current or short-circuit condition. The IC will turn-on the output buffer after 200ms, but if the overcurrent or short-circuits condition is still remain, it enters the Over-Current protection again. Copyright ANPEC Electronics Corp. Rev. A.5 - Feb., 2013 14 www.anpec.com.tw APA2603B Application Information Square Wave into the Speaker The value of Ci must be considered carefully because it directly affects the low frequency performance of the circuit. Apply the square wave into the speaker may cause the voice coil of speaker jumping out the air gap and defacing Where Ri is 36kΩ (minimum) and the specification calls for a flat bass response down to 50Hz. The equation is the voice coil. However, this depends on the amplitude of square wave is high enough and the bandwidth of speaker reconfigured as below: Ci = is higher than the square wave¡¦s frequency. For 500kHz switching frequency, this is not issued for the speaker 1 2πRifc (2) because the frequency is beyond the audio band and can¡¦t significantly move the voice coil, as cone movement When the input resistance variation is considered, the Ci is 0.08µF, so a value in the range of 0.01µF to 0.022µF is proportional to 1/f2 for frequency out of audio band. would be chosen. A further consideration for this capacitor is the leakage path from the input source through the Input Resistor, Ri input network (Ri + Rf, Ci) to the load. This leakage current creates a DC offset voltage at the input to the amplifier Input Resistance (kΩ) Gain vs. Input Resistance 140 130 120 110 100 90 80 70 60 50 40 30 20 -40-35 -30-25-20-15 -10 -5 0 5 10 15 20 that reduces useful headroom, especially in high gain applications. For this reason, a low-leakage tantalum or ceramic capacitor is the best choice. When polarized capacitors are used, the positive side of the capacitor should face the amplifiers’ input in most applications because the DC level of the amplifiers’ inputs are held at VDD/2. Please note that it is important to confirm the capacitor polarity in the application. Effective Bypass Capacitor, CB As with any power amplifier, proper supply bypassing is critical for low noise performance and high power supply rejection. Gain (dB) The bypass capacitance effects the start-up time. It is determined in the following equation: For achieving the 64 steps gain setting, it varies the input resistance network (R i & R f ) of amplifier. The input resistor’s range form smallest to maximum is about 3.5 TSTART-UP=0.5(sec/µF)xC1+0.2(sec) times. Therefore, the input high-pass filter’s low cutoff frequency will change 3.5 times from low to high. The The capacitor location on the bypass pin should be as cutoff frequency can be calculated by equation 1. close to the device as possible. The effect of a larger half bypass capacitor is improved PSRR due to increased Input Capacitor, Ci half-supply stability. The selection of bypass capacitors, especially CB, is thus dependent upon desired PSRR In the typical application, an input capacitor, Ci, is required to allow the amplifier to bias the input signal to the proper DC level for optimum operation. In this case, Ci and the requirements, click and pop performance. input impedance Ri form a high-pass filter with the corner frequency determined in the following equation: f C(highpass ) = 1 2πRiCi Copyright ANPEC Electronics Corp. Rev. A.5 - Feb., 2013 (3) To avoid the start-up pop noise occurred, choose Ci which is not larger than CB. (1) 15 www.anpec.com.tw APA2603B Application Information (Cont.) Ferrite Bead Selection If the traces form APA2603B to speaker are short, the ferrite bead filters can reduce the high frequency radiated to meet the FCC & CE required. A ferrite that has very low impedance at low frequencies OUTP 36µH and high impedance at high frequencies (above 1 MHz) is recommended. 1µF OUTN Output Low-Pass Filter 36µH 8Ω 1µF If the traces form APA2603B to speaker are short, it doesn’t require output filter for FCC & CE standard. A ferrite bead may be needed if it’s failing the test for FCC or CE tested without the LC filter. The figure 2 is the sample Figure 3. LC output filter for 8Ω speaker for added ferrite bead; the ferrite shows choosing high impedance in high frequency. OUTP 18µH VON Ferrite Bead 2.2µF 1nF OUTN Ferrite Bead VOP 18µH 4Ω 2.2µF 4Ω 1nF Figure 4. LC output filter for 4Ω speaker Figure 3 and 4’s low pass filter cut-off frequency are 25kHz (FC). Figure 2. Ferrite bead output filter Figure 3 and 4 are examples for added the LC filter (Butterworth), it’s recommended for the situation that the trace form amplifier to speaker is too long and needs to eliminate the radiated emission or EMI. fC(lowpass) = 1 (5) 2π LC Power-Supply Decoupling Capacitor, CS The APA2603B is a high-performance CMOS audio amplifier that requires adequate power supply decoupling to ensure the output total harmonic distortion (THD) is as low as possible. Power supply decoupling also prevents the oscillations being caused by long lead length between the amplifier and the speaker. Copyright ANPEC Electronics Corp. Rev. A.5 - Feb., 2013 16 www.anpec.com.tw APA2603B Application Information (Cont.) Power-Supply Decoupling Capacitor, CS (Cont.) 1. All components should be placed close to the The optimum decoupling is achieved by using two different types of capacitors that target on different types of APA2603B. For example, the input capacitor (Ci) should be close to APA2603B’s input pins to avoid causing noise on the power supply leads. For higher frequency transients, spikes, or digital hash on the line, a good low noise coupling to APA2603B¡¦s high impedance inputs; the decoupling capacitor (CS) should be placed by the equivalent-series-resistance (ESR) ceramic capacitor, typically 0.1µF placed as close as possible to the device APA2603B’s power pin to decouple the power rail noise. VDD pin for works best. For filtering lower frequency noise signals, a large aluminum electrolytic capacitor of 10µF 2. The output traces should be short, wide ( >50mil) and symmetric. or greater placed near the audio power amplifier is recommended. 3. The input trace should be short and symmetric. 4. The power trace width should greater than 50mil. Layout Recommendation 5. APA2603B and APA2603A share the pin 9~16 to avoid soldering short. APA2603B’s left half pads are con- 2.0mm 2.54mm nected to APA2603A by lines. ThermalVia diameter 0.3mm X 5 0.7mm 1mm 0.28mm 3.2mm 1.27mm 0.5mm Solder Mask to Prevent Short-Circuit 2.2mm Ground plane for Thermal PAD 5.5mm Figure 6. QFN4x4-20A Land Pattern Recommendation 1. All components should be placed close to the APA2603B. For example, the input capacitor (Ci) should 0.27mm be close to APA2603B’s input pins to avoid causing noise coupling to APA2603B’s high impedance inputs; the decoupling capacitor (Cs) should be placed by the APA2603B’s power pin to decouple the power rail 11.05mm Figure 5.SOP-16P & SOP-24co-layout Land Pattern Recommendation noise. 2. The output traces should be short, wide ( >50mil), and symmetric. 3. The input trace should be short and symmetric. 4. The power trace width should greater than 50mil. 5. The QFN4X4-20A Thermal PAD should be soldered on PCB, and the ground plane needs soldered mask (to avoid short-circuit) except the Thermal PAD area. Copyright ANPEC Electronics Corp. Rev. A.5 - Feb., 2013 17 www.anpec.com.tw APA2603B Package Information SOP-16 D h X 45o E E1 SEE VIEW A b A1 0.25 A c A2 e NX aaa c GAUGE PLANE SEATING PLANE 0 L VIEW A S Y M B O L SOP-16 MILLIMETERS MIN. INCHES MAX. A MAX. MIN. 0.069 1.75 0.010 0.004 0.15 A1 0.10 A2 1.25 b 0.31 0.51 0.012 0.020 c 0.17 0.25 0.007 0.010 D 9.80 10.00 0.374 0.394 E 5.80 6.20 0.228 0.244 E1 3.80 4.00 0.150 e h L θ aaa 0.049 1.27 BSC 0.25 0.157 0.050 BSC 0.50 0.010 0.020 0.40 1.27 0.016 0.050 o o 0 o 8o 0 8 0.10 0.004 Note : 1. Follow from JEDEC MS-012 BC. 2. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not 3. Dimension "E" does not include inter-lead flash or protrusions. Inter-lead flash and protrusions shall not exceed 10 mil per side. exceed 6 mil per side. Copyright ANPEC Electronics Corp. Rev. A.5 - Feb., 2013 18 www.anpec.com.tw APA2603B Package Information QFN4x4-20A D b E A Pin 1 A1 D2 A3 L K E2 Pin 1 Corner e S Y M B O L QFN4x4-20A MILLIMETERS INCHES MIN. MAX. MIN. MAX. A 0.80 1.00 0.031 0.039 A1 0.00 0.05 0.000 0.002 A3 0.20 REF 0.008 REF b 0.18 0.30 0.008 0.012 D 3.90 4.10 0.154 0.161 D2 2.00 2.50 0.079 0.098 E 3.90 4.10 0.154 0.161 E2 2.00 2.50 0.079 0.098 e 0.50 BSC L 0.35 K 0.20 0.020 BSC 0.014 0.45 0.018 0.008 Note : 1. Followed from JEDEC MO-220 VGGD-5. Copyright ANPEC Electronics Corp. Rev. A.5 - Feb., 2013 19 www.anpec.com.tw APA2603B Carrier Tape & Reel Dimensions P0 P2 P1 A B0 W F E1 OD0 K0 A0 A OD1 B B T SECTION A-A SECTION B-B H A d T1 Application A H T1 C d D W E1 F 330.0±2.00 50 MIN. 16.4+2.00 -0.00 13.0+0.50 -0.20 1.5 MIN. 20.2 MIN. 16.0±0.30 1.75±0.10 7.5±0.10 P0 P1 P2 D0 D1 T A0 B0 K0 1.5 MIN. 0.6+0.00 -0.40 d D W E1 F 1.5 MIN. 20.2 MIN. 12.0±0.30 1.75±0.10 5.5±0.05 D1 T A0 B0 K0 1.5 MIN. 0.6+0.00 -0.40 4.30±0.20 4.30±0.20 1.30±0.20 SOP-16 4.0±0.10 8.0±0.10 2.0±0.10 1.5+0.10 -0.00 A H T1 C 330.0±2.00 50 MIN. P0 P1 Application QFN4x4-20A 4.0±0.10 12.4+2.00 13.0+0.50 -0.00 -0.20 8.0±0.10 P2 D0 2.0±0.05 1.5+0.10 -0.00 6.40±0.20 10.30±0.20 2.10±0.20 (mm) Devices Per Unit Package Type Unit QFN4x4-20A Tape & Reel 3000 S O P-16 Tape & Reel 2500 Copyright ANPEC Electronics Corp. Rev. A.5 - Feb., 2013 Quantity 20 www.anpec.com.tw APA2603B Taping Direction Information SOP-16 USER DIRECTION OF FEED QFN4x4-20A USER DIRECTION OF FEED Copyright ANPEC Electronics Corp. Rev. A.5 - Feb., 2013 21 www.anpec.com.tw APA2603B Classification Profile Copyright ANPEC Electronics Corp. Rev. A.5 - Feb., 2013 22 www.anpec.com.tw APA2603B Classification Reflow Profiles Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly 100 °C 150 °C 60-120 seconds 150 °C 200 °C 60-120 seconds 3 °C/second max. 3°C/second max. 183 °C 60-150 seconds 217 °C 60-150 seconds See Classification Temp in table 1 See Classification Temp in table 2 Time (tP)** within 5°C of the specified classification temperature (Tc) 20** seconds 30** seconds Average ramp-down rate (Tp to Tsmax) 6 °C/second max. 6 °C/second max. 6 minutes max. 8 minutes max. Preheat & Soak Temperature min (Tsmin) Temperature max (Tsmax) Time (Tsmin to Tsmax) (ts) Average ramp-up rate (Tsmax to TP) Liquidous temperature (TL) Time at liquidous (tL) Peak package body Temperature (Tp)* Time 25°C to peak temperature * Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum. ** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum. Table 1. SnPb Eutectic Process – Classification Temperatures (Tc) 3 Package Thickness <2.5 mm Volume mm <350 235 °C Volume mm ≥350 220 °C ≥2.5 mm 220 °C 220 °C 3 Table 2. Pb-free Process – Classification Temperatures (Tc) Package Thickness <1.6 mm 1.6 mm – 2.5 mm ≥2.5 mm Volume mm <350 260 °C 260 °C 250 °C 3 Volume mm 350-2000 260 °C 250 °C 245 °C 3 Volume mm >2000 260 °C 245 °C 245 °C 3 Reliability Test Program Test item SOLDERABILITY HOLT PCT TCT HBM MM Latch-Up Method JESD-22, B102 JESD-22, A108 JESD-22, A102 JESD-22, A104 MIL-STD-883-3015.7 JESD-22, A115 JESD 78 Copyright ANPEC Electronics Corp. Rev. A.5 - Feb., 2013 23 Description 5 Sec, 245°C 1000 Hrs, Bias @ Tj=125°C 168 Hrs, 100%RH, 2atm, 121°C 500 Cycles, -65°C~150°C VHBM≧2KV VMM≧200V 10ms, 1tr≧100mA www.anpec.com.tw APA2603B Customer Service Anpec Electronics Corp. Head Office : No.6, Dusing 1st Road, SBIP, Hsin-Chu, Taiwan Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 2F, No. 11, Lane 218, Sec 2 Jhongsing Rd., Sindian City, Taipei County 23146, Taiwan Tel : 886-2-2910-3838 Fax : 886-2-2917-3838 Copyright ANPEC Electronics Corp. Rev. A.5 - Feb., 2013 24 www.anpec.com.tw