MAXIM MAX3982UTE

19-3354; Rev 0; 8/04
SFP Copper-Cable Preemphasis Driver
The MAX3982 is a single-channel, copper-cable preemphasis driver that operates from 1Gbps to 4.25Gbps. It
provides compensation for copper links, such as
4.25Gbps Fibre Channel, allowing spans of up to 15m
with 24AWG. The cable driver provides four selectable
preemphasis levels. The input compensates for up to
10in of FR4 circuit board material at 4.25Gbps.
The MAX3982 also features SFP-compliant loss-of-signal
detection with selectable sensitivity and TX_DISABLE.
Selectable output swing reduces EMI and power consumption. It is packaged in a 3mm x 3mm, 16-pin thin
QFN and operates from 0°C to +85°C temperature range.
Applications
Features
♦ Drives Up to 15m with 24AWG Cable
♦ Drives Up to 30in of FR4
♦ 0.25W Total Power with +3.3V Supply
♦ Selectable 1600mVP-P or 1200mVP-P Differential
Output Swing
♦ Selectable Output Preemphasis
♦ Fixed Input Equalization
♦ Loss-of-Signal Detection with Selectable
Sensitivity
♦ Transmit Disable
SFP Active Copper-Cable Assemblies
Backplanes
Ordering Information
1.0625Gbps, 2.125Gbps, and 4.25Gbps Fibre
Channel
PART
TEMP
RANGE
MAX3982UTE
0°C to +85°C
1.25Gbps Ethernet
2.488Gbps STM16
InfiniBand
PINPACKAGE
16 Thin QFN
PKG
CODE
T1633-4
Pin Configuration appears at end of data sheet.
PCI Express
Typical Application Circuit
DISK
ENCLOSURE
FABRIC SWITCH
SFP ACTIVE CABLE ASSEMBLY
+3.3V
VCC OR
GND
SWITCH OR
SERDES
TX+
≤ 15m (24AWG)
UP TO 4.25Gbps
V
TX_DISABLE CC
PE0
PE1
LOSLEV MAX3982
0.01µF
TX-
LOS
COPPER-CABLE
DIFFERENTIAL 100Ω TWIN-AX
IN+
OUT+
IN-
GND
4.25Gbps LIMITING
AMPLIFIER
0.01µF
0.01µF
IN+
IN-
OUT-
+3.3V
RX-
0.01µF
OUT+
RX-
OUT-
GND
0.01µF
OUT+
VCC
OUT-
+3.3V
IN+
IN-
4.25Gbps LIMITING
AMPLIFIER
≤ 5V
0.01µF
0.01µF
OUT+
VCC
GND
IN+
OUT-
0.01µF
LOS
GND
PE0
PE1
LOSLEV
TX+
TX-
IN-
MAX3982
≥4.7kΩ
LOS
SWITCH OR
SERDES
RX+
0.01µF
0.01µF
0.01µF
RX+
≥ 4.7kΩ
VCC
LOS
OUTLEV
0.01µF
≤ 5V
+3.3V
VCC OR
GND
OUTLEV
TX_DISABLE
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1
MAX3982
General Description
MAX3982
SFP Copper-Cable Preemphasis Driver
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, VCC..............................................-0.5V to +6.0V
Continuous CML Output Current
at OUT+, OUT-..............................................-25mA to +25mA
Voltage at IN+, IN-, LOSLEV, LOS,
TX_DISABLE, PE0, PE1, OUTLEV ..........-0.5V to (VCC + 0.5V)
LOS Open Collector Supply Voltage
with ≥ 4.7kΩ Pullup Resistor..............................-0.5V to +5.5V
Continuous Power Dissipation at +85°C
(derate 20.8mW/°C above +85°C) .................................1.35W
Operating Junction Temperature Range (TJ) ....-55C° to +150°C
Storage Ambient Temperature Range (TS) .......-55C° to +150°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = +3.0V to +3.6V, TA = 0°C to +85°C. Typical values are at TA = +25°C and VCC = +3.3V, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
Supply Current
TX_DISABLE=low
Inrush Current
Current beyond steady-state current
Power-On-Reset Delay
tPOR
MIN
TYP
75
1
MAX
UNITS
97
mA
10
mA
40
ms
OPERATING CONDITIONS
Supply Voltage
VCC
Operating Ambient Temperature
3.0
1MHz ≤ f < 2GHz
Supply-Noise Tolerance
TA
NRZ data (Note 1)
CID
Consecutive identical digits (bits) (Note 1)
3.6
40
0
Bit Rate
3.3
25
1.0
V
mVP-P
85
°C
4.25
Gbps
10
Bits
0.8
V
CONTROL INPUTS: TX_DISABLE, PE0, PE1, OUTLEV, LOSLEV
Voltage, Logic High
VIH
Voltage, Logic Low
VIL
2.0
V
Current, Logic High
IIH
VIH = VCC + 0.5V
-150
µA
Current, Logic Low
IIL
VIL = 0.8V
350
µA
25
µA
STATUS OUTPUT: LOS
LOS asserted
LOS Open Collector Current Sink
LOS Assert Level
LOS Deassert Level
LOS Hysteresis
LOS unasserted, VOL ≤ 0.4V with 4.7kΩ
pullup resistor, pullup supply = 5.5V
1.0
VCC = 0V, pullup supply = 5.5V, external
pullup resistor ≥ 4.7kΩ
0
mA
25
µA
LOSLEV = high (Note 1)
100
mVP-P
LOSLEV = low (Note 1)
50
mVP-P
LOSLEV = high (Note 1)
300
120
LOSLEV = low (Note 1)
LOSLEV = high (Note 1)
LOSLEV = low (Note 1)
LOS Response Time
Time from IN dropping below assert level,
or rising above deassert level to 50% point
of LOS
LOS Transition Time
Rise-time or fall-time (10% to 90%), external
pullup resistor = 4.7kΩ
2
0
20
mVP-P
mVP-P
mVP-P
mVP-P
4
10
250
_______________________________________________________________________________________
µs
ns
SFP Copper-Cable Preemphasis Driver
MAX3982
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +3.0V to +3.6V, TA = 0°C to +85°C. Typical values are at TA = +25°C and VCC = +3.3V, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
2000
mVP-P
115
Ω
EQUALIZER AND CABLE DRIVER SPECIFICATIONS
Input Swing
Measured differentially at point A of Figure
2 (Note 1)
600
Input Resistance
Measured differentially
85
Input Return Loss
100MHz to 2GHz (Note 1)
Measured
differentially at point
B of Figure 2
(Notes 1, 2)
Differential Output Swing
10
1450
1800
TX_DISABLE = low,
OUTLEV = low
1000
1350
(OUT+) + (OUT-), measured at point B of
Figure 2; TX_DISABLE = low, OUTLEV =
high (Notes 1, 2)
Output Resistance
OUT+ or OUT- to VCC, single ended
42
Output Return Loss
100MHz to 2GHz (Note 1)
10
Random Jitter
20% to 80% (Notes 1, 3)
60
50
See Figure 1
Source to IN
50
Residual Output Deterministic
Jitter at 1.0625Gbps to
2.125Gbps (Notes 1, 4, 5)
6 mil
FR4 ≤ 10in
Source to IN
Residual Output Deterministic
Jitter at 4.25Gbps (Notes 1, 4, 5)
6 mil
FR4 ≤ 10in
PE1
PE0
0
0
2
0
1
4
1
0
8
14
1
1
OUT to Load
PE1
PE0
1m, 24AWG
0
0
5m, 24AWG
0
1
10m, 24AWG
1
0
15m, 24AWG
1
1
OUT to Load
PE1
PE0
1m, 24AWG
0
0
5m, 24AWG
0
1
10m, 24AWG
1
0
15m, 24AWG
1
1
58
mVP-P
Ω
dB
(Notes 1, 3)
Output Preemphasis
mVP-P
40
Common-Mode Output
tr, tf
dB
TX_DISABLE = low,
OUTLEV = high
TX_DISABLE = high
Output Transition Time
100
80
ps
1.6
psRMS
dB
0.10
0.15
UIP-P
0.15
0.20
UIP-P
Note 1: Guaranteed by design and characterization.
Note 2: PE1 = PE0 = 1 for maximum preemphasis, load is 50Ω ±1% at each side, and the pattern is 0000011111 at 1Gbps.
Note 3: Measured at point B in Figure 2 using 0000011111 at 1Gbps. PE1 = PE0 = 0 for minimum preemphasis. For transition time,
the 0% reference level is the steady-state level after four zeros, just before the transition. The 100% reference level is the
maximum voltage of the transition.
Note 4: Tested with CJTPAT, as well as this pattern: 19 zeros, 1, 10 zeros, 1010101010 (D21.5 character), 1100000101 (K28.5+
character), 19 ones, 0, 10 ones, 0101010101 (D10.2 character), 0011111010 (K28.5 character).
Note 5: Cables are unequalized, Amphenol Spectra-Strip 24AWG. Residual deterministic jitter is the difference between the source
jitter at point A, and load jitter at point D in Figure 2. The deterministic jitter at the output of the transmission line must be
from media-induced loss and not from clock-source modulation.
_______________________________________________________________________________________
3
MAX3982
SFP Copper-Cable Preemphasis Driver
VLOW_PP VHIGH_PP
 V

HIGH _ PP 
PE(dB) = 20 log 

  VLOW _ PP  


Figure 1. Illustration of Tx Preemphasis in dB
TEST SETUP
PCBOARD (FR4)
SIGNAL
SOURCE
A
B
MAX3982
6 mil
IN
24AWG 100Ω TWIN-AX
OUT
1in ≤ L ≤ 10in
6 mil
L = 2in
SMA CONNECTORS
SMA CONNECTORS
OSCILLOSCOPE OR
ERROR DETECTOR
L ≤ 1in
6 mil
D
FR4
4.0 ≤ εR ≤ 4.4
tan δ = 0.022
Figure 2. Test Setup. The points labeled A, B, and D are referenced for AC parameter test conditions. Deterministic jitter and eye
diagrams measured at point D.
4
_______________________________________________________________________________________
SFP Copper-Cable Preemphasis Driver
MAX3982
TEST SETUP
PC BOARD (FR4)
A
SIGNAL
SOURCE
B
MAX3982
6 mil
SMA CONNECTORS
IN
24AWG 100Ω TWIN-AX
6 mil
OUT
1in ≤ L ≤ 12in
L = 2in
L ≤ 1in
L ≤ 1in
SMA CONNECTORS
39Ω
OSCILLOSCOPE OR
ERROR DETECTOR
22pF
MAX3748
6 mil
IN
OUT
22pF
FR4
4.0 ≤ εR ≤ 4.4
tan δ = 0.022
D
39Ω
Figure 3. End-to-End Test Setup Using the MAX3748 as a Receiver. Deterministic jitter and eye diagrams measured at point D.
Typical Operating Characteristics
(VCC = +3.3V, TA = +25°C, unless otherwise noted. PRBS7 + 100CID pattern is PRBS 27, 100 zeros, 1010, PRBS 27, 100 ones, 0101.)
D
C
B
A
C = 8dB, PE = 10
D = 14dB, PE = 11
DETERMINISTIC JITTER (UI)
A
B
C
D
A = 2dB, PE = 00
B = 4dB, PE = 01
4.25Gbps PRBS7 + 100CID
0.9
PE[1,0] = 00
PE[1,0] = 01
12in FR4 AT INPUT
USING MAX3748 AS
RECEIVER, AS SHOWN
IN FIGURE 3
0.8
0.7
0.6
0.5
PE[1,0] = 10
PE[1,0] = 11
0.4
1.0
0.3
12in FR4 AT INPUT
USING MAX3748 AS RECEIVER,
AS SHOWN IN FIGURE 3
0.8
0.7
PE[1,0] = 00
0.6
PE[1,0] = 01
0.5
0.4
PE[1,0] = 10
0.3
0.2
0.2
0.1
0.1
0
2.125Gbps PRBS7 + 100CID
0.9
DETERMINISTIC JITTER (UI)
1.0
4.25Gbps K28.7 PATTERN
OUTLEV = HIGH
END-TO-END DETERMINISTIC JITTER
vs. CABLE LENGTH AT 2.125Gbps
MAX3982 toc02
MAX3982 toc01
MAX3982 toc03
END-TO-END DETERMINISTIC JITTER
vs. CABLE LENGTH AT 4.25Gbps
TRANSIENT RESPONSE
PE[1,0] = 11
0
0
5
10
CABLE LENGTH (m)
15
20
0
5
10
15
20
CABLE LENGTH (m)
_______________________________________________________________________________________
5
Typical Operating Characteristics (continued)
(VCC = +3.3V, TA = +25°C, unless otherwise noted. PRBS7 + 100CID pattern is PRBS 27, 100 zeros, 1010, PRBS 27, 100 ones, 0101.)
END-TO-END EYE DIAGRAM,
20m 24AWG CABLE AT 4.25Gbps
END-TO-END EYE DIAGRAM,
20m 24AWG CABLE AT 2.125Gbps
MAX3982 toc04
0.35
0.30
PE[1,0] = 01
0.25
0.20
PE[1,0] = 10
0.15
PE[1,0] = 11
0.10
PE[1,0] = 00
600
500
PE[1,0] = 01
400
PE[1,0] = 10
300
PE[1,0] = 11
200
100
0.05
4.25Gbps PRBS7 + 100CID
0
0
5
10
15
0
20
5
VERTICAL EYE OPENING
vs. CABLE LENGTH WITH OUTLEV = LOW
PE[1,0] = 01
500
400
-5
DIFFERENTIAL S11 (dB)
PE[1,0] = 00
600
15
INPUT RETURN LOSS vs. FREQUENCY
0
MAX3982 toc09
700
10
CABLE LENGTH (m)
CABLE LENGTH (m)
PE[1,0] = 10
300
PE[1,0] = 11
200
-10
USING AGILENT 8720ES AND ATN MICROWAVE
ATN-4112A S-PARAMETER TEST SET
DE-EMBEDDING SMA CONNECTOR, COUPLING
CAPACITOR, AND 1cm TRACE
MAX3982 toc10
0
-15
-20
-25
-30
100
-35
4.25Gbps PRBS7 + 100CID
0
0
5
-40
10
CABLE LENGTH (m)
6
MAX3982 toc08
MAX3982 toc07
PE[1,0] = 00
700
VERTICAL EYE OPENING (mVP-P)
DETERMINISTIC JITTER (UI)
12in FR4 AT INPUT
USING MAX3748 AS RECEIVER,
AS SHOWN IN FIGURE 3
0.40
1.0625Gbps PRBS7 + 100CID PATTERN,
0in FR4 AT INPUT, USING MAX3748
AS RECEIVER, AS SHOWN IN FIGURE 3
VERTICAL EYE OPENING
vs. CABLE LENGTH WITH OUTLEV = LOW
1.0625Gbps PRBS7 + 100CID
0.45
MAX3982 toc06
2.125Gbps PRBS7 + 100CID PATTERN,
0in FR4 AT INPUT, USING MAX3748
AS RECEIVER, AS SHOWN IN FIGURE 3
END-TO-END DETERMINISTIC JITTER
vs. CABLE LENGTH AT 1.0625Gbps
0.50
END-TO-END EYE DIAGRAM,
20m 24AWG CABLE AT 1.0625Gbps
MAX3982 toc05
4.25Gbps PRBS7 + 100CID PATTERN,
0in FR4 AT INPUT, USING MAX3748
AS RECEIVER, AS SHOWN IN FIGURE 3
VERTICAL EYE OPENING (mVP-P)
MAX3982
SFP Copper-Cable Preemphasis Driver
15
100
1000
FREQUENCY (MHz)
_______________________________________________________________________________________
10,000
SFP Copper-Cable Preemphasis Driver
(VCC = +3.3V, TA = +25°C, unless otherwise noted. PRBS7 + 100CID pattern is PRBS 27, 100 zeros, 1010, PRBS 27, 100 ones, 0101.)
15m 24AWG CABLE ASSEMBLY
OUTPUT WITH MAX3982
PREEMPHASIS, 4.25Gbps CJTPAT
MAX3982 toc11
DETERMINISTIC JITTER
vs. CABLE LENGTH
MAX3982 toc12
1.0
40mV/div
DETERMINISTIC JITTER (UI)
4.25Gbps
PRBS7 + 100CID
0.8
MAX3982 toc13
15m 24AWG CABLE ASSEMBLY
OUTPUT WITHOUT MAX3982,
4.25Gbps CJTPAT
PE[1,0] = 00
PE[1,0] = 01
0.6
PE[1,0] = 10
0.4
PE[1,0] = 11
0.2
PREEMPHASIS, PE[1,0] = 11, OUTLEV = HIGH
0
0
5
15
10
CABLE LENGTH (m)
15m 24AWG CABLE ASSEMBLY
OUTPUT WITH MAX3982
PREEMPHASIS, 4.25Gbps PRBS7 + 100CID
MAX3982 toc14
OUTPUT RETURN LOSS
vs. FREQUENCY
MAX3982 toc15
0
40mV/div
DIFFERENTIAL S22 (dB)
-5
-10
USING AGILENT 8720ES AND ATN MICROWAVE
ATN-4112A S-PARAMETER TEST SET
DE-EMBEDDING SMA CONNECTOR, COUPLING
CAPACITOR, AND 1cm TRACE
MAX3982 toc16
15m 24AWG CABLE ASSEMBLY
OUTPUT WITHOUT MAX3982,
4.25Gbps PRBS7 + 100CID
-15
-20
-25
-30
-35
PREEMPHASIS, PE[1,0] = 11, OUTLEV = HIGH
-40
100
1000
10,000
FREQUENCY (MHz)
_______________________________________________________________________________________
7
MAX3982
Typical Operating Characteristics (continued)
Typical Operating Characteristics (continued)
(VCC = +3.3V, TA = +25°C, unless otherwise noted. PRBS7 + 100CID pattern is PRBS 27, 100 zeros, 1010, PRBS 27, 100 ones, 0101.)
15m 24AWG CABLE ASSEMBLY
OUTPUT WITHOUT MAX3982,
4.25Gbps PRBS31
15m 24AWG CABLE ASSEMBLY
OUTPUT WITH MAX3982
PREEMPHASIS, 4.25Gbps PRBS31
MAX3982 toc17
HOT-PLUG WITH TX_DISABLE LOW
MAX3982 toc19
MAX3982 toc18
3.3V
40mV/div
VCC
0V
LOW
TX_DISABLE
tPOR = 27ms
OUT+
PREEMPHASIS, PE[1,0] = 11, OUTLEV = HIGH
10ms/div
30in FR4 OUTPUT
WITH MAX3982 PREEMPHASIS,
4.25Gbps CJTPAT
MAX3982 toc20
DETERMINISTIC JITTER
vs. FR4 LENGTH
MAX3982 toc21
1.2
4.25Gbps PRBS7
DRIVING FR4 AT OUT+ AND
OUT-, NO FR4 AT INPUT
DETERMINISTIC JITTER (UI)
1.0
PREEMPHASIS, PE[1,0] = 10,
OUTLEV = HIGH
PE[1,0] = 00
0.8
PE[1,0] = 01
0.6
0.4
PE[1,0] = 11 PE[1,0] = 10
0.2
0
0
10
20
30
FR4 LENGTH (in)
8
_______________________________________________________________________________________
40
50
MAX3982 toc22
30in FR4 OUTPUT
WITHOUT MAX3982,
4.25Gbps CJTPAT
100mV/div
MAX3982
SFP Copper-Cable Preemphasis Driver
SFP Copper-Cable Preemphasis Driver
(VCC = +3.3V, TA = +25°C, unless otherwise noted. PRBS7 + 100CID pattern is PRBS 27, 100 zeros, 1010, PRBS 27, 100 ones, 0101.)
30in FR4 OUTPUT
WITHOUT MAX3982
4.25Gbps PRBS7 + 100CID
30in FR4 OUTPUT
WITH MAX3982 PREEMPHASIS,
4.25Gbps PRBS7 + 100CID
MAX3982 toc23
TRANSMITTER ENABLE
MAX3982 toc24
MAX3982 toc25
VCC
3.3V
100mV/div
HIGH
TX_DISABLE
LOW
OUT+
PREEMPHASIS, PE[1,0] = 10,
OUTLEV = HIGH
200ns/div
30in FR4 OUTPUT
WITH MAX3982 PREEMPHASIS,
4.25Gbps PRBS31
30in FR4 OUTPUT
WITHOUT MAX3982,
4.25Gbps PRBS31
TRANSMITTER DISABLE
MAX3982 toc28
MAX3982 toc27
MAX3982 toc26
VCC
3.3V
HIGH
100mV/div
TX_DISABLE
LOW
OUT+
PREEMPHASIS, PE[1,0] = 10, OUTLEV = HIGH
200ns/div
_______________________________________________________________________________________
9
MAX3982
Typical Operating Characteristics (continued)
MAX3982
SFP Copper-Cable Preemphasis Driver
Pin Description
PIN
NAME
FUNCTION
1
VCC1
2
IN+
Positive Data Input, CML. This input is internally terminated with 50Ω to VCC1.
3
IN-
Negative Data Input, CML. This input is internally terminated with 50Ω to VCC1.
4, 8, 9
GND
Power-Supply Connection for Input. Connect to +3.3V.
Circuit Ground
Output-Swing Control Input, LVTTL with 40kΩ Internal Pullup. Set to TTL high or open for maximum
output swing, or set to TTL low for reduced swing.
5
OUTLEV
6
PE1
Output Preemphasis Control Input, LVTTL with 10kΩ Internal Pullup. This pin is the most significant bit
of the 2-bit preemphasis control. Set high or open to assert this bit.
7
PE0
Output Preemphasis Control Input, LVTTL with 10kΩ Internal Pullup. This pin is the least significant bit
of the 2-bit preemphasis control. Set high or open to assert this bit.
10
OUT-
Negative Data Output, CML. This output is terminated with 50Ω to VCC2.
11
OUT+
Positive Data Output, CML. This output is terminated with 50Ω to VCC2.
12, 13
VCC2
Power-Supply Connection for Output. Connect to +3.3V.
14
TX_DISABLE
15
LOS
16
LOSLEV
EP
EXPOSED
PAD
Transmitter Disable Input, LVTTL with 10kΩ Internal Pullup. When high or open, differential output is
40mVP-P. Set low for normal operation.
Loss-of-Signal Detect, TTL Output. This output is open-collector TTL, and therefore requires an external
4.7kΩ to 10kΩ pullup resistor (5.5V maximum). This output sinks current when the input signal level is
valid.
LOS Sensitivity Control Input, LVTTL with 40kΩ Internal Pullup. Set to TTL high or open for less
sensitivity (higher assert threshold). Set to TTL low for more sensitivity (lower assert threshold).
Exposed Pad. For optimal thermal conductivity, this pad must be soldered to the circuit board ground.
LOSLEV
LOS
TX_DISABLE
VCC2
Pin Configuration
16
15
14
13
TOP VIEW
2
IN-
3
GND
4
MAX3982UTE
EXPOSED PAD*
OUTLEV
5
6
7
8
GND
IN+
PE0
1
PE1
VCC1
12
VCC2
11
OUT+
10
OUT-
9
GND
THIN QFN
*THE EXPOSED PAD OF THE QFN PACKAGE MUST BE SOLDERED TO GROUND
FOR PROPER THERMAL OPERATION OF THE MAX3982.
10
______________________________________________________________________________________
SFP Copper-Cable Preemphasis Driver
MAX3982
VCC2
10kΩ
VCC2
MAX3982
2
2
PE0
PE1
LVTTL
VCC2
VCC1
LIMITER
IN+
CML
IN-
FIXED
EQUALIZER
PREEMPHASIS
OUT+
CML
OUTLOS
VCC1
SIGNAL DETECT
40kΩ
LOSLEV
VCC1
LVTTL
VCC2
10kΩ
VCC2
LVTTL
TX_DISABLE
VCC2
40kΩ
VCC2
LVTTL
OUTLEV
GND
Figure 4. Functional Diagram
Detailed Description
The MAX3982 comprises a PC board receiver, a cable
driver, and a loss-of-signal detector with adjustable
threshold (Figure 4). Equalization is provided in the
receiver. Selectable preemphasis and selectable output
amplitude are included in the transmitter. The MAX3982
also includes transmit disable control for the output.
PC Board Receiver and Cable Driver
Data is fed into the MAX3982 through a CML input
stage and fixed equalization stage. The fixed equalizer
in the receiver corrects for up to 10in of PC board loss
on FR4 material at 4.25Gbps.
The cable driver includes four-state preemphasis to
compensate for up to 15m of 24AWG, 100Ω balanced
cable. Table 1 is provided for easy translation between
preemphasis expressions. The OUTLEV pin selects the
output amplitude. When OUTLEV is low, the amplitude
is 1200mVP-P. When OUTLEV is high, the amplitude is
1600mVP-P. Residual jitter of the MAX3982 is independent of up to 0.20UIP-P source jitter.
Loss-of-Signal (LOS) Output
Loss-of-signal detection is provided on the data input.
Pullup resistors should be connected from LOS to a
supply in the range of +3.0V to +5.5V. The LOS output
is not valid until power-up is complete. Typical LOS
response time is 100ns.
The LOS assert and deassert levels are set by the
LOSLEV pin. When LOSLEV is LVTTL high or open, the
LOS assert threshold is 180mV P-P. When LOSLEV is
LVTTL low, the LOS assert threshold is 85mVP-P.
TX Disable
Transmit disable is provided to turn off the output when
desired. The TX_DISABLE pin can be connected to
LOS to automatically squelch the output when the
incoming signal is below the threshold set by LOSLEV
(see the Autodetect section).
______________________________________________________________________________________
11
MAX3982
SFP Copper-Cable Preemphasis Driver
Table 1. Preemphasis Translation
Ratio
α
VHIGH _ PP
VHIGH _ PP − VLOW _ PP
VLOW _ PP
VHIGH _ PP + VLOW _ PP
1.26
0.11
0.21
2
1.58
0.23
0.37
4
2.51
0.43
0.6
8
5.01
0.67
0.8
14
10Gbase–CX4
1−
VLOW _ PP
VHIGH _ PP
IN dB
 V

HIGH _ PP 
20 log 

  VLOW _ PP  


VLOW_PP VHIGH_PP
Layout Considerations
Applications Information
Autodetect
The MAX3982 can automatically detect an incoming
signal and enable the data outputs. Autodetect can be
accomplished by connecting the LOS pin to TX_DISABLE. TX_DISABLE has a 10kΩ internal pullup resistor.
If a loss-of-signal is detected, the TX_DISABLE pin is
forced high and disables the outputs. Leaving the
inputs to the MAX3982 open (i.e., floating) is not recommended as noise amplification may occur and create
undesirable output signals. Autodetect is recommended to eliminate noise amplification or possible oscillation. For periods much greater than 100ns without data
transitions, autodetect disables the output.
Circuit board layout and design can significantly affect
the performance of the MAX3982. Use good high-frequency design techniques, including minimizing ground
inductance and using controlled-impedance transmission lines on the data signals. Power-supply decoupling
should also be placed as close to the VCC pins as possible. This should be sufficient supply filtering. Always connect all VCC pins to a power plane. Take care to isolate
the input from the output signals to reduce feedthrough.
Exposed Pad Package
The exposed-pad, 16-pin QFN package incorporates
features that provide a very low thermal resistance path
for heat removal from the IC. The exposed pad on the
MAX3982 must be soldered to the circuit board for
proper thermal performance. For more information on
exposed-pad packages, refer to Maxim Application
Note HFAN-08.1: Thermal Considerations of QFN and
Other Exposed-Paddle Packages.
Interface Schematics
VCC2
VCC1
50Ω
50Ω
50Ω
50Ω
OUT+
IN+
OUTIN-
GND
Figure 5. IN+/IN- Equivalent Input Structure
12
GND
Figure 6. OUT+/OUT- Equivalent Output Structure
______________________________________________________________________________________
SFP Copper-Cable Preemphasis Driver
MAX3982
LOS
VCCX
RPULLUP
GND
LVTTL IN
Figure 8. Loss-of-Signal Equivalent Output Structure
GND
LOSLEV
VCCX RPULLUP (kΩ)
40
VCC1
OUTLEV
VCC2
40
TX_DISABLE, PE0, PE1 VCC2
10
PIN NAME
Chip Information
TRANSISTOR COUNT: 2957
PROCESS: SiGe Bipolar
Figure 7. LVTTL Equivalent Input Structure
______________________________________________________________________________________
13
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
12x16L QFN THIN.EPS
MAX3982
SFP Copper-Cable Preemphasis Driver
D2
0.10 M C A B
b
D
D2/2
D/2
E/2
E2/2
CL
(NE - 1) X e
E
E2
L
e
CL
k
(ND - 1) X e
CL
0.10 C
CL
0.08 C
A
A2
A1
L
L
e
e
PACKAGE OUTLINE
12, 16L, THIN QFN, 3x3x0.8mm
21-0136
14
______________________________________________________________________________________
E
1
2
SFP Copper-Cable Preemphasis Driver
EXPOSED PAD VARIATIONS
DOWN
BONDS
ALLOWED
NOTES:
1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994.
2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES.
3. N IS THE TOTAL NUMBER OF TERMINALS.
4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO
JESD 95-1 SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED
WITHIN THE ZONE INDICATED. THE TERMINAL #1 IDENTIFIER MAY BE EITHER A MOLD OR
MARKED FEATURE.
5. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.20 mm AND 0.25 mm
FROM TERMINAL TIP.
6. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY.
7. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION.
8. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS.
9. DRAWING CONFORMS TO JEDEC MO220 REVISION C.
PACKAGE OUTLINE
12, 16L, THIN QFN, 3x3x0.8mm
21-0136
E
2
2
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 15
© 2004 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
MAX3982
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)