Design Example Report Title 24.5W Power Supply using DPA424G Specification Input: -40 VDC Output: -28V / 480mA, -65 V / 170mA Application Telecom Line Card Author Power Integrations Applications Department Document Number DER-43 Date November 18, 2004 Revision 1.0 Summary and Features • • • • • • • Very high efficiency (>92 % at full load) Built-in input under-voltage lockout Single converter for both generating dual output voltages Non-isolated design Compact design Transistor feedback signal (instead of opto-coupler) Low component count The products and applications illustrated herein (including circuits external to the products and transformer construction) may be covered by one or more U.S. and foreign patents or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of Power Integrations’ patents may be found at www.powerint.com. Power Integrations 5245 Hellyer Avenue, San Jose, CA 95138 USA. Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-43 24.5 W Telecom Line Card PSU November 18, 2004 Table Of Contents 1 2 Introduction .................................................................................................................3 Power Supply Specification ........................................................................................4 3 Schematic ...................................................................................................................5 4 Circuit Operation.........................................................................................................6 4.1 General................................................................................................................6 4.2 Description...........................................................................................................6 5 BOM............................................................................................................................7 6 Layout .........................................................................................................................8 7 Transformer Design Spreadsheet ...............................................................................9 8 Transformer Specification .........................................................................................11 8.1 Transformer Winding .........................................................................................11 8.2 Electrical Specifications .....................................................................................11 8.3 Materials ............................................................................................................11 8.4 Transformer Build Diagram................................................................................12 8.5 Transformer Construction ..................................................................................12 9 Efficiency ..................................................................................................................13 10 Regulation vs. Load...............................................................................................14 11 Low Load Power Consumption .............................................................................15 12 Drain Voltage and Current Waveforms..................................................................16 13 Transient Load ......................................................................................................17 13.1 Transient Load Test Setup ................................................................................17 13.2 Transient Load Performance .............................................................................18 14 Output Ripple ........................................................................................................19 14.1 Output Ripple Measurement Technique ............................................................19 14.2 Full Load Ripple Performance ...........................................................................20 14.3 No Load Ripple Performance ............................................................................20 15 Other results..........................................................................................................21 16 Revision History ....................................................................................................22 Important Note: This board is designed to be non-isolated. Please take necessary safety precautions. Design Reports contain a power supply design specification, schematic, bill of materials, and transformer documentation. Performance data and typical operation characteristics are included. Typically only a single prototype has been built. Page 2 of 23 Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-43 24.5 W Telecom Line Card PSU November 18, 2004 1 Introduction This document is an engineering report describing a prototype power supply used on the line cards of a PABX phone system, utilizing DPA424G. The power supply delivers 24.5 W continuous from a -40 VDC input. The power supply uses transistor based nonisolated feedback instead of an opto-coupler (opto-couplers are not permitted for some telecom supplies). This document provides complete design information including specification, schematic, bill of material and transformer design and construction information. The document also provides performance information. Figure 1 – Top view of board Page 3 of 23 Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-43 24.5 W Telecom Line Card PSU November 18, 2004 2 Power Supply Specification Description Input Voltage Symbol Min Typ Max Units VIN 32. 40 48 VDC 32.7 VDC Under-Voltage VIN_UV Over-Voltage VIN_OV Output Output Voltage 1 Output Ripple Voltage 1 Output Current 1 Output Voltage 2 Output Ripple Voltage 2 Output Current 2 Total Output Power Average Output Power Average Output Power Average Output Power Average Output Power Full Load Efficiency N/A VOUT1 VRIPPLE1 IOUT1 -26.6 VOUT2 -61.75 -28 10 -65 VRIPPLE2 IOUT2 1 V mVp-p mA 20 MHz bandwidth -68.25 V ± 5% 650 mVp-p 20 MHz bandwidth 170 mA 100 77 Power supply should not operate below this input voltage. Power supply should not operate above this input voltage. -29.4 280 480 13.44 11.05 24.5 POUT1 POUT2 POUT_TOTAL POUT_FAULT η VDC Comment 92 ± 5% W W W W % Environmental Conducted EMI Meets CISPR22B / EN55022B Designed to meet IEC950, UL1950 Class II Safety Ambient Temperature Page 4 of 23 TAMB 0 40 o C Forced airflow Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-43 24.5 W Telecom Line Card PSU November 18, 2004 3 Schematic Figure 2 –Schematic Page 5 of 23 Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-43 24.5 W Telecom Line Card PSU November 18, 2004 4 Circuit Operation 4.1 General The power supply uses a DPA424 device (U4), with integrated MOSFET and controller, in a non-isolated flyback configuration. The circuit also uses the under-voltage shutdown feature of the device. 4.2 Description The input is decoupled by capacitor (C16). The DPA-Switch (U4) provides the PWM, controller and main switching MOSFET for this flyback supply. Resistor R5 programs the under-voltage shutdown of the DPA-Switch (U4). Startup will occur at voltages between 32.9 V (min) and 38.7 V (max). Resistor R14 programs the current limit of the DPASwitch. Capacitors C13 and C14 provide device decoupling with C14 also program the startup and autorestart period of the device. Resistor R13 provides feedback compensation in conjunction with C14. Components D2, C1, R1, R2 and R3 form an RCD clamp circuit to limit the leakage inductance voltage spikes at primary turn-off. The inductance of transformer T2 provides the energy storage and conversion component of the circuit. The winding for the –28 V output is connected to the 0V input rail and thus is non-isolated but the transformer does provide functional isolation (not safety isolation) for the winding generating the –65 V output, generated from the –40 V DC input rail. The –28 V output is rectified and filtered by diode D1 and capacitors C11, C17 and C18. The –65 V output is rectified and filtered by diode D4 and capacitors C9 and C20 (note: the output capacitors used on the prototype are through-hole aluminum-electrolytic capacitors but are intended to be replaced with SMD aluminum-electrolytic capacitors, that were not available in time for the construction of this prototype). In this power supply the input rails are used as references to generate the output voltages, as such we need to make sure that there is not primary side switching ripple on the 0 V and –40 V rails. This is achieved using additional decoupling capacitors C19 and C15. Without these two capacitors, all the ripple generated by primary switching, would also be superimposed on the output voltages. Resistor R8 senses the –65 V output voltage and components R11, Q3 and R19 form an inverting follower to provide sense of the –28 V output voltage. Both of these sense signals are summed and generate a voltage on resistor R15, which controls the LM431 (U3). Components R12 and C12 provide compensation for U3, to make sure that it’s frequency response is limited only to low-frequency signals. Resistor R20 provides bias current to U3 (from the –40 V rail). Components R18, Q2, R16 provide level shifting to transmit the feedback signal. Capacitor C21 increase the high frequency response of the loop. Components R17, Q1 provide the final connection of the to the CONTROL pin of U4, with diode D5 preventing reverse biasing of the Q1 collector-base junction when the base is below CONTROL pin potential (which happens at startup). Resistor R17 in conjunction with R16 and R18 program the DC gain of the loop. Page 6 of 23 Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-43 24.5 W Telecom Line Card PSU November 18, 2004 5 BOM Item Qty. 1 Ref. Description Mfg Part Number Mfg 1 nF, 50 V, Ceramic, X7R, 0805 ECJ-2VB1H102K 2 1 C1 C9 C11 C17 C18 6 C19 C20 47 uF, 50 V, Electrolytic, Low ESR, 450 mOhm, (6.3 x 11.5) LXZ50VB47RMF11LL United Chemi-Con 3 1 C12 1 uF, 25 V, Ceramic, X7R, 1206 ECJ-3YB1E105K Panasonic 4 1 C13 220 nF, 25 V, Ceramic, X7R, 0805 ECJ-2YB1E224K Panasonic 5 1 C14 47 uF, 6.3 V, Electrolytic, (4 x 5.4), SMD EEVHA0L470WR Panasonic 6 2 C15 C16 220 nF, 50 V, Ceramic, X7R, 1206 ECJ-3YB1H224K Panasonic 7 1 C21 2.2 uF, 25 V, Ceramic, X7R, 1206 ECJ-3YB1E225K Panasonic 8 2 D1 D4 Vishay 9 1 D2 60 V, 2 A, Schottky, DO-214AA SS26 100 V, 1 A, Ultrafast Recovery, 25 ns, DOES1B 214AC 75 V, 0.15 A, Fast Switching, 4 ns, MELF LL4148 Diode Inc. PCB Terminal Hole, 22 AWG PNP, Small Signal BJT, 40 V, 0.2 A, SOT323 NPN, Small Signal BJT, 40 V, 0.2 A, SOT323 N/A N/A MMST3906-7 Diodes Inc MMST3904 Diodes Inc 10 Panasonic Vishay 11 1 D5 J1 J2 J3 5 J4 J5 12 2 Q1 Q3 13 1 Q2 14 3 R1 R2 R3 27 k, 5%, 1/8 W, Metal Film, 0805 ERJ-6GEYJ273V Panasonic 15 1 R5 619 k, 1%, 1/8 W, Metal Film, 0805 ERJ-6ENF6193V Panasonic 16 1 R8 499 k, 1%, 1/8 W, Metal Film, 0805 ERJ-6ENF4993V Panasonic 17 1 R11 215 k, 1%, 1/8 W, Metal Film, 0805 ERJ-6ENF2153V Panasonic 18 1 R12 220 R, 5%, 1/10 W, Metal Film, 0603 ERJ-3GEYJ221V Panasonic 19 1 R13 10 R, 5%, 1/10 W, Metal Film, 0603 ERJ-3GEYJ100V Panasonic 20 1 R14 9.53 k, 1%, 1/16 W, Metal Film, 0603 ERJ-3EKF9531V Panasonic 21 1 R15 9.09 k, 1%, 1/16 W, Metal Film, 0603 ERJ-3EKF9091V Panasonic 22 1 R16 2.7 k, 5%, 1/8 W, Metal Film, 0805 ERJ-6GEYJ272V Panasonic 23 1 R17 390 R, 5%, 1/8 W, Metal Film, 0805 ERJ-6GEYJ391V Panasonic 24 1 R18 5.6 k, 5%, 1/8 W, Metal Film, 0805 ERJ-6GEYJ562V Panasonic 25 1 R19 1 k, 5%, 1/10 W, Metal Film, 0603 ERJ-3GEYJ102V Panasonic 26 1 R20 47 k, 5%, 1/8 W, Metal Film, 0805 ERJ-6GEYJ473V Panasonic 27 1 T2 28 1 U3 Bobbin, PR14x8, Horizontal, 10 pins, SMD S-1403 2.495 V Shunt Regulator IC, 2%, -40 to LM431AIM 85C, SOT23 Pin Shine National Semiconductor 29 1 U4 DPA-Switch, DPA424G, DIP-8B Power Integrations 43 Page 7 of 23 DPA424G TOTAL COMPONENTS Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-43 6 24.5 W Telecom Line Card PSU November 18, 2004 Layout Figure 3 – PC-Board Layout Page 8 of 23 Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-43 24.5 W Telecom Line Card PSU November 18, 2004 7 Transformer Design Spreadsheet DCDC_DPASwitch_ Flyback_013004_Re vision1J. Copyright Power Integrations 2004 INPUT INFO OUTPUT UNITS DPASwitch_Flyback_013004 - Continuous/Discontinuous mode Spreadsheet. C ENTER APPLICATION VARIABLES VDCMIN VDCMAX VO PO n Z VB 36 48 28 17.7 0.8 Volts Volts Volts Watts 0.7 14 Volts Minimum DC Input Voltage Maximum DC Input Voltage Output Voltage Output Power Efficiency Estimate Loss Allocation Factor, (0.7 Recommended) Bias Voltage (Recommended between 12V and 18V) UV AND OV PARAMETERS min VUVOFF VUVON VOVON VOVOFF RL 30.05 max 30.05 33.14551Volts 32.21685 34.69326Volts 74.93483 Volts 94.74607Volts 619.1011k-Ohms Minimum undervoltage On-Off threshold Maximum undervoltage Off-On threshold (turn-on) Minimum overvoltage Off-On threshold Maximum overvoltage On-Off threshold (turn-off) ENTER DPASWITCH VARIABLES DPASWITCH Chosen Device ILIMITMAX Frequency fS VOR KI ILIMITEXT RX VDS VD VDB KRP/KDP dpa424 #N/A #N/A F #N/A 50 0.80 1 0.5 0.7 0.62 16VDC Power Out11W 2.68 Amps Hertz 50 Volts 0.8 1.856 Amps 9.501216k-Ohms Volts Volts Volts 36VDC 26W From DPASWITCH Data Sheet Enter 'F' for fS = 400KHz and 'L' for fS = 300KHz DPASWITCH Switching Frequency Reflected Output Voltage Current Limit Reduction Factor Minimum External Current limit Resistor from X pin to source to set external current limit DPASWITCH on-state Drain to Source Voltage Output Winding Diode Forward Voltage Drop Bias Winding Diode Forward Voltage Drop Ripple to Peak Current Ratio (0.2 < KRP < 1.0 : 1.0< KDP<6.0) ENTER TRANSFORMER CORE/CONSTRUCTION VARIABLES Core Type Core Manuf Bobbin Manuf Core Bobbin AE LE AL BW M L NS Page 9 of 23 pr14x8 PR14x8 P/N: PR14x8_Bobbin P/N: 0.253 cm^2 2.53 cm 2000 nH/T^2 4.4 mm 0 mm 2 9 B65755-J-R87 B65542-B-T1 Core Effective Cross Sectional Area Core Effective Path Length Ungapped Core Effective Inductance Bobbin Physical Winding Width Safety Margin Width (Half the Primary to Secondary Creepage Distance) Number of Primary Layers Number of Secondary Turns Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-43 24.5 W Telecom Line Card PSU November 18, 2004 CURRENT WAVEFORM SHAPE PARAMETERS DMAX IAVG IP IR IRMS 0.588235 0.614583 1.514191 0.938798 0.827837 Amps Amps Amps Amps Maximum Duty Cycle Average Primary Current Peak Primary Current Primary Ripple Current Primary RMS Current TRANSFORMER PRIMARY DESIGN PARAMETERS LP NP NB ALG BP BM BAC ur LG BWE 56.54287 15.78947 4.642105 226.7997 2627.046 2143.238 664.4036 1591.546 0.124284 8.8 uHenries nH/T^2 Gauss Gauss Gauss mm mm Primary Inductance Primary Winding Number of Turns Bias Winding Number of Turns Gapped Core Effective Inductance Peak Flux density during transients (Limit to 3000 Gauss) Maximum Flux Density AC Flux Density for Core Loss Curves (0.5 X Peak to Peak) Relative Permeability of Ungapped Core Gap Length (Lg >> 0.051 mm) Effective Bobbin Width TRANSFORMER SECONDARY DESIGN PARAMETER ISP ISRMS IO IRIPPLE 2.656475 1.21512 0.632143 1.037744 Amps Amps Amps Amps Peak Secondary Current Secondary RMS Current Power Supply Output Current Output Capacitor RMS Ripple Current VOLTAGE STRESS PARAMETERS VDRAIN PIVS PIVB 173 Volts 55.36 Volts 28.112 Volts Maximum Drain Voltage (Includes Effect of Leakage Inductance) Output Rectifier Maximum Peak Inverse Voltage Bias Rectifier Maximum Peak Inverse Voltage ADDITIONAL OUTPUTS V_OUT2 VD_OUT2 N_OUT2 PIV_OUT2 V_OUT3 VD_OUT3 N_OUT3 PIV_OUT3 28.0000 0.5000 Volts Volts 25 0.5 9 55.36 Volts Volts Volts 8.052632 49.48 Volts Auxiliary Output Voltage Auxiliary Diode Forward Voltage Drop Auxiliary Number of Turns Auxiliary Rectifier Maximum Peak Inverse Voltage Auxiliary Output Voltage Auxiliary Diode Forward Voltage Drop Auxiliary Number of Turns Auxiliary Rectifier Maximum Peak Inverse Voltage Note1: the PO value in this spreadsheet is 17.7 W. The power supply provides –28 V at 480 mA and –65 V at 170 mA which would give a total of 24.5 W. However the –65 V output is derived from the –40 VDC input, thus the switched-mode converter only provides the remaining –25V at 170 mA, saving (-40 V x 170 mA = 6.8 W) to give a total converted power of 17.7 W. Note2: the second output (shown as VOUT3) has a voltage of - 25 V. This is the output that combined with –40 VDC gives –65 V output. Page 10 of 23 Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-43 24.5 W Telecom Line Card PSU November 18, 2004 8 Transformer Specification 8.1 Transformer Winding 1 W4: 8T 2 x 31 AWG 3 2 8 W2: 9T 3 x 32 AWG 7 W1: 8T 2 x 31 AWG 6 W3: 8T 3 x 32 AWG 5 Figure 4 –Transformer Electrical Diagram 8.2 Electrical Specifications Electrical Strength Primary Inductance Resonant Frequency Primary Leakage Inductance 8.3 Non-isolated Pins 1-2, all other windings open, measured at 400 kHz, 0.4 VRMS Pins 1-2, all other windings open Pins 1-2, with Pins 5,6,7,8 shorted, measured at 400 kHz, 0.4 VRMS N/A 57 µH, -0/+20% 5 MHz (Min.) 500 nH (Max.) Materials Item [1] [2] [3a] [3b] [6] [8] Description Core: PR14x8 ALG=227 nH/t^2 Bobbin: PR14x8 8-pin vertical 31AWG Doubled insulated 32 AWG Doubled insulated Tape: Varnish Page 11 of 23 Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-43 8.4 24.5 W Telecom Line Card PSU November 18, 2004 Transformer Build Diagram Tape Tape 1 W4 3 Tape 7 8 W3 Tape 5 6 W2 3 2 W1 Tape Figure 5 – Transformer Build Diagram. 8.5 Transformer Construction W1 Tape W2 Tape W3 Tape W4 Other Outer Wrap Final Assembly Page 12 of 23 Start at Pin 2. Wind 8 turns bifilar item [3a]. Finish on pin 3 Use layer of item [6]. Start at Pin 6. Wind 9 turns trifilar item [3b]. Finish on pin 5 Use layer of item [6]. Start at Pins 7. Wind 8 turns trifilar item [3b]. Finish on pin 8 Use layer of item [6]. Start at Pin 3. Wind 8 turns bifilar item [3a]. Finish on pin 1. When using PC-board (App140512_Brd_082704A-3), remove pin 3 PCboard solder tab, to prevent shorting on the PC-board. This corrects an error on the PC-board. Wrap windings with 3 layers of tape [item [7]. Assemble and secure core halves. Varnish impregnate (item [8]). Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-43 24.5 W Telecom Line Card PSU November 18, 2004 9 Efficiency Efficiency vs Line/Load 100% Efficiency (%) 80% 60% 40% Efficiency 20% 0% 0 10 20 30 Pout (W) Figure 6 - 16.5V Output: Efficiency vs. Input Voltage, Room Temperature, 60 Hz. Note1: the above data was taken with various load combinations of –65V and –28V loads. Page 13 of 23 Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-43 24.5 W Telecom Line Card PSU November 18, 2004 10 Regulation vs. Load Regulation vs Load 115.0% Regulation (%) 110.0% -65 VDC Output -28 VDC Output 105.0% 100.0% 95.0% 90.0% 85.0% 0.0 5.0 10.0 15.0 Pout (W) Figure 7 - 16.5V Output: Regulation vs. Output Load, Room Temperature, 60 Hz. Note1: the above data was taken with various load combinations of –65V and –28V loads. Note2: The power supply regulation can be further optimized, by adjusting the relative weighting on output voltage sense resistors R8 and R11. Also the resistor R15 could be increased to lower both output voltages and center them more accurately in the middle of the allowed specification. A min. load could also be added to help the light-load regulation by preventing peak charging on the –28 VDC output. Page 14 of 23 Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-43 24.5 W Telecom Line Card PSU November 18, 2004 11 Low Load Power Consumption Low Load Power Consumption 3.00 Pin (W) 2.50 2.00 1.50 1.00 No Load 0.50 0.00 0.00 0.20 0.40 0.60 0.80 1.00 Pout (W) Figure 8 - No Load/Min. Load Input Consumption at –40 V input (note: min load –28 V @ 10mA and –65 V @ 5 mA) Page 15 of 23 Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-43 24.5 W Telecom Line Card PSU November 18, 2004 12 Drain Voltage and Current Waveforms Figure 9 – Drain Voltage and Current, -32.7 VDC, -28 V: 0.48 A; -65 V: 0.18 A Top: 50 V/div. Bottom: 0.5 A/div, 500 ns / div. Figure 10 – Drain Voltage and Current, -40 VDC, 28 V: 0.48 A; -65 V: 0.18 A Top: 50 V/div. Bottom: 0.5 A/div, 500 ns / div. Page 16 of 23 Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-43 24.5 W Telecom Line Card PSU November 18, 2004 13 Transient Load 13.1 Transient Load Test Setup For transient load tests, additional capacitors were added to eliminate noise pickup during transient load tests (1uF/50V electrolytic in parallel with a 0.1uF/50V ceramic). These were placed at the output of the power supply. From there the lead length to the electronic load was approximately 12 inches to the electronic load. Voltage probes (x1 probes) were placed right at the output of the power supply. Page 17 of 23 Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-43 24.5 W Telecom Line Card PSU November 18, 2004 13.2 Transient Load Performance Figure 11 – Transient Response, -40 VDC, -28 V: 0.01 – 0.48 A (100ms-100ms), -65 V: 0.18 A Top: -65 V Voltage, 1V/div. Middle: -28 V Voltage, 1V/div., 50 ms / div. Figure 12 – Transient Response, -40 VDC, 28 V: 0.48 A, -65 V: 0.005 - 0.18 A (100ms-100ms) Top: -65 V Voltage, 1V/div. Middle: -28 V Voltage, 1V/div., 50 ms / div. Page 18 of 23 Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-43 24.5 W Telecom Line Card PSU November 18, 2004 14 Output Ripple 14.1 Output Ripple Measurement Technique Measurements made at the end of 6ft output cord and a resistor load was used. For DC output ripple measurements, a modified oscilloscope test probe must be utilized in order to reduce spurious signals due to pickup. Details of the probe modification are provided in figure 13 and figure 14. The 5125BA probe adapter is affixed with two capacitors tied in parallel across the probe tip. The capacitors include one (1) 0.1 µF/50 V ceramic type and one (1) 1.0 µF/50 V aluminum electrolytic. The aluminum electrolytic type capacitor is polarized, so proper polarity across DC outputs must be maintained (see below). Probe Ground Probe Tip Figure 13 - Oscilloscope Probe Prepared for Ripple Measurement. (End Cap and Ground Lead Removed) Figure 14 - Oscilloscope Probe with Probe Master 5125BA BNC Adapter. (Modified with wires for probe ground for ripple measurement, and two parallel decoupling capacitors added) Page 19 of 23 Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-43 24.5 W Telecom Line Card PSU November 18, 2004 14.2 Full Load Ripple Performance Figure 15 – Ripple, -32.7 VDC, -28 V: 0.48 A, -65 V: 0.18 A Top: -65 V Voltage, 1V/div. Middle: -28 V Voltage, 1V/div., 2 µs / div. Figure 16 – Ripple, -40 VDC, -28 V: 0.48 A, 65 V: 0.18 A Top: -65 V Voltage, 1V/div. Middle: -28 V Voltage, 1V/div., 2 µs / div. 14.3 No Load Ripple Performance Figure 17 – Ripple, -32.7 VDC, -28 V: 0 A, 65 V: 0 A Top: -65 V Voltage, 1V/div. Middle: -28 V Voltage, 1V/div., 2 µs / div. Page 20 of 23 Figure 18 – Ripple, -40 VDC, -28 V: 0 A, 65 V: 0 A Top: -65 V Voltage, 1V/div. Middle: -28 V Voltage, 1V/div., 2 µs / div. Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-43 24.5 W Telecom Line Card PSU November 18, 2004 15 Other Test Results During short circuit, the following happened: - for –28 V short circuit, the power supply went into autorestart - for –65 V short circuit, the power supply shut-down. The power supply would normally go into autorestart under this condition. However, since the –40 VDC input rail is used to derive the output of –65 VDC, when the –65 VDC output is shorted, this also shorts the input voltage and causes the power supply to go into under-voltage shutdown (which occurs when the input voltage drops below ~ 32 VDC). Page 21 of 23 Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-43 24.5 W Telecom Line Card PSU November 18, 2004 16 Revision History Date November 18, 2004 Page 22 of 23 Author RM Revision 1.0 Description & changes Reviewed First release VC / AM Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com DER-43 24.5 W Telecom Line Card PSU November 18, 2004 For the latest updates, visit our Web site: www.powerint.com Power Integrations may make changes to its products at any time. Power Integrations has no liability arising from your use of any information, device or circuit described herein nor does it convey any license under its patent rights or the rights of others. POWER INTEGRATIONS MAKES NO WARRANTIES HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS. PATENT INFORMATION The products and applications illustrated herein (including circuits external to the products and transformer construction) may be covered by one or more U.S. and foreign patents or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of Power Integrations’ patents may be found at www.powerint.com. The PI Logo, TOPSwitch, TinySwitch, LinkSwitch, and EcoSmart are registered trademarks of Power Integrations. PI Expert and DPA-Switch are trademarks of Power Integrations. © Copyright 2004, Power Integrations. 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