LQ PROGRAMMABLE QPROX™ QT310 CAPACITANCE SENSOR IC Single channel digital advanced capacitance sensor IC Spread spectrum burst modulation for high EMI rejection Full autocal capability User programmable via cloning process Internal eeprom storage of user setups, cal data Variable drift compensation & recalibration times BG and OBJ cal modes for learn-by-example Sync pins for daisy-chaining or noise suppression Variable gain via Cs capacitor change Selectable output polarity, high or low Toggle mode (optional via setups) Push-pull output Completely programmable output behavior via cloning process from a PC HeartBeat™ health indicator (can be disabled) APPLICATIONS Fluid level sensors Industrial panels Appliance controls Security systems Access controls Material detection Micro-switch replacement Toys & games This device requires only a few external passive parts to operate. It uses spread-spectrum burst modulation to dramatically reduce interference problems. The QT310 charge-transfer (“QT’”) touch sensor IC is a self-contained digital IC capable of detecting proximity, touch, or fluid level when connected to a corresponding type of electrode. It projects sense fields through almost any dielectric, like glass, plastic, stone, ceramic, and wood. It can also turn metal-bearing objects into intrinsic sensors, making them respond to proximity or touch. This capability coupled with its ability to self calibrate continuously or to have fixed calibration by example can lead to entirely new product concepts. It is designed specifically for advanced human interfaces like control panels and appliances or anywhere a mechanical switch or button may be found; it can also be used for material sensing and control applications, and for point-level fluid sensing. The ability to daisy-chain permits electrodes from two or more QT310’s to be adjacent to each other without interference. The burst rate can be programmed to a wide variety of settings, allowing the designer to trade off power consumption for response time. The IC’s RISC core employs signal processing techniques pioneered by Quantum; these are specifically designed to make the device survive real-world challenges, such as ‘stuck sensor’ conditions and signal drift. All operating parameters can be user-altered via Quantum’s cloning process to alter sensitivity, drift compensation rate, max on-duration, output polarity, calibration mode, Heartbeat™ feature, and toggle mode. The settings are permanently stored in onboard eeprom. The Quantum-pioneered HeartBeat™ signal is also included, allowing a host controller to monitor the health of the QT310 continuously if desired. By using Quantum’s advanced, patented charge transfer principle, the QT310 delivers a level of performance clearly superior to older technologies yet is highly cost-effective. LQ TA AVAILABLE OPTIONS SOIC 8-PIN DIP 00C to +700C -400C to +850C QT310-IS QT310-D - Copyright © 2002 QRG Ltd QT310/R1.03 21.09.03 Pin Table 1-1 Pin Descriptions Name Function 1 2 3 4 5 6 7 8 /CAL_CLR /SYNC_O SNS1 VSS SNS2 /SYNC_I OUT VDD lowers susceptibility to EMI, and yet permits excellent response time. Internally the signals are digitally processed to reject impulse noise, using a 'consensus' filter which requires several consecutive confirmations of a detection before the output is activated. Ext Cal, latch clear input Sync Output Sense 1 line Negative supply (ground) Sense 2 line Sync Input Detection output Positive supply A unique cloning process allows the internal eeprom of the device to be programmed to permit unique combinations of sensing and processing functions. +2 to 5 Vdc 100nF 8 3 6 7 Alternate Pin Functions for Cloning SCK Serial clone data clock SDO Serial clone data out SDI Serial clone data in 10K Calibration 1 - OVERVIEW The QT310 is a digital burst mode charge-transfer (QT) sensor designed for touch controls, level sensing and proximity sensing; it includes all hardware and signal processing functions necessary to provide stable sensing under a wide variety of changing conditions. Only one low cost sampling capacitor is required for operation. 6 SYNC_I SNS1 3 7 OUT SNS2 5 ELECTRODE Cs 4.7nF Cx 1.2.1 SWITCHING OPERATION The IC implements direct-to-digital capacitance acquisition using the charge-transfer method, in a process that is better understood as a capacitance-to-digital converter (CDC). The QT switches and charge measurement functions are all internal to the IC (Figure 1-2). The CDC treats sampling capacitor Cs as a floating store of accumulated charge which is switched between the sense pins; as a result, the sense electrode can be connected to either pin with no performance difference. In both cases the rule Cs >> Cx must be observed for proper operation. The polarity of the charge build-up across Cs during a burst is the same in either case. Typical values of Cs range from 10nF to 200nF. Result Single-Slope Switched Capacitor ADC 2 1.2 ELECTRODE DRIVE The QT310 employs bursts of charge-transfer cycles to acquire its signal. Burst mode permits power consumption in the microamp range, dramatically reduces RF emissions, Burst Controller SYNC_O Figure 1-1 Basic QT310 circuit 1.1 BASIC OPERATION Done /CAL VSS Figure 1-1 shows the basic QT310 circuit using the device, with a conventional output drive and power supply connections. SNS1 Cs 1 4 A unique aspect of the QT310 is the ability of the designer to ‘clone’ a wide range of user-defined setups into the part’s eeprom during development and in production. Cloned setups can dramatically alter the behavior of the part. For production, the parts can be cloned in-circuit or can be procured from Quantum pre-cloned. Start VDD 10K Larger values of Cx cause charge to be transferred into Cs more rapidly, reducing available resolution and resulting in lower gain. Conversely, larger values of Cs reduce the rise of differential voltage across it, increasing available resolution and raising gain. The value of Cs can thus be increased to allow larger values of Cx to be tolerated (Figures 5-1 to 5-2). Cx As Cx increases, the length of the burst decreases resulting in lower signal numbers. SNS2 The electrode should always be connected to SNS1; connections to SNS2 are also possible but this can cause the signal to be susceptible to noise. Charge Amp It is important to limit the amount of stray Cx capacitance on both SNS terminals, especially if the Cx load is already large. Figure 1-2 Internal Switching LQ 2 QT310/R1.03 21.09.03 This can be accomplished by minimising trace lengths and widths. 1.3.2 KIRCHOFF’S CURRENT LAW Like all capacitance sensors, the QT310 relies on Kirchoff’s Current Law (Figure 1-4) to detect the change in capacitance of the electrode. This law as applied to capacitive sensing requires that the sensor’s field current must complete a loop, returning back to its source in order for capacitance to be sensed. Although most designers relate to Kirchoff’s law with regard to hardwired circuits, it applies equally to capacitive field flows. By implication it requires that the signal ground and the target object must both be coupled together in some manner for a capacitive sensor to operate properly. Note that there is no need to provide actual hardwired ground connections; capacitive coupling to ground (Cx1) is always sufficient, even if the coupling might seem very tenuous. For example, powering the sensor via an isolated transformer will provide ample ground coupling, since there is capacitance between the windings and/or the transformer core, and from the power wiring itself directly to 'local earth'. Even when battery powered, just the physical size of the PCB and the object into which the electronics is embedded will generally be enough to couple a few picofarads back to local earth. 1.2.2 CONNECTION TO ELECTRODE The PCB traces, wiring, and any components associated with or in contact with SNS1 and SNS2 will become touch sensitive and should be treated with caution to limit the touch area to the desired location. Multiple electrodes can be connected, for example to create a control button on both sides of an object, however it is impossible for the sensor to distinguish between the two electrodes. The implications of Kirchoff’s law can be most visibly demonstrated by observing the E3B eval board’s sensitivity change between laying the board on a table versus holding the board in your hand by it’s batteries. The effect can also be observed by holding the board by the electrode ‘Sensor1’, letting it recalibrate, then touching the battery end; the board will work quite well in this mode. Figure 1-3 Mesh Electrode Geometry 1.3.3 VIRTUAL CAPACITIVE GROUNDS When detecting human contact (e.g. a fingertip), grounding of the person is never required, nor is it necessary to touch an exposed metal electrode. The human body naturally has several hundred picofarads of ‘free space’ capacitance to the local environment (Cx3 in Figure 1-4), which is more than two orders of magnitude greater than that required to create a return path to the QT310 via earth. The QT310's PCB however can be physically quite small, so there may be little ‘free space’ coupling (Cx1 in Figure 1-4) between it and the environment to complete the return path. If the QT310 circuit ground cannot be grounded via the supply connections, then a ‘virtual capacitive ground’ may be required to increase return coupling. 1.2.3 BURST MODE OPERATION The acquisition process occurs in bursts (Figure 1-7) of variable length, in accordance with the single-slope CDC method. The burst length depends on the values of Cs and Cx. Longer burst lengths result in higher gains and more sensitivity for a given threshold setting, but consume more average power and are slower. Burst mode operation acts to lower average power while providing a great deal of signal averaging inherent in the CDC process, making the signal acquisition process more robust. The QT method is a very low impedance method of sensing as it loads Cx directly into a very large capacitor (Cs). This results in very low levels of RF susceptibility. 1.3 ELECTRODE DESIGN 1.3.1 ELECTRODE GEOMETRY AND SIZE There is no restriction on the shape of the electrode; in most cases common sense and a little experimentation can result in a good electrode design. The QT310 will operate equally well with a long, thin electrode as with a round or square one; even random shapes are acceptable. The electrode can also be a 3-dimensional surface or object. Sensitivity is related to electrode surface area, orientation with respect to the object being sensed, object composition, and the ground coupling quality of both the sensor circuit and the sensed object. Smaller electrodes have less sensitivity than large ones. If a relatively large electrode surfaces are desired, and if tests show that an electrode has a high Cx capacitance that reduces the sensitivity or prevents proper operation, the electrode can be made into a mesh (Figure 1-3) which will have a lower Cx than a solid electrode area. LQ Figure 1-4 Kirchoff’s Current Law 3 QT310/R1.03 21.09.03 of the QT310, sensitivity can be high enough (depending on Cx and Cs) that 'walk-by' signals are a concern; if this is a problem, then some form of rear shielding may be required. 1.4 SENSITIVITY ADJUSTMENTS There are three variables which influence sensitivity: 1. 2. 3. Cs (sampling capacitor) Cx (unknown capacitance) Signal threshold value There is also a sensitivity dependence of the whole device on Vdd. Cs and Cx effects are covered in Section 1.2.1. The threshold setting can be adjusted independently from 1 to 255 counts of signal swing (Section 2.3). Note that sensitivity is also a function of other things like electrode size, shape, and orientation, the composition and aspect of the object to be sensed, the thickness and composition of any overlaying panel material, and the degree of mutual coupling of the sensor circuit and the object (usually via the local environment, or an actual galvanic connection). Threshold levels of less than 5 counts in BG mode are not advised; if this is the case, raise Cs so that the threshold can also be increased. Figure 1-5 Shielding Against Fringe Fields 1.4.1 INCREASING SENSITIVITY In some cases it may be desirable to greatly increase sensitivity, for example when using the sensor with very thick panels having a low dielectric constant, or when sensing low capacitance objects. A ‘virtual capacitive ground’ can be created by connecting the QT310’s own circuit ground to: (1) A nearby piece of metal or metallized housing; (2) A floating conductive ground plane; (3) A fastener to a supporting structure; (4) A larger electronic device (to which its output might be connected anyway). Sensitivity can be increased by using a bigger electrode, reducing panel thickness, or altering panel composition. Increasing electrode size can have diminishing returns, as high values of Cx load will also reduce sensor gain (Figures 5-1 and 5-2). The value of Cs also has a dramatic effect on sensitivity, and this can be increased in value up to a limit. Because the QT310 operates at a relatively low frequency, about 500kHz, even long inductive wiring back to ground will usually work fine. Increasing electrode surface area will not substantially increase sensitivity if its area is already larger than the object to be detected. The panel or other intervening material can be made thinner, but again there are diminishing rewards for Free-floating ground planes such as metal foils should maximise exposed surface area in a flat plane if possible. A square of metal foil will have little effect if it is rolled up or crumpled into a ball. Virtual ground planes are more effective and can be made smaller if they are physically bonded to other surfaces, for example a wall or floor. 1.3.4 FIELD SHAPING The electrode can be prevented from sensing in undesired directions with the assistance of metal shielding connected to circuit ground (Figure 1-5). For example, on flat surfaces, the field can spread laterally and create a larger touch area than desired. To stop field spreading, it is only necessary to surround the touch electrode on all sides with a ring of metal connected to circuit ground; the ring can be on the same or opposite side from the electrode. The ring will kill field spreading from that point outwards. If one side of the panel to which the electrode is fixed has moving traffic near it, these objects can cause inadvertent detections. This is called ‘walk-by’ and is caused by the fact that the fields radiate from either surface of the electrode equally well. Again, shielding in the form of a metal sheet or foil connected to circuit ground will prevent walk-by; putting a small air gap between the grounded shield and the electrode will keep the value of Cx lower and is encouraged. In the case LQ Figure 1-6 Burst Detail 4 QT310/R1.03 21.09.03 Figure 1-8 Burst when SC is set to 0 (no sleep cycles) (Observed using a 750K resistor in series with probe) Figure 1-7 Burst when SC is set to 1 (Observed using a 750K resistor in series with probe) The number of pulses in a burst and hence its duration increases with Cs and decreases with Cx. doing so. Panel material can also be changed to one having a higher dielectric constant, which will help propagate the field. Locally adding some conductive material to the panel (conductive materials essentially have an infinite dielectric constant) will also help; for example, adding carbon or metal fibers to a plastic panel will greatly increase frontal field strength, even if the fiber density is too low to make the plastic electrically conductive. 1.5.2 BURST SPACING: TBS, TSC Between acquisition bursts, the device can go into a low power sleep mode. The duration of this is a multiple of Tsc, the basic sleep cycle time. Tsc depends heavily on Vdd as shown in Figure 5-4, page 16. The parameter SC calls out how many of these cycles are used. More SC means lower power but also slower response time. 1.4.2 DECREASING SENSITIVITY In some cases the circuit may be too sensitive, even with high signal threshold values. In this case gain can be lowered by making the electrode smaller, using sparse mesh with a high space-to-conductor ratio (Figure 1-3), and most importantly by decreasing Cs. Adding Cx capacitance will also decrease sensitivity. Tbs is the spacing from the start of one burst to the start of the next. This timing depends on the burst length Tbd and the dead time between bursts, i.e. Tsc. The resulting timing of Tbs is: Tbs = Tbd + (SC x Tsc) -orTbs = Tbd + 2.25ms It is also possible to reduce sensitivity by making a capacitive divider with Cx by adding a low-value capacitor in series with the electrode wire. Figure 1-7 and 1-8 shows the basic timing parameters of the QT310. The basic QT310 timing parameters are: Burst duration Burst spacing Sleep Cycle duration Max On-Duration Detection response time if SC >> 0 (example: SC=15), the device will spend most of its time in sleep mode and will consume very little power, but it will be much slower to respond. (1.5.1) (1.5.2) (1.5.2) (1.5.3) (1.5.4) By selecting a supply voltage and a value for SC, it is possible to fine-tune the circuit for the desired speed / power trade-off. 1.5.3 MAX ON-DURATION, TMOD 1.5.1 BURST FREQUENCY AND DURATION The Max On-Duration is the amount of time required for sensor to recalibrate itself when continuously detecting. This parameter is user-settable by changing MOD and SC (see Section 2.6). The burst duration depends on the values of Cs and Cx, and to a lesser extend, Vdd. The burst is normally composed of hundreds of charge-transfer cycles (Figure 1-6) operating at about 240kHz. This frequency varies by about ±7% during the burst in a spread-spectrum modulation pattern. See Section 3.5.2 page 13 for more information on spread-spectrum. LQ where SC = 0 If SC = 0, the device never sleeps between bursts (example: Figure 1-8). In this case the value of Tsc is fixed at about 2.25ms, but this time is not spent in Sleep mode and maximal power is consumed. 1.5 TIMING Tbd Tbs Tsc Tmod Tdet where SC > 0 Tmod restarts if the sensor becomes inactive before the end of the Max On Duration period. 5 QT310/R1.03 21.09.03 are crowded together with a rep rate that depends entirely on the burst lengths (Section 1.5.1). 1.5.4 RESPONSE TIME, TDET Response time Tdet from the onset of detection to the OUT pin becoming active depends on: Tbs DIT DIS Tbd Response time, drift compensation rate, max on-duration, and power consumption are all affected by this parameter. A high value of SC will allow the device to consume very low power but it will also be very slow. Burst spacing (Section 1.5.2) Detection Integrator Target (user setting) Detect Integration Speed (user setting) Burst duration (if DIS is set to ‘fast’) 2.2 DRIFT COMPENSATION (PDC, NDC) If the control bit DIS is normal (0), then Tdet depends on the rate at which the bursts are acquiring, and the value of DIT. A DIT number of bursts must confirm the detection before the OUT line becomes active: Tdet = Tbs x DIT Signal drift can occur because of changes in Cx, Cs, Vdd, electrode contamination and ageing effects. It is important to compensate for drift, otherwise false detections and sensitivity shifts can occur. (normal DIS) Drift compensation is performed by making the signal’s reference level slowly track the raw signal while no detection is in effect. The rate of adjustment must be performed slowly, otherwise legitimate detections could be affected. The device compensates using a slew-rate limited change to the signal reference level; the threshold and hysteresis points are slaved to this reference. If DIS is set to ‘fast’, then Tdet is computed as: Tdet = (SC x Tsc) + (DIT x (Tbd + 2.25ms)) (fast DIS) Quantum’s QT3View software calculates an estimate of response time based on this formula. 1.6 EXTERNAL RECALIBRATION Once an object is detected, drift compensation stops since a legitimate signal should not cause the reference to change. The /CAL_CLR pin can be used to recalibrate the sensor on demand. A low pulse of at least Tbs (burst spacing) duration is require to initiate a recalibration. The calibration occurs just after /CAL_CLR returns high. Positive and negative drift compensation rates (PDC, NDC) can be set to different values (Figure 2-1). This is invaluable for permitting a more rapid reference recovery after the device has recalibrated while an object was present and then removed. In BG1 mode (Section 2.8.4), the calibration data is not stored in EEPROM, and the part will recalibrate after each power up. In BG1 mode, if the device has been set for Toggle Latch output mode, the /CAL_CLR pin becomes an output reset control and the part cannot be recalibrated via /CAL_CLR. However the part can be recalibrated by powering it down and back up again (Section 2.7.3). Positive drift occurs when the Cx slowly increases. Negative drift occurs when Cx slowly decreases (see Section 2.8.1). PDC+1 sets the number of burst spacings, Tbs, that determines the interval of drift compensation, where: Tbs = Tbd + (SC x Tsc) where SC > 0 (Section 1.5.2) -or- In BG2 mode, the calibration data is stored in EEPROM, and the part will not recalibrate after power up, using instead the stored calibration data. The internal eeprom has a life expectancy of 100,000 erase/write cycles. Tbs = Tbd + 2.25ms where SC = 0 (Section 1.5.2) In OBJ mode, the part stores the calibration data into EEPROM and the part will not recalibrate after power up, using instead the stored calibration data. Example: PDC = 9, (user setting) Tbs = 100ms then In both BG2 and OBJ mode, the device must be calibrated using the /CAL_CLR input, or the calibration data can be set via cloning process, otherwise the calibration data will be invalid. Tpdc = (9+1) x 100ms = 1 sec NDC operates in exactly the same way as PDC. 2 - Control & Processing All acquisition functions are digitally controlled and can be altered via the cloning process. Signals are processed using 16 bit integers, using Quantum-pioneered algorithms specifically designed to provide for high survivability. 2.1 SLEEP CYCLES (SC) Range: 0..255; Default: 1 Affects speed & power of entire device. Refer to Section 1.5.2 for more information on the effect of Sleep Cycles. SC changes the number of intervals Tsc separating two consecutive burst (Figure 1-7 and 1-8). SC = 0 disables sleep intervals and bursts LQ Figure 2-1 Drift Compensation 6 QT310/R1.03 21.09.03 Hysteresis should be set to between 10% and 40% of the threshold value for best results. 2.2.1 NEGATIVE DRIFT COMPENSATION (NDC) Range: 0..255; Default: 2; 255 disables Compensation for drift with decreasing Cx If HYS is set to 0, there will be no hysteresis (0%). NDC corrects the reference when the internal signal is drifting up, i.e. Cx is decreasing (see Section 2.8.1). Every interval of time the device checks for the need to move its reference level in the positive internal direction (negative Cx direction) in accordance with signal drift. The resulting timing interval for this adjustment is Tndc. If THR = 10 and HYS = 2, the hysteresis zone will represent 20% of the threshold level. In this example the ‘hysteresis zone’ is the region from 8 to 10 counts of signal level. Only when the signal falls back to 7 will the OUT pin become inactive. This should normally be faster than positive drift compensation in order to compensate quickly for the removal of a touch or obstruction from the electrode after a MOD recalibration (Section 1.5.3). 2.5 DETECT INTEGRATORS (DIA, DIB, DIS) DIAT Range: 1..256 Default: 10 DIBT Range: 1..256 Default: 10 DIS Range: 0, 1 Default: 1 Affects response time Tdet. Use NDC+1 to compute actual drift timings. See Figure 2-2 for operation. 2.2.2 POSITIVE DRIFT COMPENSATION (PDC) It is usually desirable to suppress detections generated by sporadic electrical noise or from quick contact with an object. To accomplish this, the QT310 incorporates a pair of detection integrator (‘DI’) counters that serve to filter out sporadic noise. These counters can also have the effect of slowing down response time if desired. Range: 0...255 Default: 100; 255 disables Compensation for drift with increasing Cx This corrects the reference when the signal drifting down, i.e. Cx is increasing (see Section 2.8.1). Every interval of time the device checks for the need to move its reference level in the negative internal direction (positive Cx direction) in accordance with signal drift. The resulting timing interval for this adjustment is Tpdc. DI counters act as a powerful noise filter. These DI counters work with spread-spectrum modulation to drastically suppress the effects of external RFI. See page 13 for details. This value should not be set too fast, since an approaching finger could be compensated for partially or entirely before even touching the sense electrode. DIA / DIAT: The first counter, DIA, increments after each burst if the signal threshold has been exceeded, until DIA reaches its terminal count DIAT, after which the OUT pin is activated. If the signal falls below the threshold level prior to reaching DIAT, DIA is immediately reset to zero. Use PDC+1 to compute actual drift timings. 2.3 THRESHOLD (THR) Range: 1..255; Default: 6 Affects sensitivity; not used in OBJ mode. DIA can also be viewed as a 'consensus' filter that requires signal threshold crossings over ‘T’ successive bursts to create an output, where ‘T’ is the terminal count (DIAT). The detection threshold is measured in terms of counts of signal deviation with respect to the reference level. Higher threshold counts equate to less sensitivity since the signal must travel further in order to cross the detection point. DIB / DIBT: If OUT has been active and the signal falls below the hysteresis level, a second detection integrator, DIB, counts up. If the signal equals or exceeds the threshold value, a detection can occur. The detection will end only when the signal become less than the hysteresis level. When DIBT is reached, OUT is deactivated. THR is not used in OBJ mode (Section 2.8.5). In OBJ mode the threshold is set by example during calibration. 2.4 HYSTERESIS (HYS) Range: 0...255; Default: 2; 0 disables Affects detection stability. Hysteresis is measured in terms of counts of signal deviation relative to the threshold level. Higher values equate to more hysteresis. The device will become inactive after a detection when the Cx level moves below THR-HYS in normal mode or above THR+HYS in absence mode (Section2.8.2) Hysteresis helps prevents chattering of the OUT pin. If HYS is set to a value equal or greater than THR, the device may malfunction. LQ Figure 2-2 Detect Integrators Operation (Section 2.5) 7 QT310/R1.03 21.09.03 2.7 OUTPUT FEATURES DISA / DISB: Because the DI counters count at the burst rate, slow burst spacings can result in very long detection delays with terminal counts above 1. To cure this problem, the burst rate can be made faster while DIA or DIB are counting. This creates the effect of a gear-shifted detection process: normal speed when there are no threshold crossings, and fast mode when a detection is pending. Available output processing options accommodate most requirements; these can be set via the clone process. If TOG and TOGL modes are disabled, OUT responds to detections with a steady-state active logic level which lasts for the duration of a detection, until a MOD timeout occurs (Section 2.6). DISA and DISB respectively gearshift the effect of DIA and DIB. The gear-shifting ceases and normal speed resumes once the detection is confirmed (DIA = DIAT) and once the detection ceases (DIB = DIBT). The OUT pin is push-pull CMOS. 2.7.1 POLARITY (OUTP) Options: active-low or -high; Default: active-low When SC=0 the device operates without any sleep cycles, and so the timebase for the DI counters is very fast. The polarity of OUT can be set via option OUTP using the cloning process. Either active-low or active-high can be selected. This not the same as ‘direction of signal detection’ (Section 2.8.1). 2.6 MAX ON-DURATION (MOD) Range: 0..255; Default: 14; 255 disables Affects parameter Tmod, the calibration delay time In ‘active high’ mode the normal, inactive polarity of OUT is low; in ‘active low’ mode the normal, inactive polarity of OUT is high. If a stray object remains on or near the sense electrode, the signal may rise enough to activate the OUT pin thus preventing normal operation. To provide a way around this, a Max On-Duration (‘MOD’) timer is provided to cause a recalibration if the activation lasts longer than the designated timeout, Tmod. OUTP also selects the initial state of OUT when the sensor is used in Toggle or Toggle Latch modes (Sections 2.7.2, 2.7.3); for example, if OUTP is set active-low, the initial state of OUT after power-up will be high. The MOD function can also be disabled, in which case the sensor will never recalibrate unless the part is powered down and back up again. In infinite timeout the designer should take care to ensure that drift in Cs, Cx, and Vdd do not cause the device to ‘stick on’ inadvertently when the target object is removed from the sense field. 2.7.2 TOGGLE MODE (TOG) Options: enabled or disabled; Default: disabled Toggle mode gives the OUT pin a touch-on / touch-off flip-flop action, so that its state changes with each new detection. It is most useful for controlling power loads, for example kitchen appliances, power tools, light switches, etc. MOD is expressed in multiples of the burst space interval, which can be either Tbs or Tbd depending on the Sleep Cycles setting (SC). MOD time-outs (Section 2.6) and the /CAL_CLR pin will recalibrate the sensor but leave the OUT state unchanged. If SC > 0, the delay is: The OUTP option (Section 2.7.1) sets the initial state of the sensor after power-up. Tmod = (MOD + 1) x 16 x Tbs Example: Tbs = 100ms, MOD = 9; 2.7.3 TOGGLE LATCH MODE (TOGL) Options: enabled or disabled; Default: disabled In this mode, OUT becomes active when a valid detection occurs but will only go inactive again if an external clear signal is applied to the part; further detections after the first one will not change the state of OUT. Tmod = (9 + 1) x 16 x 100ms = 160 secs. If SC = 0, Tmod is a function of the total combined burst durations, Tbd. If SC = 0, the delay is: Tmod = (MOD + 1) x 256 x Tbd The external clear signal is applied to the /CAL_CLR pin which functions only as latch clear input if TOGL is enabled. The only way to recalibrate the sensor externally in TOGL mode is to cycle power off and back on. Example: Tbd = 18ms, MOD = 9; If MOD = 255, recalibration timeout = infinite (disabled) regardless of SC. A logic low pulse on /CAL_CLR will clear the latch and make OUT inactive. As the /CAL_CLR pin is sampled once per burst, the clear pulse has to be at least as long as Tbs (the burst duration) to ensure the latch clears. An MOD induced recalibration will make the OUT pin inactive except if the output is set to toggle mode (Section 2.7.2), in which case the OUT state will be unaffected but the sensor will have recalibrated. If any underlying threshold detection remains active for longer than the Max On-Duration (MOD) period the device will recalibrate automatically, but the OUT pin will not change state. Tmod = (9 + 1) x 256 x 18ms = 46 secs. A clear pulse applied to /CAL_CLR will clear the latch even if the part is in the process of recalibrating due to a MOD timeout. The clear state of OUT can be set via the OUTP option (Section 2.7.1). LQ 8 QT310/R1.03 21.09.03 Toggle Latch Mode cannot be used with BG2 or OBJ modes, as /CAL_CLR must be used as a calibrate input in these two modes (Sections 1.6, 2.8.4, 2.8.5). 2.8.2 SENSE DIRECTION (SD) OPTIONS: POS OR NEG; The programmable SD option controls whether the device responds to increases in Cx (‘normal’ detection) or decreases in Cx (‘absence’ detection). The default mode is positive. 2.7.4 HEARTBEAT™ OUTPUT (HB) Setup: Enable/Disable; DEFAULT: POSITIVE Default: Enabled The OUT pin can have HeartBeat™ ‘health’ indicator pulses superimposed on it. This operates by floating the 'OUT' pin for approximately 15µs before each burst. 2.8.2.1 Positive Sense Direction (default) This is the normal mode of operation for touch sensing. Calibration is normally done when an object is not present; OUT becomes active if an object approaches. Heartbeat can be used to determine if the sensor is operating properly. The frequency of the floats can be used to see if the IC is operating within desired limits. The Heartbeat signal can be tested by connecting a 10K resistor to OUT that is toggled by a microcontroller depending on the logic level of OUT. In this configuration, if Cx increases enough the internal signal will pass the threshold level, and OUT will become active. Cx must fall again so the internal signal traverses the hysteresis level for OUT to become inactive. Heartbeat pulses can be removed simply by placing a capacitor on the OUT pin; if OUT is loaded into a highimpedance CMOS input or MOSFET, this is usually enough. The threshold and hysteresis levels are set relative to the reference level determined during calibration. It is possible to disable HeartBeat provided SC is set to zero, by setting the HB control bit to '1'. Otherwise, the Heartbeat signal is always enabled. 2.8.2.2 Negative Sense Direction In this mode, if the part is made to calibrate when an object is present, OUT will become active if the object departs (Cx decreases). 2.7.5 OUTPUT DRIVE CAPABILITY In this configuration, if Cx decreases enough the internal signal will pass the threshold level, and OUT will become active. Cx must rise again so the internal signal traverses the hysteresis level for OUT to become inactive. The OUT pin is a push-pull CMOS type. OUT can source or sink up to 2mA of non-inductive current. If an inductive load is used, such as a small relay, the load should be diode-clamped to prevent damage. The current must be limited to 2mA max continuous to prevent detection side effects from occurring, which happens when the load current creates voltage drops on the die and bonding wires; these small shifts can materially influence the signal level to cause detection instability. The threshold and hysteresis levels are set relative to the reference level determined during calibration. 2.8.3 DETECT MODE (DM) SELECTION OPTIONS: BG OR OBJ; The IC can be set to calibrate and detect in one of two different modes to suit the application. The selection is made using the cloning process. 2.8 DETECTION MODES SD - Sense Direction: Pos or Neg; DM - Detect Mode: BG or OBJ; BG - BG Mode: BG1 or BG2; DEFAULT: BG Default: Positive Default: BG Default: BG1 The device default is BG. There are two BG modes, BG1 and BG2, which must be further selected as described below. The BG mode default is BG1. It is possible to change the basic way the device detects and operates via the cloning process as described below. In particular, it is possible to determine whether the device responds to increases in Cx (‘normal’ detection) or decreases in Cx (‘absence’ detection). It is also possible to change how the device calibrates itself, in one of three possible modes. OBJ mode is described in Section 2.8.5. 2.8.4 BG (BACKGROUND) DETECTION MODES OPTIONS: BG1 OR BG2; DEFAULT: BG1 The BG modes are useful when it is easier to calibrate on the baseline signal level than the signal from the object to be detected. The detection is always made relative to this reference level, and the sensitivity is governed by the adjustable threshold level (as well as capacitor Cs, and load Cx). The BG modes are generally easier to use than OBJ. 2.8.1 SIGNAL DEFINITIONS Increasing Cx load on the electrode will result in a shorter burst length. Since internal computations are based on burst length, a shorter burst length means a smaller internal signal number; conversely, a longer burst length means less Cx but higher internal signal numbers. In summary: There are two BG modes, BG1 and BG2. In these modes, threshold and hysteresis values are calculated relative to the reference level, which in turn is determined during calibration. The two modes differ in that BG1 mode the calibration is volatile whereas in BG2 mode the calibration reference is stored in eeprom and reused until the next calibration. Cx rises shorter Burst Length less internal signal Cx drops longer Burst Length more internal signal These relationships, are important to understand to avoid confusion. They mirror signal values shown in QT3View and the burst length as viewed on an oscilloscope. Hysteresis can be altered as per Section 2.4. Sense direction (SD) behavior: In both BG modes OUT can be made active on either positive or negative Cx changes (Section 2.8.2). SD selection affects which side of the reference the threshold and hysteresis points are placed. LQ 9 QT310/R1.03 21.09.03 In addition, the OUT pin can be made either active low or active high (Section 2.7.1). 2.8.5 OBJ (OBJECT) DETECTION MODE This mode is useful to do a ‘learn by example’ calibration. Typically, a test object is placed at the electrode in such a way as to create a 50% signal level change relative to a normal, full presentation of the object. The QT310 is then calibrated in OBJ mode. Calibration in OBJ mode should never be done with a full presentation of signal, as this will create a marginal, unreliable detection. 2.8.4.1 BG1 Mode (volatile reference) In BG1 mode, the reference is set via recalibration initiated using the /CAL_CLR pin or on power-up. The resulting reference level is not stored into EEPROM. Max On-Duration and drift compensation are able to function normally. BG1 mode is useful when the signal can change slightly over time and temperature, and it is useful to track these changes without a loss of sensitivity. This mode is suited to material detection, fluid level sensing, and similar applications. 2.8.4.2 BG2 Mode (stored reference) In BG2 mode, the reference level is fixed and stored in internal EEPROM. Drift compensation (Section 2.2) can be used, but changes to the reference due to drift compensation are not updated to EEPROM. Max On-Duration can also be enabled (Section 2.6); if a MOD timeout occurs, the new reference will be stored in EEPROM. The hysteresis level is made relative to the fixed threshold, and can be altered as with the BG modes. If hysteresis is too large, the sensor can ‘stick’ on; hysteresis should normally be set to a small value, just enough to prevent output chatter. In OBJ mode, on calibration the current signal value is recorded as a fixed threshold point and stored to EEPROM. Hysteresis can also be made intentionally large, for example for ‘bang-bang’ fluid level sensing, where an ‘upper’ level is calibrated using OBJ, and a ‘lower’ cut-out level is defined by the hysteresis value. The sensor must have SD = positive for this mode (Section 2.8.2). The reference is normally set during recalibration when the /CAL_CLR pin pulses low (Section 1.6); the resulting reference value is then stored in EEPROM. At power-up the part automatically restores this reference level and runs without another recalibration. The reference value can also be entered numerically via the cloning process (Table 4-1, page 14) to precisely replicate the calibration point across many devices. BG2 mode is useful when it is desired to lock in the reference to prevent changes on startup, for example to replace mechanical switches in process controls. 1 Vdd /CAL OUT 7 OUT1 /SYNC_I SNS1 3 Closed Loop 2 /SYNC_O SNS2 5 SENSOR 1 CS1 U2 Vdd 1 6 2 /CAL /SYNC_I OUT SNS1 /SYNC_O SNS2 7 OUT2 3 5 SENSOR 2 CS2 Un Vdd 1 6 2 /CAL /SYNC_I OUT SNS1 /SYNC_O SNS2 7 OUT_N 3 5 SENSOR N CS3 Figure 2-3 Daisy chain wiring LQ Positive, negative detection mode behavior: In OBJ mode OUT can be made active on either positive or negative signal changes (Section 2.8.2). The signal direction selection affects which side of the threshold the hysteresis level is placed after calibration. 2.9 SYNCHRONISATION Open Loop 6 The OBJ threshold value can also be entered numerically via the cloning process (Table 4-1, page 14) to precisely replicate the threshold point across many devices. The OUT pin can be made either active low or active high (Section 2.7.1). U1 Vdd OBJ mode does not make use of a reference level and does not allow drift compensation or Max On-Duration to operate. The threshold point is fixed for all time until another /CAL_CLR signal is received. The synchronization feature allows a QT310 to generate its burst on demand from an external trigger rather than of its own accord. This feature is made possible by the fact that the QT310 operates in burst mode, rather than continuously. Sync is a powerful feature that permits two important operating modes: Daisy-chaining, and noise synchronization. Daisy-chaining allows several QT310 or similar devices to coexist in close proximity to each other without cross interference. Noise synchronization allows a QT310 to lock onto the fundamental frequency of an external interference source, such as 50/60Hz, to correlate the noise with the signal and thus eliminate alias frequencies from the acquired signal. These are extremely powerful noise reduction methods. The SYNC_I pin is used to trigger the QT310 to generate a burst. The sleep timer will always wake the part if a sync pulse has not been received before the sleep time expires. The sleep timer is always restarted when a sync pulse is received. The pulse applied to SYNC_I must be normally high, negative-going, and of >15µs pulse duration. SYNC_O emits an 80µs pulse at the end of each burst. 10 QT310/R1.03 21.09.03 During fast integration (Section 2.5), when bursts are generated quickly a number of times in sequence without regard to the sleep timer, a single SYNC_O pulse is generated only after the last burst in the series of fast spaced bursts in order to prevent downstream slave parts from being triggered too rapidly. It is also possible to devise a tree structure of devices, where some devices in the chain trigger two or more slaves. This speeds up the acquisition process considerably, but some thought must be given to timing considerations so that adjacent electrodes do not have bursts which overlap each other in time. If SC=0 (no sleep cycles), no Sync_O pulses are generated. After the burst has completed the QT310 checks the level on SYNC_I. If SYNC_I is high, the part goes back to sleep; if SYNC_I is still low the device waits until the SYNC_I is high again before going back to sleep. If this is the case, power drain will be higher so it is important to limit the pulse width to an amount less than the burst length (but greater than >15µs). Disabling Sync: Connecting Sync_I to +Vdd will disable Sync and the part will acquire bursts at the normal rate. If Sync is at Vss, the device will wait for a Sync pulse, until the Tsc period Vdd R1 1M Line Input U2:A 74HC14 R3 1M C1 R4 100pF 4.7k - 10K 2.9.2 NOISE SYNCHRONIZATION Using the sync feature, a QT310 can be synchronized to a repetitive external source of interference such as the power line frequency (Figure 2-4) in order to dramatically reduce signal noise. If line frequency is present near the sensors, this feature should be used. R2 470K-1M 2.2nF C2 Vdd U1 7 OUT1 3 SENSOR CS 5 With this circuit the sensor can tolerate up to 100V/M of AC electric field. It is particularly useful for line-powered touch controls. 8 VDD OUT /CAL SNS1 /SYNC_I SNS2 /SYNC_O 1 Noise sync and daisy-chaining can be combined by having the first device in the chain sync to the external noise source. 6 2 3 Circuit Guidelines /SYNC_O 3.1 SAMPLE CAPACITORS VSS 4 Cs capacitors can be virtually any plastic film or low to medium-K ceramic capacitor. The normal usable Cs range is from 10nF ~ 200nF depending on the sensitivity required; larger values of Cs require higher stability to ensure reliable sensing. Acceptable capacitor types include NP0 or C0G ceramic, PPS film, Polypropylene film, and X7R ceramic in that order. Figure 2-4 Line sync circuit expires; at that point the part will acquire regardless of the absence of a Sync pulse. 2.9.1 DAISY-CHAINING QT310’S 3.2 POWER SUPPLY One use for synchronization is where two or more QT310’s in close proximity to each other are synchronously daisychained to avoid crosstalk (Figure 2-3). 3.2.1 STABILITY The QT310 derives its internal references from the power supply. Sensitivity shifts and timing changes will occur with changes in Vdd, as often happens when additional power supply loads are switched on or off via the Out pin. One QT310 should be designated as the ‘Master’; this part should have the shortest SC sleep time, while the downstream parts which depend on the master and any intermediary devices should have longer sleep time settings than the master. These supply shifts can induce detection ‘cycling’, whereby an object is detected, the load is turned on, the supply sags, the detection is no longer sensed, the load is turned off, the supply rises and the object is reacquired, ad infinitum. The parts can be chained in a loop (Fig 2-4 switch set to ‘closed loop’); in this configuration the master will generate a new burst after the last slave has finished, making the scan sequence of all devices the most time-efficient possible. If the master doesn’t received a pulse before the sleep time has elapsed it will generate a new burst. This mode is most useful if there are a relatively small number of devices in the chain and there is a need for fast response. Detection ‘stiction’, the opposite effect, can occur if a load is shed when the output is active and the signal swings are small: the Out pin can remain stuck even if the detected object is no longer near the electrode. In open-loop, the rep rate of acquisition is set purely by the burst rate of the master. It is possible in this mode to have very long chains of parts with relatively good response time. The disadvantage of this mode is that it is possible for the bursts of downstream slaves to overlap with upstream devices, potentially causing interference if their electrodes are in physical proximity to each other. LQ 3.2.2 SUPPLY REQUIREMENTS Vdd can range from 2.0 to 5.0 volts. If Setups programming is required during operation, the minimum Vdd is 2.2V. Current drain will vary depending on Vdd, the chosen sleep cycles, and the burst lengths. Increasing Cx values will decrease power drain since increasing Cx loads decrease burst length (Figures 5-1 and 5-2). 11 QT310/R1.03 21.09.03 If the power supply is shared with another electronic system, care should be taken to assure that the supply is free of spikes, sags, and surges. In BG1 mode the QT310 will track slow changes in Vdd if drift compensation is enabled, but it can be adversely affected by rapid voltage steps and spikes at the millivolt level. VDD 100nF 8 VDD RE3 If desired, the supply can be regulated using a conventional low current regulator, for example CMOS LDO regulators with low quiescent currents, or standard 78Lxx-series 3-terminal regulators. RE4 RE5 1 2 6 CAL OUT SYNC_O SNS1 SYNC_I SNS2 For proper operation a 100nF (0.1uF) ceramic bypass capacitor must be used between Vdd and Vss; the bypass cap should be placed very close to the Vdd and Vss pins. RE2 7 RE1 3 5 SENSOR CS VSS 4 3.3 PCB LAYOUT Figure 3-1 ESD/EMC protection resistors 3.3.1 GROUND PLANES The use of ground planes around the device is encouraged for noise reasons, but ground should not be coupled too close to the sense pins in order to reduce Cx load. Likewise, the traces leading from the sense pins to the electrode should not be placed directly over a ground plane; rather, the ground plane should be relieved by at least 3 times the width of the sense traces directly under it, with periodic thin bridges over the gap to provide ground continuity. dielectric properties, panel thickness, and rise time of the ESD transients. ESD protection can be enhanced with an added resistor RE1 (Figure 3-1). As the transfer time is ~833ns, the circuit can tolerate values of RE1 which result in an RC timeconstant of 1/6th this amount or about 140ns. The ‘C’ of the RC is the Cx load. Thus, for Cx= 20pF, the maximum of RE1 should be 6.8K ohms. Larger amounts of RE1 or Cx may result in noticeably reduced gain. 3.3.2 CLONE PORT CONNECTOR If a cloning connector is used, place this close to the QT310. Placing the cloning connector far from the QT310 will increase the load capacitance Cx of the sensor line SNS1 and decrease sensitivity. Long distances on these lines can also make the cloning process more susceptible to communication errors from ringing and interference. 3.5 EMC ISSUES If the SYNC_I input is used, a 10K ohm resistor should be used to avoid conflicts with the cloning process (Figure 4-1). This works because the inbound RC network formed by RE1 and Cs has a very low cut-off frequency which can be computed by the formula: 1 2✜ R Cs If R = 6.8K and Cs = 10nF, then Fc = 2,340 Hz. 3.4 ESD ISSUES In cases where the electrode is placed behind a dielectric panel, the device will usually be well protected from static discharge. However, even with a plastic or glass panel, transients can still flow into the electrode via induction, or in extreme cases, via dielectric breakdown. Porous materials may allow a spark to tunnel right through the material; partially conducting materials like 'pink poly' static dissipative plastics will conduct the ESD right to the electrode. Panel seams can permit discharges through edges or cracks. Testing is required to reveal any problems. The QT310 has internal diode protection which can absorb and protect the device from most induced discharges, up to 20mA; the usefulness of the internal clamping will depend on the LQ SDI SCK This leads to very strong suppression of external field effects. Nevertheless, it is always wise to reduce lead lengths by placing the QT310 as close to the electrode as possible. GND Important Note: Since SCK is shared on the SNS1 pin, it is possible that stray external fields can cause these devices to enter into Clone mode accidentally. If long wiring or large electrodes are used that could pick up interference, install a 470K resistor from SNS1 to ground to suppress pickup. If the device enters clone mode accidentally, it may be necessary to cycle power to recover the device. Fc = SDO Cloning can be designed for production by using pads (SMT or through-hole) on the solder side which are connected to a fixture via spring loaded ATE-style ‘pogo-pins’. This eliminates the need for an actual connector to save cost. Electromagnetic and electrostatic susceptibility are often a problem with capacitive sensors. QT310 behavior under these conditions can be improved by adding RE1 (Figure 3-1), exactly as for ESD protection. The resistor should be placed next to the chip. VDD 100nF 8 VDD 1 /CAL 7 C /AL SDI 2 3 S /YNC_O /SYNC_O SENSOR SCK 6 /SYNC_I OUT 5 SDO CS SNS 2 VSS 4 Figure 4-1 Clone interface wiring 12 QT310/R1.03 21.09.03 Likewise, RF emissions are sharply curtailed by the use of RE1, which bandwidth limits RF emissions based on the value of RE1 and Cx, the electrode capacitance. 3.5.1 LINE CONDUCTED EMI Line conducted EMI can be reduced by making sure the power supply is properly bypassed to chassis ground. The OUT line can also be paths for conducted EMI, and these can be bypassed to circuit ground with an RC filter network. The additional resistors RE2 through RE5 can also help with conducted EMI. The connections required for cloning are shown in Figure 4-1. Further information on the cloning process can be found in the QTM300CA instruction guide. Section 3.3.2 above discusses wiring issues associated with cloning. The QT310 uses spread-spectrum burst modulation to dramatically reduce susceptibility to external noise sources. Spread-spectrum is implemented using frequency hopping between four ‘channels’ centered around 240kHz. The frequency of operation is altered with each successive burst; the total frequency spread is approximately ±7%. The parameters which can be altered are shown in Table 4-1, page 14. Spread-spectrum operates full-time and cannot be disabled. If the DIAT (Detect Integrator terminal count) is set to DIAT=2, then two different frequencies will be used to determine a detection result. There is no way to control which two frequencies are used, but they are guaranteed to be different. LQ The cloning process allows user-defined settings to be loaded into internal eeprom, or read back out, for development and production purposes. The QTM300CA cloning board in conjunction with QT3View software simplifies the cloning process greatly. The E3B eval board has been designed with a connector to facilitate direct connection with the QTM300CA. The QTM300CA in turn connects to any PC with a serial port which can run QT3View software (included with the QTM300CA and available free on Quantum’s web site). 3.5.2 SPREAD-SPECTRUM MODULATION If the DIAT (Detect Integrator) is set to 4 or higher, the detection process will take advantage of all four possible frequencies before confirming a result. All it takes is one ‘clear’ frequency for a false detection to be suppressed, since a non-detection on one sample is enough to clear the DI counter and abort a pending detection. 4 Parameter Cloning It is possible for a host controller to read and change the internal settings via the interface connections shown, but doing so will disturb the sensing process even when data transfers are not occurring. The additional capacitive loading of the interface pins will contribute to Cx; also, noise on the interface lines can cause erratic operation. The internal eeprom has a life expectancy of 100,000 erase/write cycles. A serial interface specification for the device can be obtained by contacting Quantum. 13 QT310/R1.03 21.09.03 TABLE 4-1: SETUPS SUMMARY CHART Description Symbol Threshold Hysteresis Det Integrator End Det Integrator THR HYS DIAT DIBT Det Integrator Speed DISA End Det Integ. Speed DISB Negative Drift Comp NDC Positive Drift Comp PDC Max-On Duration MOD Detection Mode DM BG Mode BG Sense Direction SD Sleep Cycles SC Output Polarity OUTP Toggle TOG Toggle Latch TOGL HeartBeat HB Reference / Thresh REF LQ Valid Values 1 - 255 0 - 255 1 - 256 1 - 256 0 1 0 1 0 - 254 255 0 - 254 255 0 - 254 255 0 1 0 1 0 1 0 1 - 255 0 1 0 1 0 1 0 1 0 - 65536 Slow Fast Slow Fast On Off On Off Finite Infinite BG OBJ BG1 BG2 Negative Positive No Sleep Sleep Active Low Active High Off On Off On Enabled Disabled - Default 6 2 10 10 Calculation / Notes Unit Higher = less sensitive Higher = more hysteresis Higher = slower, more robust - Counts Counts Burst Cycles Burst Cycles 1 - - 1 - - 2 Tndc = (NDC+1) x Tbs Secs/count 100 Tpdc = (PDC+1) x Tbs Secs/count 14 0 SC = 0 SC > 0 Tmod = (MOD + 1) x 256 x Tbs Tmod = (MOD + 1) x 16 x Tbs Seconds - 0 BG1: The reference is volatile BG2: Reference is stored in EEPROM - 1 Negative: detects a drop of Cx Positive: detects a rise of Cx - 1 - - 0 - - 0 - - 0 - - 0 65,536 14 Can only be disabled when SC = 0 - Reference (BG modes), Threshold (OBJ mode) counts QT310/R1.03 21.09.03 5 Electrical specifications 5.1 ABSOLUTE MAXIMUM SPECIFICATIONS Operating temp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . as designated by suffix Storage temp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65OC to +150OC VDD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 to +6V Max continuous pin current, any control or drive pin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±40mA Short circuit duration to ground, any pin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . infinite Short circuit duration to VDD, any pin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . infinite Eeprom Setups max write cycles. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100,000 Voltage forced onto any pin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -1V to (Vdd + 0.5) Volts 5.2 RECOMMENDED OPERATING CONDITIONS VDD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +2.0 to 5V VDD min required for eeprom programming of Setups. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +2.2V Short-term supply ripple+noise. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±5mV Long-term supply stability. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100mV Cs value. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10nF to 200nF Cx value. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 100pF 5.3 AC SPECIFICATIONS Vdd = 3.0, Ta = recommended operating range, Cs=100nF unless noted Parameter Description Min Typ Max Units TRC Recalibration time 7 ms TPC Charge/transfer duration 833 ns Fc Burst center frequency 240 kHz FD Burst frequency modulation TBL Burst length THB Heartbeat pulse width TSIP Input sync pulse TSOP Output sync pulse ±7 0.5 Notes Cs, Cx dependent % 25 15 ms Cs = 4.7nF to 200nF; Cx = 0 µs 15 µs 80 µs 5.4 SIGNAL PROCESSING Description Min Threshold differential Typ 1 Max Units 255 counts Hysteresis 0 254 counts Consensus filter length 1 256 samples Positive drift compensation rate - ms/level Negative drift compensation rate - ms/level Post-detection recalibration timer duration <1 infinite Notes secs 5.5 DC specifications Vdd = 3.0V, Cs = 10nF, Cx = 5pF, Ta = recommended range, unless otherwise noted Parameter IDD VDDS VIL Description Supply current Supply turn-on slope Min Typ Max 2 600 1,500 100 VIH Input high voltage Low output voltage VOH High output voltage CX Load capacitance range AR Acquisition resolution S Sensitivity range LQ 0.3 Vdd 0.6 Vdd 0.4 Vdd-0.6 0 1,000 15 Notes µA V/s Input low voltage VOL Units Required for proper start-up V Vdd = 2.5 to 5.0V V Vdd = 2.5 to 5.0V V OUT, 2mA sink V OUT, 1.5mA source 100 pF 16 bits 7 fF Ref Figs. 5-1, 5-2 QT310/R1.03 21.09.03 10.00 Detection Threshold, pF Detection Threshold, pF 10.00 4.7nF 9nF 19nF 43nF 1.00 74nF 124nF 200nF 0.10 4.7nF 9nF 19nF 43nF 74nF 124nF 200nF 1.00 0.10 0.01 0.01 0 10 20 30 40 0 50 10 20 30 40 50 Cx Load Cx Load Figure 5-2 Typical sensitivity vs Cx; Threshold = 6, Vdd = 3.0 Volts Figure 5-1 Typical sensitivity vs Cx; Threshold = 16, Vdd = 3.0 Volts 180 25.000 160 140 120 Tsc (ms) Burst Length (ms) 20.000 15.000 10.000 100 80 60 5.000 40 Cx = 0pF 0.000 52 20 Cx = 21pF 118 228 507 884 1450 2357 Sampling Capacitor (nF) 0 Cx = 48pF 1.5 Figure 5-3 Typical Burst length vs Cx, Cs; Vdd = 3.0 Volts LQ 2 2.5 3 3.5 4 4.5 5 5.5 Power Supply (Volts) Load (pf) Figure 5-4 Tsc vs Vdd; SC = 1 16 QT310/R1.03 21.09.03 16 14 Signal count variation (%) 12 10 8 6 4 2 0 -2 1.5 2 2.5 3 3.5 4 4.5 5 5.5 Vdd (Volts) Figure 5-5 Typical internal signal count change vs Vdd 5.00% 4.00% 3.00% % Deviation 2.00% 1.00% 0.00% -1.00% -2.00% -3.00% -4.00% -5.00% -10 -5 0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85 Temperature, C Figure 5-6: Typical Signal Deviation vs. Temperature Vdd = 5.0 Volts, Cx = 10pF, Cs = 5nF - 200nF PPS Film LQ 17 QT310/R1.03 21.09.03 450 400 Cuurent (uA) 350 Sleep Cycles 300 None 250 One Two 200 Three 150 Five 100 50 0 0 10 20 30 40 50 60 Sampling Capacitor (nF) Figure 5-7 Power Consumption vs Cs at Selected values of Sleep Cycles; Cx = 10pF, Vdd = 2.0 Volts 900 Current (uA) 800 700 Sleep Cycles 600 None One 500 Two 400 Three Five 300 Ten 200 100 0 0 10 20 30 40 50 60 Sampling Capacitor (nF) Figure 5-8 Power Consumption vs Cs at Selected values of Sleep Cycles; Cx = 10pF, Vdd = 3.3 Volts 2000 1800 1600 Sleep Cycles Current (uA) 1400 None 1200 One Two 1000 Three 800 Five Ten 600 400 200 0 0 10 20 30 40 50 60 Sampling Capacitor (nF) Figure 5-9 Power Consumption vs Cs at Selected values of Sleep Cycles; Cx = 10pF, Vdd = 5.0 Volts LQ 18 QT310/R1.03 21.09.03 M A F S1 a A r S L2 Pin 1 x m L1 Q L Package type: 8-pin Dual-In-Line SYMBOL Millimeters Max Min a A M m Q L L1 L2 F r S S1 x 6.1 7.62 9.02 7.62 0.69 0.356 1.14 0.203 2.54 0.38 2.92 - 7.11 8.26 10.16 0.94 0.559 1.78 0.305 3.81 5.33 10.9 Notes Inches Max Min 0.24 0.3 0.355 0.3 0.027 0.014 0.045 0.008 0.1 0.015 0.115 - Typical BSC 0.28 0.325 0.4 0.037 0.022 0.07 0.012 0.15 0.21 0.43 Notes Typical BSC M M a H A φ e h Pin 1 E F L Package type: 8-pin Wide SOIC SYMBOL a A M F L h H e E φ Min 5.21 7.62 5.16 1.27 0.305 0.102 1.78 0.178 0.508 0o LQ Millimeters Max 5.41 8.38 5.38 0.508 0.33 2.03 0.254 0.889 8o Notes BSC 19 Min 0.205 0.3 0.203 0.05 0.012 0.004 0.07 0.007 0.02 0o Inches Max 0.213 0.33 0.212 0.02 0.013 0.08 0.01 0.035 8o Notes BSC QT310/R1.03 21.09.03 lQ Copyright © 2002 QRG Ltd. All rights reserved. Patented and patents pending Corporate Headquarters 1 Mitchell Point Ensign Way, Hamble SO31 4RF Great Britain Tel: +44 (0)23 8056 5600 Fax: +44 (0)23 8045 3939 [email protected] www.qprox.com North America 651 Holiday Drive Bldg. 5 / 300 Pittsburgh, PA 15220 USA Tel: 412-391-7367 Fax: 412-291-1015 The specifications set out in this document are subject to change without notice. All products sold and services supplied by QRG are subject to our Terms and Conditions of sale and supply of services which are available online at www.qprox.com and are supplied with every order acknowledgement. QProx, QTouch, QMatrix, QLevel, and QSlide are trademarks of QRG. QRG products are not suitable for medical (including lifesaving equipment), safety or mission critical applications or other similar purposes. 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