QPROX™ QT320 2-CHANNEL PROGAMMABLE ADVANCED SENSOR IC LQ Two channel digital advanced capacitive sensor IC Projects two ‘touch buttons’ through any dielectric Cloning for user-defined sensing behavior 100% autocal - no adjustments required Only one external capacitor per channel User-defined drift compensation, threshold levels Variable gain via Cs capacitor change Selectable output polarities Toggle mode / normal mode outputs HeartBeat™ health indicator on outputs (can be disabled) 1.8 ~ 5V supply, 60µA APPLICATIONS Light switches Industrial panels Appliance control Security systems Access systems Pointing devices Computer peripherals Entertainment devices The QT320 charge-transfer (“QT’”) touch sensor chip is a self-contained digital IC capable of detecting near-proximity or touch on two sensing channels. It will project sense fields through almost any dielectric, like glass, plastic, stone, ceramic, and most kinds of wood. It can also turn small metal-bearing objects into intrinsic sensors, making them respond to proximity or touch. This capability coupled with its ability to self calibrate continuously can lead to entirely new product concepts. It is designed specifically for human interfaces, like control panels, appliances, security systems, lighting controls, or anywhere a mechanical switch or button may be found; it may also be used for some material sensing and control applications provided that the presence duration of objects does not exceed the recalibration time-out interval. The IC requires only a common inexpensive capacitor per channel in order to function. Power consumption and speed can be traded off depending on the application; drain can be as low as 60µA, allowing operation from batteries. The IC’s RISC core employs signal processing techniques pioneered by Quantum; these are specifically designed to make the device survive real-world challenges, such as ‘stuck sensor’ conditions and signal drift. Even sensitivity is digitally determined. All key operating parameters can be set by the designer via the onboard eeprom which can be configured to alter sensitivity, drift compensation rate, max on-duration, output polarity, and toggle mode independently on each channel. No external switches, opamps, or other analog components aside from Cs are usually required. The Quantum-pioneered HeartBeat™ signal is also included, allowing a host controller to monitor the health of the QT320 continuously if desired; this feature can be disabled via the cloning process. By using the charge transfer principle, the IC delivers a level of performance clearly superior to older technologies in a highly cost-effective package. LQ TA AVAILABLE OPTIONS SOIC 8-PIN DIP 00C to +700C -400C to +850C QT320-IS QT320-D - Copyright © 2002 QRG Ltd QT320/R1.03 08/02 Pin 1 2 3 4 5 6 7 8 3 6 7 Table 1-1 Pin Descriptions Name Function OUT1 S2B S1A VSS S1B S2A OUT2 VDD which requires several consecutive confirmations of a detection before an output is activated. The two channels of sensing operate in a completely independent fashion. A unique cloning process allows the internal eeprom of the device to be programmed for each channel, to permit unique combinations of sensing and processing functions for each. Detection output, Ch. 1 Sense Ch 2 pin B Sense Ch 1 pin A Negative supply (ground) Sense Ch 1 pin B Sense Ch 2 pin A Detection output, Ch. 2 Positive supply The two sensing channels operate in interleaved time-sequence and thus cannot interfere with each other. Alternate Pin Functions for Cloning SCK Serial clone data clock SDO Serial clone data out SDI Serial clone data in 1 - OVERVIEW The QT320 is a 2 channel digital burst mode charge-transfer (QT) sensor designed specifically for touch controls; it includes all hardware and signal processing functions necessary to provide stable sensing under a wide variety of changing conditions. Only two low-cost, non-critical capacitors are required for operation. A unique aspect of the QT320 is the ability of the designer to ‘clone’ a wide range of user-defined setups into the part’s eeprom during development and in production. Cloned setups can dramatically alter the behavior of each channel, independently. For production, the parts can be cloned in-circuit or can be procured from Quantum pre-cloned. Figure 1-1 Basic QT320 circuit 1.2 ELECTRODE DRIVE 1.2.1 SWITCHING OPERATION Figure 1-1 shows the basic QT320 circuit using the device, with a conventional output drive and power supply connections. The IC implements two channels of direct-to-digital capacitance acquisition using the charge-transfer method, in a process that is better understood as a capacitanceto-digital converter (CDC). The QT switches and charge measurement functions are all internal to the IC (Figure 1-2). 1.1 BASIC OPERATION The QT320 employs bursts of variable-length charge-transfer cycles to acquire its signal. Burst mode permits power consumption in the microamp range, dramatically reduces RF emissions, lowers susceptibility to EMI, and yet permits excellent response time. Internally the signals are digitally processed to reject impulse noise using a 'consensus' filter The CDC treats sampling capacitor Cs as a floating store of accumulated charge which is switched between the sense pins; as a result, the sense electrode can be connected to either pin with no performance difference. In both cases the rule Cs >> Cx must be observed for proper operation. The polarity of the charge build-up across Cs during a burst is the same in either case. Typical values of Cs range from 2nF to 100nF for touch operation. Larger values of Cx cause charge to be transferred into Cs more rapidly, reducing available resolution and resulting in lower gain. Conversely, larger values of Cs reduce the rise of differential voltage across it, increasing available resolution and raising gain. The value of Cs can thus be increased to allow larger values of Cx to be tolerated (Figures 5-1 to 5-4). As Cx increases, the length of the burst decreases resulting in lower signal numbers. It is possible to connect separate Cx and Cx’ loads to Sa and Sb simultaneously, although the result is no different than if the loads were connected together at Sa (or Sb). It is important to limit the amount of stray Cx capacitance on both terminals, especially if the load Cx is already large. This can be accomplished by minimising trace lengths and widths. Figure 1-2 Internal Switching lQ 2 QT320/R1.03 08/02 1.2.2 CONNECTION TO ELECTRODES 1.3.2 KIRCHOFF’S CURRENT LAW The PCB traces, wiring, and any components associated with or in contact with Sa and Sb of either channel will become touch sensitive and should be treated with caution to limit the touch area to the desired location. Like all capacitance sensors, the QT320 relies on Kirchoff’s Current Law (Figure 1-4) to detect the change in capacitance of the electrode. This law as applied to capacitive sensing requires that the sensor’s field current must complete a loop, returning back to its source in order for capacitance to be sensed. Although most designers relate to Kirchoff’s law with regard to hardwired circuits, it applies equally to capacitive field flows. By implication it requires that the signal ground and the target object must both be coupled together in some manner in order for the sensor to operate properly. Note that there is no need to provide an actual hardwired ground connection; capacitive coupling to ground (Cx1) often is sufficient, even if the coupling might seem very tenuous. For example, powering the sensor via an isolated transformer will almost always provide ample ground coupling, since there is plenty of capacitance between the primary and secondary windings via the transformer core and from there to the power wiring itself directly to 'local earth'. Even when battery powered, just the physical size of the PCB and the object into which the electronics is embedded is often enough to couple enough back to local earth. Multiple touch electrodes can be connected to one sensing channel, for example to create a control button on both sides of an object, however it is impossible for the sensor to distinguish between the two connected touch areas. The implications of Kirchoff’s law can be most visibly demonstrated by observing the E3B eval board’s sensitivity change between laying the board on a table versus holding the board in your hand by it’s batteries. The effect can also be observed by holding the board only by one electrode, letting it recalibrate, then touching the battery end; the board will work quite well in this mode. Figure 1-3 Mesh Electrode Geometry 1.2.3 BURST MODE OPERATION 1.3.3 VIRTUAL CAPACITIVE GROUNDS The acquisition process occurs in bursts (Figure 1-7) of variable length, in accordance with the single-slope CDC method. The burst length depends on the values of Cs and Cx. Longer burst lengths result in higher gains and more sensitivity for a given threshold setting, but consume more average power and are slower. When detecting human contact (e.g. a fingertip), grounding of the person is never required, nor is it necessary to touch an exposed metal electrode. The human body naturally has several hundred picofarads of ‘free space’ capacitance to the local environment (Cx3 in Figure 1-4), which is more than two orders of magnitude greater than that required to create a return path to the QT320 via earth. The QT320's PCB however can be physically quite small, so there may be little ‘free space’ coupling (Cx1 in Figure 1-4) between it and the environment to complete the return path. If the QT320 circuit ground cannot be grounded via the supply connections, then Burst mode operation acts to lower average power while providing a great deal of signal averaging inherent in the CDC process, making the signal acquisition process more robust. The QT method is a very low impedance method of sensing as it loads Cx directly into a very large capacitor (Cs). This results in very low levels of RF susceptibility. 1.3 ELECTRODE DESIGN 1.3.1 ELECTRODE GEOMETRY AND SIZE There is no restriction on the shape of the electrodes; in most cases common sense and a little experimentation can result in a good electrode design. The QT320 will operate equally well with long, thin electrodes as with round or square ones; even random shapes are acceptable. The electrode can also be a 3-dimensional surface or object. Sensitivity is related to electrode surface area, orientation with respect to the object being sensed, object composition, and the ground coupling quality of both the sensor circuit and the sensed object. Smaller electrodes will have less sensitivity than large ones. If a relatively large electrode surfaces are desired, and if tests show that an electrode has a high Cx capacitance that reduces the sensitivity or prevents proper operation, the electrode can be made into a mesh (Figure 1-3) which will have a lower Cx than a solid electrode area. Figure 1-4 Kirchoff’s Current Law lQ 3 QT320/R1.03 08/02 1.4 SENSITIVITY ADJUSTMENTS There are three variables which influence sensitivity independently for each channel: 1. Cs (sampling capacitor) 2. Cx (unknown capacitance) Sense wire 3. Signal threshold value Sense wire There is also a sensitivity dependence of the whole device on Vdd. Cs and Cx effects are covered in Section 1.2.1. The threshold setting can be adjusted independently for each channel from 1 to 16 counts of signal swing (Section 2.2). Unshielded Electrode Note that sensitivity is also a function of other things like electrode size, shape, and orientation, the composition and aspect of the object to be sensed, the thickness and composition of any overlaying panel material, and the degree of mutual coupling of the sensor circuit and the object (usually via the local environment, or an actual galvanic connection). Shielded Electrode Figure 1-5 Field Shielding & Shaping It is advisable to set the sensitivity to the approximate desired result by changing Cx and Cs first using a signal threshold fixed at 10. Use the threshold value thereafter to fine-tune sensitivity. a ‘virtual capacitive ground’ may be required to increase return coupling. A ‘virtual capacitive ground’ can be created by connecting the QT320’s own circuit ground to: 1.4.1 INCREASING SENSITIVITY In some cases it may be desirable to greatly increase sensitivity, for example when using the sensor with very thick panels having a low dielectric constant, or when sensing low capacitance objects. (1) A nearby piece of metal or metallized housing; (2) A floating conductive ground plane; (3) A fastener to a supporting structure; (4) A larger electronic device (to which its output might be connected anyway). Sensitivity can be increased by using a bigger electrode, reducing panel thickness, or altering panel composition. Increasing electrode size can have diminishing returns, as high values of Cx load will also reduce sensor gain (Figures 5-1 to 5-4). The value of Cs also has a dramatic effect on sensitivity, and this can be increased in value up to a limit. Because the QT320 operates at a relatively low frequency, about 500kHz, even long inductive wiring back to ground will usually work fine. Free-floating ground planes such as metal foils should maximise exposed surface area in a flat plane if possible. A square of metal foil will have little effect if it is rolled up or crumpled into a ball. Virtual ground planes are more effective and can be made smaller if they are physically bonded to other surfaces, for example a wall or floor. Increasing electrode surface area will not substantially increase sensitivity if its area is already larger than the object to be detected. The panel or other intervening material can be made thinner, but again there are diminishing rewards for doing so. Panel material can also be changed to one having a higher dielectric constant, which will help propagate the field. Locally adding some conductive material to the panel (conductive materials essentially have an infinite dielectric constant) will also help; for example, adding carbon or metal fibers to a plastic panel will greatly increase frontal field 1.3.4 FIELD SHIELDING AND SHAPING The electrode can be prevented from sensing in undesired directions with the assistance of metal shielding connected to circuit ground (Figure 1-5). For example, on flat surfaces, the field can spread laterally and create a larger touch area than desired. To stop field spreading, it is only necessary to surround the touch electrode on all sides with a ring of metal connected to circuit ground; the ring can be on the same or opposite side from the electrode. The ring will kill field spreading from that point outwards. If one side of the panel to which the electrode is fixed has moving traffic near it, these objects can cause inadvertent detections. This is called ‘walk-by’ and is caused by the fact that the fields radiate from either surface of the electrode equally well. Again, shielding in the form of a metal sheet or foil connected to circuit ground will prevent walk-by; putting a small air gap between the grounded shield and the electrode will keep the value of Cx lower and is encouraged. In the case of the QT320, sensitivity can be high enough (depending on Cx and Cs) that 'walk-by' signals are a concern; if this is a problem, then some form of rear shielding may be required. Figure 1-6 Circuit with Csx gain equalization capacitor lQ 4 QT320/R1.03 08/02 Figure 1-7 Burst lengths without Csx installed Figure 1-8 Burst lengths with Csx installed (observed using a 750K resistor in series with probe) (observed using a 750K resistor in series with probe) strength, even if the fiber density is too low to make the plastic electrically conductive. capacitors. This can be useful in some designs where one more sensitive channel is desired, but if equal sensitivity is required a few basic rules should be followed: 1.4.2 DECREASING SENSITIVITY 1. Use a symmetrical PCB layout for both channels: Place the IC half way between the two electrodes to match Cx loading. Avoid routing ground plane (or other traces) close to either sense line or the electrodes; allow 4-5 mm clearance from any ground or other signal line to the electrodes or their wiring. Where ground plane is required (for example, under and around the QT320 itself) the sense wires should have minimized adjacency to ground. In some cases the circuit may be too sensitive, even with high signal threshold values. In this case gain can be lowered by making the electrode smaller, using sparse mesh with a high space-to-conductor ratio (Figure 1-3), and most importantly by decreasing Cs. Adding Cx capacitance will also decrease sensitivity. It is also possible to reduce sensitivity by making a capacitive divider with Cx by adding a low-value capacitor in series with the electrode wire. 2. Connect a small capacitor (~5pF) between S1a or S1b (either Channel 1 pin) and circuit ground (Csx in Figure 1-6), this will increase the load capacitance of Channel 1, thus balancing the sensitivity of the two channels (see Figures 1-7, 1-8). 1.4.3 HYSTERESIS Hysteresis is required to prevent chattering of the output lines with weak, noisy, or slow-moving signals. 3. Adjust Cs and/or the internal threshold of the two channels until the sensitivities of the two channels are indistinguishable from each other. The hysteresis can be set independently per channel. Hysteresis is a reference-based number; thus, a threshold of 10 with a hysteresis of 2 will yield 2 counts of hysteresis (20%); the channel will become active when the signal equals or exceeds a count of 10, and go inactive when the count falls to 7 or lower. Since the actual burst length is proportional to sensitivity, you can use an oscilloscope to balance the two channels with more accuracy than by empirical methods (See Figures 1-7 and 1-8). Connect one scope probe to Channel 1 and the other to Channel 2, via large resistors (750K ohms) to avoid disturbing the measurement too much, or, use a low-C FET probe. The Csx balance capacitor should be adjusted so that the burst lengths of Channels 1 and 2 look nearly the same. Hysteresis can also be set to zero (0), in which case the sensor will go inactive when the count falls to 9 or lower in the above example. Threshold levels of under 4 counts are hard to deal with as the hysteresis level is difficult to set properly. With some diligence the PCB can also be designed to include some ground plane nearer to Channel 1 traces to induce about 5pF of Csx load without requiring an actual discrete capacitor. 1.4.4 CHANNEL BALANCE Channel 1 has less internal Cx than Channel 2, which makes it more sensitive than Channel 2 given equal Cx loads and Cs lQ 5 QT320/R1.03 08/02 Figure 1-9 Bursts when SC > 0 1.5 TIMING Figure 1-11 Burst detail The QT320 runs two sensing bursts, one per channel, each acquisition cycle (Figure 1-9). The bursts are successive in time, with Channel 2 firing first. 1.5.1 BURST SPACING: TI, SC, TBS The basic QT320 timing parameters are: Ti Tbs Tbd1 Tbd2 Tbd Tmod Tdet Basic timing interval Burst spacing Burst duration, Channel 1 Burst duration, Channel 2 Burst duration, Ch1 + Ch2 Max On-Duration Detection response time Between acquisition bursts, the device can go into a low power sleep mode. The percentage of time spent in sleep depends on the burst spacing and the combined burst lengths of both channels; if the burst lengths occupy all of the sleep interval, no time will be spent in sleep mode and the part will operate at maximum power drain. (1.5.1) (1.5.1) (1.5.2) (1.5.2) (1.5.2) (1.5.3) (1.5.4) The burst spacing is a multiple of the basic timing interval Ti; Ti in turn depends heavily on Vdd (see Section 2.1 and Figure 5.7). The parameter ‘Sleep Cycles’ or SC is the user-defined Setup value which controls how many Ti intervals there are from the start of a burst on Channel 2 until the start of the next such burst. The resulting timing is Tbs: Tbs = SC x Ti where SC > 0. All the basic timing parameters of the QT320 such as recalibration delay etc. are dependent on Tbs. If SC = 0, the device never sleeps between bursts (Figure 1-10). This mode is fast but consumes maximum power; it is also unregulated in timing from burst to burst, depending on the combined burst lengths of both channels. Conversely if SC >> 0, the device will spend most of its time in sleep mode and will consume very little power, but it will be slower to respond. By selecting a supply voltage and a value for SC, it is possible to fine-tune the circuit for the desired speed / power tradeoff. 1.5.2 BURST DURATIONS: TBD1, TBD2, TBD The two burst durations depend entirely on the values of Cs and Cx for the coresponding sensing channel, and to a lesser extend, Vdd. The bursts are composed of hundreds of charge-transfer cycles (Figure 1-11) operating at about 500kHz. Channel 2 always fires first (Tbd2) followed by Channel 1 (Tbd1); the sum total of the time required by both channels is parameter Tbd. Figure 1-10 Bursts when SC = 0 (750K resistor in series with scope probe) lQ 6 QT320/R1.03 08/02 When SC=0 (no sleep cycles), the sensor operates without a fixed timing and the acquisition spacing Tbs is the sum of the burst durations for both channels (Figure 1-10). In this mode of operation, Tbs and Tbd are the same value. 2 - CONTROL & PROCESSING All acquisition functions are digitally controlled and can be altered via the cloning process. Signals are processed using 16 bit integers, using Quantum-pioneered algorithms specifically designed to provide for high survivability. 1.5.3 MAX ON-DURATION, TMOD The Max On-Duration is the amount of time required for a continuously detecting sense channel to recalibrate itself. This parameter is user settable by changing MOD and SC (Section 2.6). 2.1 SLEEP CYCLES (SC) Range: 0..255; Default: 1 Affects speed & power of entire device. Tmod restarts if the OUT pin becomes inactive. A recalibration of one channel has no effect on the other; Tmod operates independently for each channel. Refer to Section 1.5.1 for more information on the effect of Sleep Cycles. 1.5.4 RESPONSE TIME, TDET SC changes the number of intervals Ti separating two consecutive burst pairs (Figure 1-10). SC = 0 disables sleep intervals and bursts are crowded together with a rep rate that depends entirely on the burst lengths of both channels (Section 1.5.2). Response time from the onset of detection to an actual OUT pin becoming active depends on: Ti SC DIT DIS Tbd Basic Timing Interval Sleep Cycles Detection Integrator Target Detect Integration Speed Burst duration (user setting) (user setting) (user setting) (if DIS is set too fast) Response time, drift compensation rate, max on-duration, and power consumption are all affected by this parameter. A high value of SC will make the sensor very low power and very slow. Ti depends in turn on Vdd. If the control bit DIS is normal (0), then Tdet depends on the rate at which the bursts are acquiring, and the value of DIT. A DIT number of bursts must confirm the detection before the OUT line becomes active: Tdet = SC x Ti x DIT 2.2 DRIFT COMPENSATION (PDC, NDC) Signal drift can occur because of changes in Cx, Cs, Vdd, electrode contamination and aging effects. It is important to compensate for drift, otherwise false detections and sensitivity shifts can occur. (normal DIS) If DIS is set to fast, then Tdet also depends on BL: Tdet = (SC x Ti) + (DIT-1)*Tbd Drift compensation is performed by making the signal’s reference level slowly track the raw signal while no detection is in effect. The rate of adjustment must be performed slowly, otherwise legitimate detections could be affected. The device compensates using a slew-rate limited change to the signal reference level; the threshold and hysteresis points are slaved to this reference. (fast DIS) Ti depends in turn on Vdd; Tbd depends on Cs and Cx for both channels. Quantum’s QT3View software calculates an estimate of response time based on these parameters. Once an object is detected, drift compensation stops since a legitimate signal should not cause the reference to change. 1.6 EXTERNAL RECALIBRATION The QT320 has no recalibration pin; a forced recalibration is accomplished only when the device is powered up. However, supply drain is low enough that the IC can be powered from a logic gate or I/O pin of an MCU; driving the Vdd pin low and high again can serve as a forced recalibration. The source resistance of many CMOS gates and MCU’s are low enough to provide direct power without problems. A 0.01uF minimum bypass capacitor is required directly across Vdd to Vss. Positive and negative drift compensation rates (PDC, NDC) can be set to different values (Figure 2-1). This is invaluable for permitting a more rapid reference recovery after a channel has recalibrated while an object was present and then removed. Figure 2-1 Drift Compensation lQ 7 QT320/R1.03 08/02 If SC > 0, then PDC+1 sets the number of burst spacings, Tbs, that determines the interval of drift compensation, where: Tbs = SC x Ti (Section 1.5.1) 2.3 THRESHOLDS (THR1, THR2) Example: The detection threshold is set independently for each channel via the cloning process. Threshold is measured in terms of counts of signal deviation with respect to the reference level. Higher threshold counts equate to less sensitivity since the signal must travel further in order to cross the detection point. PDC = 9, Tbs = 100ms Range: 1..16; Default: 6 Affects sensitivity. (user setting) then Tpdc = (9+1) x 100ms = 1 sec. If SC = 0, the result is multplied by 16, and Tbd becomes the time basis for the compensation rate, where: Example: Tbd = Tbd1 + Tbd2 (Section 1.5.2) PDC = 5, Tbd = 31ms (user setting) If the signal equals or exceeds the threshold value, a detection can occur. The detection will end only when the signal become less than the hysteresis level. 2.4 HYSTERESIS (HYS1, HYS2) then Tpdc = (5+1) x 31ms x 16 = 2.98 sec Range: 0...16; Default: 2 Affects detection stability. NDC operates in exactly the same way as PDC. The hysteresis levels are set independently for each channel via the cloning process. Hysteresis is measured in terms of counts of signal deviation below the threshold level. Higher values equate to more hysteresis. The channel will become inactive after a detection when the signal level falls below THRn-HYSn. Hysteresis prevents chattering of the OUT pin when there is noise present. 2.2.1 POSITIVE DRIFT COMPENSATION (PDC) Range: 0..255; Default: 100; 255 disables Ability to compensate for drift with increasing signals. PDC corrects the reference when the signal is drifting up. Every interval of time the device checks each channel for the need to move its reference level in the positive direction in accordance with signal drift. The resulting timing interval for this adjustment is Tpdc. If HYS1 or HYS2 are set to a value equal or greater than THR1 or THR2 respectively, the channel may malfunction. Hysteresis should be set to between 10% and 40% of the threshold value for best results. This value should not be set too fast, since an approaching finger could be compensated for partially or entirely before even touching the sense electrode. Tpdc is common to both sensing channels and cannot be independently adjusted. If THR1 = 10 and HYS1 = 2, the hysteresis zone will represent 20% of the threshold level. In this example the ‘hysteresis zone’ is the region from 8 to 10 counts of signal level. Only when the signal falls back to 7 will the OUT pin become inactive. 2.2.2 NEGATIVE DRIFT COMPENSATION (NDC) Range: 0...255 Default: 2; 255 disables Aability to compensate for drift with decreasing signals. This corrects the reference level when the signal is decreasing due to signal drift. This should normally be faster than positive drift compensation in order to compensate quickly for the removal of a touch or obstruction from the electrode after a MOD recalibration (Section 1.5.3). This parameter is common to both channels. The resulting timing interval for this adjustment is Tndc. Figure 2-2 Detect Integrator Filter Operation lQ 8 QT320/R1.03 08/02 2.5 DETECT INTEGRATORS (DIA, DIB, DIS) The MOD function can also be disabled, in which case the channel will never recalibrate unless the part is powered down and back up again. In infinite timeout the designer should take care to ensure that drift in Cs, Cx, and Vdd do not cause the device to ‘stick on’ inadvertently when the target object is removed from the sense field. DIAT1, 2 Range: 1..256 Default: 10 DIBT1, 2 Range: 1..6 Default: 6 DIS Range: 0, 1 Default: 1 Affects response time Tdet. See Figure 2-2 for operation. MOD is expressed in multiples of the burst space interval, which can be either Tbs or Tbd depending on the Sleep Cycles setting (SC). It is usually desirable to suppress detections generated by sporadic electrical noise or from quick contact with an object. To accomplish this, the QT320 incorporates two detection integrator (‘DI’) counters per channel that serve to confirm detections and slow down response time. The counter pairs operate independently for each sensing channel. If SC > 0, the delay is: Tmod = (MOD + 1) x 16 x Tbs Example: Tbs = 100ms, MOD = 9; DIA / DIAT: The first counter, DIA, increments after each burst if the signal threshold has been exceeded in that burst, until DIA reaches its terminal count DIAT, after which the corresponding OUT pin goes active. If the signal falls below the threshold level prior to reaching DIAT, DIA resets. Tmod = (9 + 1) x 16 x 100ms = 160 secs. If SC = 0, Tmod is a function of the total combined burst durations, Tbd. If SC = 0, the delay is: DIA can also be viewed as a 'consensus' filter that requires signal threshold crossings over ‘T’ successive bursts to create an output, where ‘T’ is the terminal count (DIAT). Tmod = (MOD + 1) x 256 x Tbd Example: Tbd = 18ms, MOD = 9; DIA1 / DIAT1 and DIA2 / DIAT2 are used in conjunction with their respective channels. DIB / DIBT: If OUT is active and the signal falls below the hysteresis level, detect integrator DIB, counts up towards terminal count DIBT; when DIBT is reached, OUT is deactivated. DIBT is the same as DIAT if DIBT <= 6; If DIAT > 6, then DIBT = 6. Tmod = (9 + 1) x 256 x 18ms = 46 secs. If MOD = 255, recalibration timeout = infinite (disabled) regardless of SC. An MOD induced recalibration will make an OUT pin inactive except if the output is set to toggle mode (Section 2.7.2), in which case the OUT state will be unaffected but the underlying channel will have recalibrated. DIBT cannot be adjusted separately from DIAT. DIS: Because the DI counters count at the burst rate, slow burst spacings can result in very long detection delays with terminal counts above 1. To cure this problem, the burst rate can be made faster while DIA or DIB is counting up. This creates the effect of a gear-shifted detection process: normal speed when there are no threshold crossings, and fast mode when a detection is pending. The control bit for the fast DI mode is referred to as DIS. DIS applies to both channels; it cannot be enabled for just one channel. 2.7 OUTPUT FEATURES Available output processing options accommodate most requirements; these can be set via the clone process. Both OUT pins are open-drain, and require pullup resistors. 2.7.1 DC MODE, POLARITY DIS gear-shifts the effect of both DIA and DIB. The gear-shifting ceases and normal speed resumes once the detection is confirmed (DIA = DIAT) and once the detection ceases (DIB = DIBT). In DC mode the OUT pins respond to detections with a steady-state active logic level, this state will endure for the length of time that a detection exists or until a MOD timeout occurs (Section 2.6). When SC=0 the device operates without any sleep cycles, and so the timebase for the DI counters is very fast. The polarity of OUT can be set via the cloning process. Each channel can be set for this feature independently. Either active-low or active-high can be selected. 2.6 MAX ON-DURATION (MOD) 2.7.2 TOGGLE MODE Range: 0..255; Default: 14; 255 disables Affects parameter Tmod, the calibration delay time Toggle mode gives OUT pins a touch-on / touch-off flip-flop action, so that its state changes with each detection. It is most useful for controlling power loads, for example kitchen appliances, power tools, light switches, etc. If a stray object remains on or near the sense electrode, the signal may rise enough to activate an OUT pin thus preventing normal operation. To provide a way around this, a Max On-Duration (‘MOD’) timer is provided to cause a channel recalibration if the activation lasts longer than the designated timeout, Tmod. MOD time-outs (Section 2.6) will recalibrate the underlying channel but leave the OUT state unchanged. OUT polarity (Section 2.7.1) has no effect when toggle mode is engaged. The initial state at power-up of the OUT pins in toggle mode is always open drain (logic high). The timeout applies individually per channel. If one channel is active for the Max On-duration interval it will recalibrate, but the other channel will remain unaffected. lQ Each channel can be set individually for this feature. 9 QT320/R1.03 08/02 Vdd 8 3.2 POWER SUPPLY VDD S1A OUT1 OUT2 RE3 1 RE4 7 3 S1B 5 OUT1 OUT2 S2A S2B 6 2 RE1 SENSOR 1 CS1 RE2 SENSOR 2 CS2 VSS 4 Figure 3-1 ESD/EMC protection resistors 2.7.3 HEARTBEAT™ OUTPUT Both OUT pins have HeartBeat™ ‘health’ indicator pulses superimposed on them. Heartbeat floats both 'OUT' pins for approximately 15µs once before Channel 2’s burst. These pulses can be used to determine that the sensor is operating properly. The pulses are evident on an OUT line that is low, and appear as positive pulses. They are not evident on an OUT pin that is high. Heartbeat indication can be used to determine if the chip is operating properly. The frequency of the pulses can be used to determine if the IC is operating within desired limits. It is not possible to disable these pulses. Heartbeat pulses can be easily filtered by placing a suitable capacitor from an OUT pin to Vss, to prevent the OUT line from rising substantially within the 15µs pulse. For example, with a 10K pullup resistor, the capacitor can be 0.015µF of virtually any type. 2.7.4 OUTPUT DRIVE CAPABILITY The outputs can sink up to 2mA of non-inductive current. If an inductive load is used, such as a small relay, the load should be diode-clamped to prevent damage. The current must be limited to 2mA max to prevent detection side effects from occurring, which happens when the load current creates voltage drops on the die and bonding wires; these small shifts can materially influence the signal level to cause detection instability. 3 CIRCUIT GUIDELINES 3.1 SAMPLE CAPACITORS Cs capacitors can be virtually any plastic film or low to medium-K ceramic capacitor. The normal usable Cs range is from 1nF ~ 200nF depending on the sensitivity required; larger values of Cs require higher stability to ensure reliable sensing. Acceptable capacitor types include NPO or C0G ceramic, PPS film, Y5E and X7R ceramic in that order. If the design requires sensitivity matching between channels, it is strongly advised to use tight tolerance capacitors and to trim the relative sensitivities as described in Section 1.4.4. lQ 3.2.1 STABILITY The QT320 derives its internal references from the power supply. Sensitivity shifts and timing changes will occur with changes in Vdd, as often happens when additional power supply loads are switched on or off via one of the Out pins. These supply shifts can induce detection ‘cycling’, whereby an object is detected, the load is turned on, the supply sags, the detection is no longer sensed, the load is turned off, the supply rises and the object is reacquired, ad infinitum. Detection ‘stiction’, the opposite effect, can occur if a load is shed when an output is active and the signal swings are small: the Out pin can remain stuck even if the detected object is no longer near the electrode. 3.2.2 SUPPLY REQUIREMENTS Vdd can range from 1.8 to 5.25 volts during operation, and 2.2 to 5.25 during eeprom Setups configuration. Current drain will vary depending on Vdd, the chosen sleep cycles, and the burst lengths. Increasing Cx values will decrease power drain since increasing Cx loads decrease burst length (Figures 5-1, 5-4). If the power supply is shared with another electronic system, care should be taken to assure that the supply is free of spikes, sags, and surges. The QT320 will track slow changes in Vdd if drift compensation is enabled, but it can be adversely affected by rapid voltage steps and spikes at the millivolt level. If desired, the supply can be regulated using a conventional low current regulator, for example CMOS LDO regulators with low quiescent currents, or standard 78Lxx-series 3-terminal regulators. For proper operation a 100nF (0.1uF) ceramic bypass capacitor should be used between Vdd and Vss; the bypass cap should be placed very close to the Vdd and Vss pins. 3.3 PCB LAYOUT 3.3.1 GROUND PLANES The use of ground planes around the device is encouraged for noise reasons, but ground should not be coupled too close to the four sense pins in order to reduce Cx load. Likewise, the traces leading from the sense pins to the electrode should not be placed directly over a ground plane; rather, the ground plane should be relieved by at least 3 times the width of the sense traces directly under it, with periodic thin bridges over the gap to provide ground continuity. 3.3.2 CLONE PORT CONNECTOR If a cloning connector is used, place this close to the QT320 (Figure 4-1). Placing the cloning connector far from the QT320 will increase the load capacitance Cx of the sensor and decrease sensitivity, as some of the cloning lines are sense lines. Long distances on these lines can also make the clone process more susceptible to communication errors from ringing and interference. Cloning can be designed for production by using pads (SMT or through-hole) on the solder side which are connected to a fixture via spring loaded ATE-style ‘pogo-pins’. This eliminates the need for an actual connector to save cost. 10 QT320/R1.03 08/02 In cases where the electrode is placed behind a dielectric panel, the device will usually be well protected from static discharge. However, even with a plastic or glass panel, transients can still flow into the electrode via induction, or in extreme cases, via dielectric breakdown. Porous materials may allow a spark to tunnel right through the material; partially conducting materials like 'pink poly' static dissipative plastics will conduct the ESD right to the electrode. Panel seams can permit discharges through edges or cracks. OUT1 1 OUT2 7 OUT1 S1B OUT2 S2A S2B 3 SENSOR 1 CS1 5 6 SENSOR 2 CS2 2 VSS 4 Figure 4-1 Clone interface wiring board has been designed with a connector to facilitate direct connection with the QTM300CA. The QTM300CA in turn connects to any PC with a serial port which can run QT3View software (included with the QTM300CA and available on Quantum’s web site). 3.5 EMC ISSUES Electromagnetic and electrostatic susceptibility are often a problem with capacitive sensors. QT320 behavior under these conditions can be improved by adding the series-R shown in Figure 3-1, exactly as shown for ESD protection. The resistor should be placed next to the chip. This works because the inbound RC network formed by Re and Cs has a very low cutoff frequency which can be computed by the formula: The connections required for cloning are shown in Figure 4-1. Further information on the cloning process can be found in the QTM300CA instruction guide. Section 3.3.2 discusses wiring issues associated with cloning. The parameters which can be altered are shown in Table 4-1 (next page). Parameters that can be altered for each channel independently are: Threshold Hysteresis Detect Integrator A Detect Integrator B Max On-Duration Output Mode 1 2✜ Re Cs If Re = 10K and Cs = 10nF, then Fc = 1.6kHz. This leads to very strong suppression of external fields. Nevertheless, it is always wise to reduce lead lengths by placing the QT320 as close to the electrodes as possible. Parameters that are common to the entire part are: Detect Integrator Speed Negative Drift Compensation Positive Drift Compensation Sleep Cycles Likewise, RF emissions are sharply curtailed by the use of Re, which bandwidth limits RF emissions based on the value of Re and Cx, the electrode capacitance. Line conducted EMI can be reduced by making sure the power supply is properly bypassed to chassis ground. The OUT lines can also be paths for conducted EMI, and these can be bypassed to circuit ground with an RC filter network. It is possible for an on-board host controller to read and change the internal settings via the interface, but doing so will inevitably disturb the sensing process even when data transfers are not occuring. The additional capacitive loading of the interface pins will contribute to Cx; also, noise on the interface lines can cause erratic operation. 4 PARAMETER CLONING The cloning process allows user-defined settings to be loaded into internal eeprom, or read back out, for development and production purposes. lQ SDO S1A ESD protection can be enhanced with an added resistor as shown in Figure 3-1. Because the charge and transfer times of the QT320 are 1us in duration, the circuit can tolerate values of Re which result in an RC timeconstant of about 200ns. The ‘C’ of the RC is the Cx load on the distant side from the QT320. Thus, for a Cx load of 20pF, the maximum Re should be 10K ohms. Larger amounts of Re will result in an increasingly noticeable loss of sensitivity. The QTM300CA cloning board in conjunction with QT3View software simplifies the cloning process greatly. The E3B eval SDI Vdd 8 VDD Testing is required to reveal any problems. The QT320 has internal diode protection which can absorb and protect the device from most induced discharges, up to 20mA; the usefulness of the internal clamping will depend on the dielectric properties, panel thickness, and rise time of the ESD transients. Fc = SCK GND 3.4 ESD ISSUES The internal eeprom has a life expectancy of 100,000 erase/write cycles. A serial interface specification for the device can be obtained by contacting Quantum. 11 QT320/R1.03 08/02 TABLE 4-1 SETUPS SUMMARY CHART Description Channel 1 Specific Features Common To Both Channels Valid Values Default Calculation / Notes Unit Threshold THR1 1 - 16 - 6 Higher = less sensitive Counts Hysteresis HYS1 0 - 16 - 2 Higher = more hysteresis Counts Det Integrator A DIAT1 1 - 256 - 10 Higher = longer to detect, more noise immune Burst Cycles Det Integrator B DIBT1 1-6 - 6 Value taken from DIAT1 but truncated to 6 Max-On Duration MOD1 Output Mode Channel 2 Specific Symbol OUT1 0 - 254 Finite 255 Infinite 0 Active Low 1 Active High 2 Toggle 14 (~10s at 3V) SC = 0 Tmod = (MOD1 + 1) x 256 x Tbs (note1) SC > 0 Tmod = (MOD1 + 1) x 16 x Tbs 0 (note2) Seconds Requires pullup resistor on OUT1 - Threshold THR2 1 - 16 - 6 Higher = less sensitive Counts Hysteresis HYS2 0 - 16 - 2 Higher = more hysteresis Counts Det Integrator A DIAT2 1 - 256 - 10 Higher = longer to detect, more noise immune Burst Cycles Det Integrator B DIBT2 1-6 - 6 Value taken from DIAT2 but truncated to 6 Max-On Duration MOD2 Output Mode OUT2 DI Speed DIS Negative Drift Compensation NDC Positive Drift Compensation PDC Sleep Cycles SC 0 - 254 Finite 255 Infinite 0 Active Low 1 Active High 2 Toggle 0 Slow 1 Fast 0 - 254 On 255 Off 0 - 254 On 255 Off 0 No Sleep 1 - 255 Sleep 14 (~10s at 3V) SC = 0 Tmod = (MOD2 + 1) x 256 x Tbs (note1) SC > 0 Tmod = (MOD2 +1) x 16 x Tbs (note2) Seconds 0 Requires pullup resistor on OUT2 - 1 - - 2 (~0.13s/bit @ 3V) SC = 0 Tndc = (NDC + 1) x 16 x Tbs (note1) SC > 0 Tndc = (NDC + 1) x Tbs 100 (~4.36s/bit @ 3V) SC = 0 Tpdc = (PDC + 1) x 16 x Tbs (note1) SC > 0 Tpdc = (PDC + 1) x Tbs 1 (~47ms Tbs @ 3V) Burst rep interval = Tbs = SC x Ti Seconds / bit change (note2) (note2) Seconds / bit change Counts Note 1: Tbs is the combined (summed) burst duration of Channel1 and Channel2 (Tbd). Note 2: Tbs is variable with the voltage, see figure 5-7. If Tbd is longer than 10ms,Tbs is Tbd plus the sleep time find on figure 5-7. Note 5: The sleep period time is find on figure 5-7(equivalent at 1 sleep period). lQ 12 QT320/R1.03 08/02 5 ELECTRICAL SPECIFICATIONS 5.1 ABSOLUTE MAXIMUM SPECIFICATIONS Operating temp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . as designated by suffix Storage temp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65OC to +150OC VDD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 to +6V Max continuous pin current, any control or drive pin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±40mA Short circuit duration to ground, any pin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . infinite Short circuit duration to VDD, any pin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . infinite Voltage forced onto any pin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to (Vdd + 0.5) Volts 5.2 RECOMMENDED OPERATING CONDITIONS VDD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +1.8 to 5.5V VDD during eeprom writes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +2.2 to 5.5V Short-term supply ripple+noise. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±5mV Long-term supply stability. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100mV Cs value. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1nF to 200nF Cx value. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 100pF 5.3 AC SPECIFICATIONS Vdd = 3.0, Ta = recommended operating range, Cs=100nF unless noted Symbol Description TRC Recalibration time TPC TPT TBL Burst length THB Heartbeat pulse width Min Typ Max Units 150 ms Charge duration 1 µs Transfer duration 1 Notes Cs, Cx dependent µs 0.5 25 ms 15 Cs = 10nF to 200nF; Cx = 0 µs 5.4 SIGNAL PROCESSING Symbol Description Min Typ Max Units Threshold differential w.r.t. reference 1 16 counts Hysteresis w.r.t. threshold 0 15 counts Consensus filter length 1 256 samples Positive drift compensation rate - ms/bit Negative drift compensation rate - ms/bit Post-detection recalibration timer duration <1 infinite Notes secs 5.5 DC SPECIFICATIONS Vdd = 3.0V, Cs = 10nF, Cx = 5pF, Ta = recommended range, unless otherwise noted Symbol VDD VDDW IDD VDDS Description Min Supply voltage 1.8 Vdd during eeprom write 2.2 Supply current 60 Supply turn-on slope 100 VIL Input low voltage VIH Input high voltage VOL Low output voltage Typ 600 Max Units 5.25 V 5.25 V 1,500 µA Depends on setting of Sleep Cycles V/s Required for proper start-up 0.3 Vdd 0.6 Vdd 0.4 V Vdd = 2.5 to 5.0V V Vdd = 2.5 to 5.0V V OUT1, OUT2, 2mA sink CX Load capacitance range AR Acquisition resolution S1 Sensitivity range, Channel 1 0.4 pF Threshold = 6; ref. Figure 5-3 S2 Sensitivity range, Channel 2 0.6 pF Threshold = 6; ref. Figure 5-4 lQ 0 Notes 13 200 pF 16 bits QT320/R1.03 08/02 10.00 Detection Threshold, pF Detection Threshold, pF 10.00 4.7nF 1.00 9nF 19nF 43nF 74nF 124nF 0.10 200nF 4.5nF 9nF 1.00 19nF 43nF 74nF 124nF 0.10 200nF 0.01 0.01 0 10 20 30 40 0 50 10 30 40 50 Figure 5-2 Typical Ch 2 Sensitivity vs. Cx; Threshold = 16, Vdd = 3.0 Figure 5-1 Typical Ch 1 Sensitivity vs. Cx; Threshold = 16, Vdd = 3.0 10.00 10.00 4.7nF 9nF 19nF 43nF 74nF 124nF 200nF 1.00 0.10 Detection Threshold, pF Detection Threshold, pF 20 Cx Load Cx Load 0.01 0 10 20 30 40 9nF 19nF 43nF 74nF 124nF 200nF 0.10 0.01 50 0 Cx Load 10 20 30 40 50 Cx Load Figure 5-3 Typical Ch 1 Sensitivity vs. Cx; Threshold = 6, Vdd = 3.0 lQ 4.7nF 1.00 Figure 5-4 Typical Ch 2 Sensitivity vs. Cx; Threshold = 6, Vdd = 3.0 14 QT320/R1.03 08/02 25.000 20.000 20.000 Burst Length (ms) Burst Length (ms) 25.000 15.000 10.000 5.000 52 118 10.000 5.000 507 884 1450 Sampling Capacitor (nF) 2357 Cx = 21pF 52 118 228 507 884 1450 2357 Sampling Capacitor (nF) Cx = 21pF 228 Cx = 0pF 0.000 Cx = 0pF 0.000 15.000 Cx = 48pF Cx = 48pF Load (pF) Load (pf) Figure 5-6 Typical Ch 2 burst length vs Cx, Cs; Vdd = 3.0 Figure 5-5 Typical Ch 1 burst length vs Cx, Cs; Vdd = 3.0 180 Burst Spacing (ms) 160 140 120 100 80 60 40 20 0 1.5 2 2.5 3 3.5 4 4.5 5 5.5 Power Supply (Volts) Figure 5-7 Typical total burst spacing vs. Vdd; SC = 1, Tbd < 10ms lQ 15 QT320/R1.03 08/02 450 400 350 Sleep Cycles Cuurent (uA) 300 None 250 One 200 Three Two Five 150 100 50 0 0 10 20 30 40 50 60 Sampling Capacitor (nF) Figure 5-8 Idd current vs Cs; Vdd = 2.0 900 800 700 Sleep Cycles Current (uA) 600 None One 500 Two Three 400 Five Ten 300 200 100 0 0 10 20 30 40 50 60 Sampling Capacitor (nF) Figure 5-9 Idd current vs Cs; Vdd = 3.3 2000 1800 1600 Sleep Cycles Current (uA) 1400 None 1200 One 1000 Two Three 800 Five 600 Ten 400 200 0 0 10 20 30 40 50 60 Sampling Capacitor (nF) Figure 5-10 Idd current vs Cs; Vdd = 5.0 lQ 16 QT320/R1.03 08/02 M A F S1 a A r S L2 Pin 1 x m L1 Q L Package type: 8-pin Dual-In-Line SYMBOL Millimeters Max Min a A M m Q L L1 L2 F r S S1 x 6.1 7.62 9.02 7.62 0.69 0.356 1.14 0.203 2.54 0.38 2.92 - 7.11 8.26 10.16 0.94 0.559 1.78 0.305 3.81 5.33 10.9 Notes Inches Max Min 0.24 0.3 0.355 0.3 0.027 0.014 0.045 0.008 0.1 0.015 0.115 - Typical BSC 0.28 0.325 0.4 0.037 0.022 0.07 0.012 0.15 0.21 0.43 Notes Typical BSC M M a H A φ e h Pin 1 E F L Package type: 8-pin Wide SOIC SYMBOL a A M F L h H e E φ Min 5.21 7.62 5.16 1.27 0.305 0.102 1.78 0.178 0.508 0o lQ Millimeters Max 5.41 8.38 5.38 0.508 0.33 2.03 0.254 0.889 8o Notes BSC 17 Min 0.205 0.3 0.203 0.05 0.012 0.004 0.07 0.007 0.02 0o Inches Max 0.213 0.33 0.212 0.02 0.013 0.08 0.01 0.035 8o Notes BSC QT320/R1.03 08/02 lQ ©2002 QRG Ltd. Patented and patents pending Corporate Headquarters 1 Mitchell Point Ensign Way, Hamble SO31 4RF Great Britain Tel: +44 (0)23 8056 5600 Fax: +44 (0)23 8045 3939 [email protected] www.qprox.com North America 651 Holiday Drive Bldg. 5 / 300 Pittsburgh, PA 15220 USA Tel: 412-391-7367 Fax: 412-291-1015 Specifications subject to change. This device expressly not for use in any medical or human safety related application without the express written consent of an officer of the company.