GTM GMAC97A6

ISSUED DATE :2005/09/28
REVISED DATE :
G M AC 9 7 A6
S E N S I T I V E G AT E T R I A C S S I L I C O N B I D I R E C T I O N A L T H Y R I S T O R S 0 . 8 A , 4 0 0 V
Description
The GMAC97A6 device is designed for use in solid relays, MPU interface, TTL logic and any other light
industrial or consumer application.
Supplied in an inexpensive TO-92 package which is readily adaptable for use in automatic insertion equipment.
Features
Sensitive Gate Triggering in Four Trigger Modes (Quadrants) for all possible Combinations of Trigger Sources,
and especially for Circuits that Source Gate Drives
All Diffused and Glassivated Junction for Maximum Uniformity of parameters and Reliability
Package Dimensions
D
TO-92
E
A
S1
b1
REF.
L
S E A T IN G
PLANE
e1
e
b
A
S1
b
b1
C
C
Absolute Maximum Ratings (TJ=25
Millimeter
Min.
Max.
4.45
4.7
1.02
0.36
0.51
0.36
0.76
0.36
0.51
REF.
D
E
L
e1
e
Millimeter
Min.
Max.
4.44
4.7
3.30
3.81
12.70
1.150
1.390
2.42
2.66
unless otherwise noted)
Rating
Symbol
Value
Unit
Peak Repetitive Off-State Voltage(Note1)
Sine Wave, 50 to 60Hz, Gate Open (TJ=-40 to 110 )
VDRM
VRRM
400
V
On-state RMS Current, Full Cycle Sine Wave 50 to 60Hz (TC=50 )
Peak Non-Repetitive Surge Current
One Full Cycle, Sine Wave, 60Hz (TC=110 )
Circuit Fusing Consideration (t=8.3ms)
IT(RMS)
0.6
A
ITSM
8
A
2
0.26
A2S
Peak Gate Power (t
2.0 s, TC=80 )
Average Gate Power (t
8.3ms, TC=80 )
I
t
PGM
5.0
W
PG(AV)
0.1
W
Peak Gate Current (t
2.0 s, TC=80 )
IGM
1.0
A
Peak Gate Voltage (t
2.0 s, TC=80 )
VGM
5.0
V
TJ
-40 ~ +110
Operating Junction Temperature Rang
Storage Temperature Rage
Tstg
-40 ~ +150
Note 1.VDRM and VRRM for all types can be applied on a continuous basis. Blocking voltages shall not be tested with a
constant current source such that the voltage ratings of the devices are exceeded.
Thermal Characteristics
Characteristic
Thermal Resistance, Junction-to-case
Thermal Resistance, Junction-to-Ambient
Maximum Lead Temperature for soldering Purposes for 10 Seconds
GMAC97A6
Symbol
R JC
R JA
TL
Max
75
200
260
Unit
/W
/W
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ISSUED DATE :2005/09/28
REVISED DATE :
Electrical Characteristics (TC = 25
unless otherwise noted; Electricals apply in both directions)
Characteristic
Off Characteristics
Peak Repetitive Blocking Current (Note2)
TJ=25
TJ=110
(VDRM=400V and VRRM=400V; Gate Open)
On Characteristics
Peak On-State Voltage 2.0 s)
(ITM=±0.85A Peak; Pulse Width 2.0ms, Duty Cycle
Gate Trigger Current (Continuous dc)
(VD=12.0 Vdc, RL=100 )
MT2(+), G(+)
MT2(+), G( - )
MT2( - ), G( - )
MT2( - ), G(+)
Gate Trigger Voltage (Continuous dc)
(VD=12.0 Vdc, RL=100 )
MT2(+), G(+) All Types
MT2(+), G( - ) All Types
MT2( - ), G( - ) All Types
MT2( - ), G(+) All Types
2.0%)
Symbol
VDRM
IDRM
VRRM
IRRM
VTM
IH
Parameter
Min
Typ
Max
IDRM,IRRM
-
-
10
100
A
VTM
-
-
1.9
V
-
-
5.0
5.0
5.0
7.0
-
0.66
0.77
0.84
0.88
2.0
2.0
2.0
2.5
VGD
0.1
-
-
V
IH
-
1.5
10
mA
tgt
-
2.0
-
s
dV/dt (c)
-
5.0
-
V/ s
dv/dt
-
25
-
V/ s
IGT
VGT
Gate Non-Trigger Voltage
(VD=12.0 V, RL=100 TJ=110 ) All Four Quadrants
Holding Current
(VD=12.0 Vdc, Initiating Current=200mA, Gate Open)
Turn-On Time
(VD= VDRM=400V, ITM=1.0A pk, IG=25mA)
Dynamic Characteristics
Critical Rate of Rise of Commutation Voltage
(VD=VDRM=400V, ITM=0.84A, Commutation di/dt=0.3A/ms,
Gate Unenergized, TC=50 )
Critical Rate of Rise of Off-State Voltage
(VD=VDRM=400V, TC=110 , Gate Open, Exponential Waveform)
Voltage Current Characteristic of Triacs
(Bidirectional Device)
Symbol
Unit
mA
V
Quadrant Definitions for a Triac
Peak Repetitive Forward Off State Voltage
Peak Forward Blocking Current
Peak Repetitive Reverse Off State Voltage
Peak Reverse Blocking Current
Maximum On State Voltage
Holding Current
All polarities are referenced to MT1.
With in-phase signals (using standard AC lines) quadrants
are used
GMAC97A6
and
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ISSUED DATE :2005/09/28
REVISED DATE :
Characteristics Curve
Fig 1. RMS Current Derating
Fig 2. RMS Current Derating
Fig 3. Power Dissipation
Fig 4. Transient Thermal Response
GMAC97A6
Fig 5. On-State Characteristics
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ISSUED DATE :2005/09/28
REVISED DATE :
Fig 6. Typical Gate Trigger Voltage
v.s. Junction Temperature
Fig 8. Typical Latching Current
v.s. Junction Temperature
Fig 10. Maximum Allowable Surge Current
Fig 7. Typical Gate Trigger Current
v.s. Junction Temperature
Fig 9. Typical Holding Current
v.s. Junction Temperature
Fig 11. Simplified Test Circuit to Measure the
Critical Rate of Rise of Commutating Voltage (dV/dt)C
Important Notice:
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of GTM.
GTM reserves the right to make changes to its products without notice.
GTM semiconductor products are not warranted to be suitable for use in life-support Applications, or systems.
GTM assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.
Head Office And Factory:
Taiwan: No. 17-1 Tatung Rd. Fu Kou Hsin-Chu Industrial Park, Hsin-Chu, Taiwan, R. O. C.
TEL : 886-3-597-7061 FAX : 886-3-597-9220, 597-0785
China: (201203) No.255, Jang-Jiang Tsai-Lueng RD. , Pu-Dung-Hsin District, Shang-Hai City, China
TEL : 86-21-5895-7671 ~ 4 FAX : 86-21-38950165
GMAC97A6
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