INFINEON ICE2A380P2

D a t a s h e e t V e r s i o n 0 .0 , 2 3 S e p 2 00 4
CoolSET™-F2
ICE2A380P2
Off-Line SMPS Current Mode
Controller with integrated 800V
CoolMOS™
Power Management & Supply
N e v e r
s t o p
t h i n k i n g .
CoolSET™-F2
ICE2A380P2
Revision History:
2004-09-23
Version 0.0
Previous Version:
Page
Subjects (major changes since last revision)
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www.infineon.com.
CoolMOS™, CoolSET™ are trademarks of Infineon Technologies AG.
Edition 2004-09-23
Published by Infineon Technologies AG,
St.-Martin-Strasse 53,
D-81541 München
© Infineon Technologies AG 2004.
All Rights Reserved.
Attention please!
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Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding
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Information
For further information on technology, delivery terms and conditions and prices please contact your nearest
Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address
list).
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Due to technical requirements components may contain dangerous substances. For information on the types in
question please contact your nearest Infineon Technologies Office.
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and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
CoolSET™-F2
ICE2A380P2
Off-Line SMPS Current Mode Controller
with integrated 800V CoolMOS™
Product Highlights
•
•
•
•
•
Best in class in TO220 packages
Increased creepage distance for TO220
Isolated drain for TO220 packages
Lowest standby power dissipation
Enhanced protection functions with
Auto Restart Mode
P-TO220-6-47
P-TO220-6-47
Features
Description
•
•
•
•
•
•
The second generation CoolSET™-F2 provides several
special enhancements to satisfy the needs for low power
standby and protection features. In standby mode
frequency reduction is used to lower the power
consumption and support a stable output voltage in this
mode. The frequency reduction is limited to 21.5 kHz to
avoid audible noise. In case of failure modes like open loop,
overvoltage or overload due to short circuit the device
switches in Auto Restart Mode which is controlled by the
internal protection unit. By means of the internal precise
peak current limitation, the dimension of the transformer
and the secondary diode can be sized lower which leads to
more cost effective for the overall system.
800V avalanche rugged CoolMOS™
Only few external components required
Input Vcc Undervoltage Lockout
100kHz switching frequency
Max duty cycle 72%
Low Power Standby Mode to meet
European Commission Requirements
Thermal Shut Down with Auto Restart
Overload and Open Loop Protection
Overvoltage Protection during Auto Restart
Adjustable Peak Current Limitation via
external resistor
Overall tolerance of Current Limiting < ±5%
Internal Leading Edge Blanking
User defined Soft Start Soft Switching for low EMI
•
•
•
•
•
•
•
Typical Application
+
RStart-up
85 ... 270 VAC
Converter
DC Output
Snubber
-
CVCC
VCC
Drain
Feedback
Low Power
StandBy
SoftS
Power
Management
Soft-Start Control
CSoft Start
CoolMOS™
PWM Controller
Current Mode
Isense
Precise Low Tolerance
Peak Current Limitation
RSense
FB
Protection Unit
GND
PWM-Controller
CoolSET™-F2
Feedback
Type
Ordering Code
ICE2A380P2
Package
VDS
FOSC
RDSon1) 230VAC ±15%2)
P-TO-220-6-47
800V
100kHz
2.1Ω
128W
1)
typ @ T=25°C
2)
Maximum practical continuous power in an open frame design at Ta=75°C, Tj=125°C and RthCA=2.7K/W
Version 0.0
3
85-265 VAC2)
62W
23 Sep 2004
CoolSET™-F2
ICE2A380P2
Table of Contents
Page
1
1.1
1.2
Pin Configuration and Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Pin Configuration with P-TO220-6-47 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Pin Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
2
Representative Blockdiagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
3
3.1
3.2
3.2.1
3.2.2
3.3
3.4
3.4.1
3.4.2
3.5
3.5.1
3.5.2
3.6
3.7
3.8
3.8.1
3.8.2
3.8.3
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Improved Current Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
PWM-OP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
PWM-Comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
Soft-Start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Oscillator and Frequency Reduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Frequency Reduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Current Limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Leading Edge Blanking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Propagation Delay Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
PWM-Latch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Protection Unit (Auto Restart Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Overload / Open Loop with Normal Load . . . . . . . . . . . . . . . . . . . . . . . .12
Overvoltage due to Open Loop with No Load . . . . . . . . . . . . . . . . . . . . .13
Thermal Shut Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
4
4.1
4.2
4.3
4.3.1
4.3.2
4.3.3
4.3.4
4.3.5
4.3.6
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
Supply Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
Internal Voltage Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
Control Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
Protection Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
Current Limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
CoolMOS™ Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
5
Typical Performance Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .18
6
Outline Dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
Version 0.0
4
23 Sep 2004
CoolSET™-F2
ICE2A380P2
Pin Configuration and Functionality
1
Pin Configuration and Functionality
1.1
Pin Configuration with P-TO220-6-47
Pin
Symbol
Function
1
Drain
800V1) CoolMOS™ Drain
3
Isense
Controller Current Sense Input,
CoolMOS™ Source Output
4
GND
Controller Ground
5
VCC
Controller Supply Voltage
6
SoftS
Soft-Start
7
FB
Feedback
1)
1.2
Pin Functionality
SoftS (Soft Start & Auto Restart Control)
This pin combines the function of Soft Start in case of
Start Up and Auto Restart Mode and the controlling of
the Auto Restart Mode in case of an error detection.
FB (Feedback)
The information about the regulation is provided by the
FB Pin to the internal Protection Unit and to the internal
PWM-Comparator to control the duty cycle.
Isense (Current Sense)
The Current Sense pin senses the voltage developed
on the series resistor inserted in the source of the
integrated CoolMOS™. When Isense reaches the
internal threshold of the Current Limit Comparator, the
Driver output is disabled. By this means the Over
Current Detection is realized.
Furthermore the current information is provided for the
PWM-Comparator to realize the Current Mode.
at Tj = 25°C
Package P-TO220-6-47
Drain (Drain of integrated CoolMOS™)
Pin Drain is the connection to the Drain of the internal
CoolMOSTM.
VCC (Power supply)
This pin is the positive supply of the IC. The operating
range is between 8.5V and 21V.
To provide overvoltage protection the driver gets
disabled when the voltage becomes higher than 16.5V
during Start Up Phase.
1
2
3
4
5
6
7
Figure 1
FB
SoftS
VCC
GND
Isense
Drain
GND (Ground)
This pin is the ground of the primary side of the SMPS.
Pin Configuration P-TO220-6-47 ( top
view)
Version 0.0
5
23 Sep 2004
Figure 2
Version 0.0
FB
CSoft-Start
T1
6
Thermal
Shutdown
C3
C4
C2
C1
GND
Protection Unit
Tj >140°C
4.8V
5.3V
4.0V
CoolSET™-F2
RFB
6.5V
5.6V
RSoft-Start
6.5V
16.5V
VCC
RStart-up
G2
G1
8.5V
fnorm
fstandby
R Q
S Q
fosc
UFB
Error-Latch
Spike
Blanking
5 s
Power-Up
Reset
Power-Down
Reset
13.5V
x3.65
C5
PWM
Comparator
Soft-Start
Comparator
6.5V
5.3V
4.8V
4.0V
fstandby
fnorm
Improved Current Mode
PWM OP
0.8V
0.3V
Soft Start
Voltage
Reference
Internal
Bias
Power Management
Undervoltage
Lockout
Standby Unit
G3
CVCC
CLine
G4
21.5kHz
100kHz
Current Limiting
R
S
Vcsth
Q
Q
PWM-Latch
Propagation-Delay
Compensation
Current-Limit
Comparator
fstandbyfnorm
Clock
Duty Cycle
max
Oscillator
Duty Cycle
Max
0.72
Leading Edge
Blanking
220ns
Gate
Driver
D1
10k
CoolMOS™
Drain
Snubber
Optocoupler
Isense
RSense
2
SoftS
85 ... 270 VAC
+
Converter
DC Output
VOUT
-
CoolSET™-F2
ICE2A380P2
Representative Blockdiagram
Representative Blockdiagram
Representative Blockdiagram
23 Sep 2004
CoolSET™-F2
ICE2A380P2
Functional Description
3
Functional Description
at pin SoftS. Thus it is ensured that at every switch-on
the voltage ramp at pin SoftS starts at zero.
3.1
Power Management
3.2
Improved Current Mode
Soft-Start Comparator
Main Line (100V-380V)
RStart-Up
Primary Winding
PWM-Latch
FB
CVCC
R
Q
Driver
VCC
PWM Comparator
Power Management
Undervoltage
S
Lockout
0.8V
Bias
13.5V
8.5V
PWM OP
6.5V
Power-Down
Reset
5.3V
Voltage
x3.65
4.8V
Reference
4.0V
Power-Up
R
Q
Figure 4
PWM-Latch
SoftS
RSoft-Start
S
Figure 3
T1
Error-Latch
Error-Detection
Amplified Current Signal
FB
Power Management
The Undervoltage Lockout monitors the external
supply voltage VVCC. In case the IC is inactive the
current consumption is max. 55µA. When the SMPS is
plugged to the main line the current through RStart-up
charges the external Capacitor CVCC. When VVCC
exceeds the on-threshold VCCon=13.5V the internal bias
circuit and the voltage reference are switched on. After
that the internal bandgap generates a reference
voltage VREF=6.5V to supply the internal circuits. To
avoid uncontrolled ringing at switch-on a hysteresis is
implemented which means that switch-off is only after
active mode when Vcc falls below 8.5V.
In case of switch-on a Power Up Reset is done by
resetting the internal error-latch in the protection unit.
When VVCC falls below the off-threshold VCCoff=8.5V the
internal reference is switched off and the Power Down
reset let T1 discharging the soft-start capacitor CSoft-Start
Version 0.0
Current Mode
Current Mode means that the duty cycle is controlled
by the slope of the primary current. This is done by
comparison the FB signal with the amplified current
sense signal.
Q
Soft-Start Comparator
CSoft-Start
Isense
Improved
Current Mode
Reset
6.5V
Q
Internal
0.8V
Driver
t
T on
t
Figure 5
Pulse Width Modulation
In case the amplified current sense signal exceeds the
FB signal the on-time Ton of the driver is finished by
resetting the PWM-Latch (see Figure 5).
7
23 Sep 2004
CoolSET™-F2
ICE2A380P2
Functional Description
The primary current is sensed by the external series
resistor RSense inserted in the source of the integrated
CoolMOS™. By means of Current Mode regulation, the
secondary output voltage is insensitive on line
variations. Line variation changes the current
waveform slope which controls the duty cycle.The
external RSense allows an individual adjustment of the
maximum source current of the integrated CoolMOS™.
VOSC
max.
Duty Cycle
Soft-Start Comparator
Voltage Ramp
t
PWM Comparator
FB
0.8V
FB
0.3V
PWM-Latch
Oscillator
0.3V
Gate Driver
C5
Gate Driver
VOSC
10kΩ
0.8V
R1
T2
C1
t
20pF
x3.65
V1
t
PWM OP
Voltage Ramp
Figure 7
Figure 6
Light Load Conditions
Improved Current Mode
3.2.1
To improve the Current Mode during light load
conditions the amplified current ramp of the PWM-OP
is superimposed on a voltage ramp, which is built by
the switch T2, the voltage source V1 and the 1st order
low pass filter composed of R1 and C1(see Figure 6,
Figure 7). Every time the oscillator shuts down for max.
duty cycle limitation the switch T2 is closed by VOSC.
When the oscillator triggers the Gate Driver T2 is
opened so that the voltage ramp can start.
In case of light load the amplified current ramp is too
small to ensure a stable regulation. In that case the
Voltage Ramp is a well defined signal for the
comparison with the FB-signal. The duty cycle is then
controlled by the slope of the Voltage Ramp.
By means of the Comparator C5, the Gate Driver is
switched-off until the voltage ramp exceeds 0.3V. It
allows the duty cycle to be reduced continuously till 0%
by decreasing VFB below that threshold.
Version 0.0
PWM-OP
The input of the PWM-OP is applied over the internal
leading edge blanking to the external sense resistor
RSense connected to pin Isense. RSense converts the
source current into a sense voltage. The sense voltage
is amplified with a gain of 3.65 by PWM OP. The output
of the PWM-OP is connected to the voltage source V1.
The voltage ramp with the superimposed amplified
current signal is fed into the positive inputs of the PWMComparator, C5 and the Soft-Start-Comparator.
3.2.2
PWM-Comparator
The PWM-Comparator compares the sensed current
signal of the integrated CoolMOSTM with the feedback
signal VFB (see Figure 8). VFB is created by an external
optocoupler or external transistor in combination with
the internal pull-up resistor RFB and provides the load
information of the feedback circuitry. When the
amplified current signal of the integrated CoolMOS™
exceeds the signal VFB the PWM-Comparator switches
off the Gate Driver.
8
23 Sep 2004
CoolSET™-F2
ICE2A380P2
Functional Description
pull-up resistor RSoft-Start. The Soft-Start-Comparator
compares the voltage at pin SoftS at the negative input
with the ramp signal of the PWM-OP at the positive
input. When Soft-Start voltage VSoftS is less than
Feedback voltage VFB the Soft-Start-Comparator limits
the pulse width by resetting the PWM-Latch (see
Figure 9). In addition to Start-Up, Soft-Start is also
activated at each restart attempt during Auto Restart.
By means of the above mentioned CSoft-Start the SoftStart can be defined by the user. The Soft-Start is
finished when VSoftS exceeds 5.3V. At that time the
Protection Unit is activated by Comparator C4 and
senses the FB by Comparator C3 wether the voltage is
below 4.8V which means that the voltage on the
secondary side of the SMPS is settled. The internal
Zener Diode at SoftS has a clamp voltage of 5.6V to
prevent the internal circuit from saturation (see Figure
10).
6.5V
Soft-Start Comparator
RFB
FB
PWM-Latch
PWM Comparator
0.8V
Optocoupler
PWM OP
Isense
x3.65
6.5V
5.6V
Improved
Current Mode
Figure 8
3.3
RSoft-Start
Error-Latch
SoftS
6.5V
5.3V
PWM Controlling
Soft-Start
4.8V
RFB
FB
VSoftS
C4
G2
C3
Clock
R
Q
S
Q
R
Q
Gate
Driver
S
Q
PWM-Latch
5.6V
5.3V
Figure 10
Gate Driver
Activation of Protection Unit
The Start-Up time TStart-Up within the converter output
voltage VOUT is settled must be shorter than the SoftStart Phase TSoft-Start (see Figure 11).
TSoft-Start
T Soft – Start
CSoft – Start = -----------------------------------R Soft – Start × 1.69
t
By means of Soft-Start there is an effective
minimization of current and voltage stresses on the
integrated CoolMOS™, the clamp circuit and the output
overshoot and prevents saturation of the transformer
during Start-Up.
t
Figure 9
Power-Up Reset
Soft-Start Phase
The Soft-Start is realized by the internal pull-up resistor
RSoft-Start and the external Capacitor CSoft-Start (see
Figure 2). The Soft-Start voltage VSoftS is generated by
charging the external capacitor CSoft-Start by the internal
Version 0.0
9
23 Sep 2004
CoolSET™-F2
ICE2A380P2
Functional Description
kHz
VSoftS
100
fOSC
5.3V
TSoft-Start
VFB
65
21.5
t
1.0
4.8V
1.1
fnorm
100kHz
fstandby
21.5kHz
Figure 12
VOUT
3.5
t
TStart-Up
t
Start Up Phase
3.4
Oscillator and Frequency
Reduction
3.4.1
Oscillator
1.4
1.5
1.6
1.7
1.8
1.9
2.0
V
VFB
Frequency Dependence
Current Limiting
3.5.1
The oscillator generates a frequency fswitch = 100kHz. A
resistor, a capacitor and a current source and current
sink which determine the frequency are integrated. The
charging and discharging current of the implemented
oscillator capacitor are internally trimmed, in order to
achieve a very accurate switching frequency. The ratio
of controlled charge to discharge current is adjusted to
reach a max. duty cycle limitation of Dmax=0.72.
3.4.2
1.3
There is a cycle by cycle current limiting realized by the
Current-Limit Comparator to provide an overcurrent
detection. The source current of the integrated
CoolMOSTM is sensed via an external sense resistor
RSense. By means of RSense the source current is
transformed to a sense voltage VSense. When the
voltage VSense exceeds the internal threshold voltage
Vcsth the Current-Limit-Comparator immediately turns
off the gate drive. To prevent the Current Limiting from
distortions caused by leading edge spikes a Leading
Edge Blanking is integrated at the Current Sense.
Furthermore a Propagation Delay Compensation is
added to support the immediate shut down of the
CoolMOS™ in case of overcurrent.
VOUT
Figure 11
1.2
Leading Edge Blanking
VSense
Vcsth
tLEB = 220ns
Frequency Reduction
The frequency of the oscillator is depending on the
voltage at pin FB. The dependence is shown in Figure
12. This feature allows a power supply to operate at
lower frequency at light loads thus lowering the
switching losses while maintaining good cross
regulation performance and low output ripple. In case
of low power the power consumption of the whole
SMPS can now be reduced very effective. The minimal
reachable frequency is limited to 21.5 kHz to avoid
audible noise in any case.
Version 0.0
t
Figure 13
Leading Edge Blanking
Each time when CoolMOS™ is switched on a leading
spike is generated due to the primary-side
capacitances and secondary-side rectifier reverse
recovery time. To avoid a premature termination of the
switching pulse this spike is blanked out with a time
constant of tLEB = 220ns. During that time the output of
10
23 Sep 2004
CoolSET™-F2
ICE2A380P2
Functional Description
the Current-Limit Comparator cannot switch off the
gate drive.
3.5.2
The propagation delay compensation is done by
means of a dynamic threshold voltage Vcsth (see Figure
15). In case of a steeper slope the switch off of the
driver is earlier to compensate the delay.
E.g. Ipeak = 0.5A with RSense = 2. Without propagation
delay compensation the current sense threshold is set
to a static voltage level Vcsth=1V. A current ramp of
dI/dt = 0.4A/µs, that means dVSense/dt = 0.8V/µs, and a
propagation delay time of i.e. tPropagation Delay =180ns
leads then to a Ipeak overshoot of 12%. By means of
propagation delay compensation the overshoot is only
about 2% (see Figure 16).
Propagation Delay Compensation
In case of overcurrent detection by ILimit the shut down
of CoolMOS™ is delayed due to the propagation delay
of the circuit. This delay causes an overshoot of the
peak current Ipeak which depends on the ratio of dI/dt of
the peak current (see Figure 14).
.
Signal1
ISense
IOvershoot2
Ipeak2
Ipeak1
ILimit
Signal2
tPropagation Delay
without compensation
with compensation
V
1.3
1.25
1.2
IOvershoot1
VSense
1.15
1.1
1.05
1
0.95
t
Figure 14
0.9
Current Limiting
0
Figure 16
3.6
0.6
0.8
1
1.2
1.4
1.6
1.8
2
V/us
Overcurrent Shutdown
PWM-Latch
The oscillator clock output applies a set pulse to the
PWM-Latch when initiating CoolMOS™ conduction.
After setting the PWM-Latch can be reset by the PWMOP, the Soft-Start-Comparator, the Current-LimitComparator, Comparator C3 or the Error-Latch of the
Protection Unit. In case of resetting the driver is shut
down immediately.
dIpeak
dV Sense
0 ≤ R Sense× ----------- ≤ --------------dt
dt
max. Duty Cycle
3.7
off time
Propagation Delay
Vcsth
t
Signal1
Signal2
Dynamic Voltage Threshold Vcsth
Version 0.0
Driver
The driver-stage drives the gate of the CoolMOS™ and
is optimized to minimize EMI and to provide high circuit
efficiency. This is done by reducing the switch on slope
when reaching the CoolMOS™ threshold. This is
achieved by a slope control of the rising edge at the
driver’s output (see Figure 17) to the CoolMOS™ gate.
Thus the leading switch on spike is minimized. When
CoolMOS™ is switched off, the falling shape of the
driver is slowed down when reaching 2V to prevent an
overshoot below ground. Furthermore the driver circuit
is designed to eliminate cross conduction of the output
stage. At voltages below the undervoltage lockout
threshold VVCCoff the gate drive is active low.
t
VSense
Figure 15
0.4
dVSense
dt
The overshoot of Signal2 is bigger than of Signal1 due
to the steeper rising waveform.
A propagation delay compensation is integrated to
bound the overshoot dependent on dI/dt of the rising
primary current. That means the propagation delay
time between exceeding the current sense threshold
Vcsth and the switch off of CoolMOS™ is compensated
over temperature within a range of at least.
VOSC
0.2
11
23 Sep 2004
CoolSET™-F2
ICE2A380P2
Functional Description
VGate
Overload / Open Loop with Normal Load
ca. t = 130ns
5µs Blanking
FB
4.8V
Failure
Detection
5V
t
Figure 17
3.8
5.3V
Soft-Start Phase
Internal Gate Rising Slope
Protection Unit (Auto Restart Mode)
An overload, open loop and overvoltage detection is
integrated within the Protection Unit. These three
failure modes are latched by an Error-Latch. Additional
thermal shutdown is latched by the Error-Latch. In case
of those failure modes the Error-Latch is set after a
blanking time of 5µs and the CoolMOS™ is shut down.
That blanking prevents the Error-Latch from distortions
caused by spikes during operation mode.
3.8.1
t
SoftS
t
TBurst1
Driver
TRestart
t
Overload / Open Loop with Normal
Load
VCC
13.5V
Figure 18 shows the Auto Restart Mode in case of
overload or open loop with normal load. The detection
of open loop or overload is provided by the Comparator
C3, C4 and the AND-gate G2 (see Figure 19). The
detection is activated by C4 when the voltage at pin
SoftS exceeds 5.3V. Till this time the IC operates in the
Soft-Start Phase. After this phase the comparator C3
can set the Error-Latch in case of open loop or overload
which leads the feedback voltage VFB to exceed the
threshold of 4.8V. After latching VCC decreases till
8.5V and inactivates the IC. At this time the external
Soft-Start capacitor is discharged by the internal
transistor T1 due to Power Down Reset. When the IC
is inactive VVCC increases till VCCon = 13.5V by charging
the Capacitor CVCC by means of the Start-Up Resistor
RStart-Up. Then the Error-Latch is reset by Power Up
Reset and the external Soft-Start capacitor CSoft-Start is
charged by the internal pull-up resistor RSoft-Start. During
the Soft-Start Phase which ends when the voltage at
pin SoftS exceeds 5.3V the detection of overload and
open loop by C3 and G2 is inactive. In this way the Start
Up Phase is not detected as an overload.
8.5V
t
Figure 18
Auto Restart Mode
6.5V
Power Up Reset
SoftS
RSoft-Start
CSoft-Start
5.3V
C4
T1
4.8V
Error-Latch
G2
C3
FB
RFB
6.5V
Figure 19
Version 0.0
12
FB-Detection
23 Sep 2004
CoolSET™-F2
ICE2A380P2
Functional Description
normal operation mode is prevented from overvoltage
detection due to varying of VCC concerning the
regulation of the converter output. When the voltage
VSoftS is above 4.0V the overvoltage detection by C1 is
deactivated.
But the Soft-Start Phase must be finished within the
Start Up Phase to force the voltage at pin FB below the
failure detection threshold of 4.8V.
3.8.2
Overvoltage due to Open Loop with
No Load
VCC
Open loop & no load condition
FB
6.5V
5µs Blanking
16.5V
4.8V
4.0V
SoftS
t
Soft-Start Phase
C2
CSoft-Start
T1
5.3V
4.0V
Error Latch
G1
RSoft-Start
Failure
Detection
SoftS
C1
Power Up Reset
Overvoltage
Detection Phase
Figure 21
t
TBurst2
Driver
3.8.3
TRestart
Overvoltage Detection
Thermal Shut Down
Thermal Shut Down is latched by the Error-Latch when
junction temperature Tj of the pwm controller is
exceeding an internal threshold of 140°C. In that case
the IC switches in Auto Restart Mode.
Overvoltage Detection
VCC
16.5V
13.5V
t
8.5V
t
Figure 20
Auto Restart Mode
Figure 20 shows the Auto Restart Mode for open loop
and no load condition. In case of this failure mode the
converter output voltage increases and also VCC. An
additional protection by the comparators C1, C2 and
the AND-gate G1 is implemented to consider this
failure mode (see Figure 21).The overvoltage detection
is provided by Comparator C1 only in the first time
during the Soft-Start Phase till the Soft-Start voltage
exceeds the threshold of the Comparator C2 at 4.0V
and the voltage at pin FB is above 4.8V. When VCC
exceeds 16.5V during the overvoltage detection phase
C1 can set the Error-Latch and the Burst Phase during
Auto Restart Mode is finished earlier. In that case
TBurst2 is shorter than TSoft-Start. By means of C2 the
Version 0.0
Note:
13
All the values which are mentioned in the
functional description are typical. Please refer
to Electrical Characteristics for min/max limit
values.
23 Sep 2004
CoolSET™-F2
ICE2A380P2
Electrical Characteristics
4
Electrical Characteristics
4.1
Absolute Maximum Ratings
Note:
Absolute maximum ratings are defined as ratings, which when being exceeded may lead to destruction
of the integrated circuit. For the same reason make sure, that any capacitor that will be connected to pin 6
(VCC) is discharged before assembling the application circuit.
Parameter
Symbol
Limit Values
Unit
Remarks
Tj = 25°C
min.
max.
VDS
-
800
V
EAR
Avalanche energy,
repetitive tAR limited by max. Tj=150°C1)
-
0.05
mJ
Avalanche current,
repetitive tAR limited by max. Tj=150°C
IAR
-
3
A
VCC Supply Voltage
VCC
-0.3
22
V
FB Voltage
VFB
-0.3
6.5
V
SoftS Voltage
VSoftS
-0.3
6.5
V
ISense
ISense
-0.3
3
V
Junction Temperature
Tj
-40
150
°C
Storage Temperature
TS
-50
150
°C
Thermal Resistance
Junction-Ambient
RthJA1
-
74
K/W
Junction-Case
RthJC
-
2.5
K/W
VESD
-
2
kV
Drain Source Voltage
2)
ESD Robustness
Controller & CoolMOS™
Free standing with no
heat-sink
Human Body Model
1)
Repetitive avalanche causes additional power losses that can be calculated as PAV=EAR* f
2)
Equivalent to discharging a 100pF capacitor through a 1.5 kΩ series resistor
Version 0.0
14
23 Sep 2004
CoolSET™-F2
ICE2A380P2
Electrical Characteristics
4.2
Note:
Operating Range
Within the operating range the IC operates as described in the functional description.
Parameter
Symbol
Limit Values
min.
max.
Unit
VCC Supply Voltage
VCC
VCCoff
21
V
Junction Temperature of
Controller
TJCon
-25
130
°C
Junction Temperature of
CoolMOS™
TJCoolMOS
-25
150
°C
4.3
Note:
4.3.1
Remarks
Limited due to thermal shut down
of controller
Characteristics
The electrical characteristics involve the spread of values given within the specified supply voltage and
junction temperature range TJ from – 25 °C to 125 °C.Typical values represent the median values, which
are related to 25°C. If not otherwise stated, a supply voltage of VCC = 15 V is assumed.
Supply Section
Parameter
Symbol
Limit Values
min.
typ.
max.
Unit
Test Condition
Start Up Current
IVCC1
-
27
55
µA
VCC=VCCon -0.1V
Supply Current with Inactive
Gate
IVCC2
-
5.0
6.6
mA
VSoftS = 0
IFB = 0
Supply Current with Active Gate IVCC3
-
8.5
9.8
mA
VSoftS = 5V
IFB = 0
VCC Turn-On Threshold
VCC Turn-Off Threshold
VCC Turn-On/Off Hysteresis
13
4.5
13.5
8.5
5
14
5.5
V
V
V
Version 0.0
VCCon
VCCoff
VCCHY
15
23 Sep 2004
CoolSET™-F2
ICE2A380P2
Electrical Characteristics
4.3.2
Internal Voltage Reference
Parameter
Trimmed Reference Voltage
4.3.3
Symbol
Limit Values
VREF
min.
typ.
max.
6.37
6.50
6.63
Unit
Test Condition
V
measured at pin FB
Control Section
Parameter
Symbol
Limit Values
min.
typ.
max.
Unit
Test Condition
Oscillator Frequency
fOSC1
93
100
107
kHz
VFB = 4V
Reduced Osc. Frequency
fOSC2
-
21.5
-
kHz
VFB = 1V
4.5
4.65
4.9
Frequency Ratio fosc1/fosc2
Max Duty Cycle
Dmax
0.67
0.72
0.77
Min Duty Cycle
Dmin
0
-
-
PWM-OP Gain
AV
3.45
3.65
3.85
VFB Operating Range Min Level
VFBmin
0.3
-
-
V
VFB Operating Range Max level
VFBmax
-
-
4.6
V
Feedback Resistance
RFB
3.0
3.7
4.9
kΩ
Soft-Start Resistance
RSoft-Start
42
50
62
kΩ
4.3.4
VFB < 0.3V
Protection Unit
Parameter
Symbol
Limit Values
min.
typ.
max.
Unit
Test Condition
Over Load & Open Loop
Detection Limit
VFB2
4.65
4.8
4.95
V
VSoftS > 5.5V
Activation Limit of Overload &
Open Loop Detection
VSoftS1
5.15
5.3
5.46
V
VFB > 5V
Deactivation Limit of
Overvoltage Detection
VSoftS2
3.88
4.0
4.12
V
VFB > 5V
VCC > 17.5V
Overvoltage Detection Limit
VVCC1
16
16.5
17.2
V
VSoftS < 3.8V
VFB > 5V
Latched Thermal Shutdown
TjSD
130
140
150
°C
1)
Spike Blanking
tSpike
-
5
-
µs
1)
The parameter is not subject to production test - verified by design/characterization
Version 0.0
16
23 Sep 2004
CoolSET™-F2
ICE2A380P2
Electrical Characteristics
4.3.5
Current Limiting
Parameter
Symbol
Limit Values
min.
typ.
max.
Unit
Test Condition
dVsense / dt = 0.6V/µs
Peak Current Limitation
(incl. Propagation Delay Time)
Vcsth
0.95
1.0
1.05
V
Leading Edge Blanking
tLEB
-
220
-
ns
4.3.6
CoolMOS™ Section
Parameter
Symbol
Limit Values
min.
typ.
max.
Unit
Test Condition
Drain Source Breakdown Voltage
V(BR)DSS
800
870
-
-
V
V
Tj=25°C
Tj=110°C
Drain Source On-Resistance
RDSon
-
2.1
4.41
t.b.d
t.b.d
Ω
Ω
Tj=25°C
Tj=125°C
Effective output capacitance,
energy related
Co(er)
-
10
-
pF
VDS =0V to 480V
Zero Gate Voltage Drain Current
IDSS
-
0.5
-
µA
VVCC=0V
Rise Time
trise
-
301)
-
ns
-
1)
-
ns
Fall Time
1)
tfall
30
Measured in a Typical Flyback Converter Application
Version 0.0
17
23 Sep 2004
CoolSET™-F2
ICE2A380P2
Typical Performance Characteristics
5
Typical Performance Characteristics
Version 0.0
18
23 Sep 2004
CoolSET™-F2
ICE2A380P2
Outline Dimension
Outline Dimension
9.9 ±0.2
A
9.5 ±0.2
7.5
B
3.7 -0.15
13
0.05
1)
8.6 ±0.3
15.6 ±0.3
17.5 ±0.3
6.6
4.4
1.3 +0.1
-0.02
9.2 ±0.2
P-TO220-6-47
Isodrain Package
2.8 ±0.2
6
7.62
0...0.15
0.25
M
0.5 ±0.1
A B
2.4
6 x 0.6 ±0.1
4 x 1.27
5.3 ±0.3
8.4 ±0.3
1) Shear and punch direction no burrs this surface
Back side, heatsink contour
All metal surfaces tin plated, except area of cut.
Figure 22
P-TO220-6-47 (Isodrain Package)
Dimensions in mm
Version 0.0
19
23 Sep 2004
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