Datasheet, V2.0, 11 Jun 2004 CoolSET™-F2 ICE2A0565/165/265/365 ICE2B0565/165/265/365 ICE2A0565G ICE2A0565Z ICE2A180Z/280Z ICE2A765I/2B765I ICE2A765P2/2B765P2 Off-Line SMPS Current Mode Controller with integrated 650V/ 800V CoolMOS™ Power Management & Supply N e v e r s t o p t h i n k i n g . CoolSET™-F2 Revision History: 2004-06-11 Datasheet Previous Version: Page Subjects (major changes since last revision) For questions on technology, delivery and prices please contact the Infineon Technologies Offices in Germany or the Infineon Technologies Companies and Representatives worldwide: see our webpage at http:// www.infineon.com. CoolMOS™, CoolSET™ are trademarks of Infineon Technologies AG. Edition 2004-06-11 Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81541 München © Infineon Technologies AG 1999. All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as warranted characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologies is an approved CECC manufacturer. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. CoolSET™-F2 Off-Line SMPS Current Mode Controller with integrated 650V/800V CoolMOS™ Product Highlights P-DIP-7-1 P-DIP-7-1 • Best in class in DIP8, DIP7, TO220 and DSO16/12 packages • No heat-sink required for DIP8, DIP7 and DSO16/12 • Increased creepage distance for TO220, DIP7 and DSO16/12 • Isolated drain for TO220 packages • Lowest standby power dissipation • Enhanced protection functions with Auto Restart Mode P-DIP-8-6 P-DIP-8-4, -6 P-TO220-6-46 P-TO220-6-46 P-TO220-6-47 P-TO220-6-47 P-DSO-16/12 Features Description • • • • • • The second generation CoolSET™-F2 provides several special enhancements to satisfy the needs for low power standby and protection features. In standby mode frequency reduction is used to lower the power consumption and support a stable output voltage in this mode. The frequency reduction is limited to 20kHz/21.5 kHz to avoid audible noise. In case of failure modes like open loop, overvoltage or overload due to short circuit the device switches in Auto Restart Mode which is controlled by the internal protection unit. By means of the internal precise peak current limitation, the dimension of the transformer and the secondary diode can be sized lower which leads to more cost effective for the overall system. • • • • • • • 650V/800V avalanche rugged CoolMOS™ Only few external components required Input Vcc Undervoltage Lockout 67kHz/100kHz switching frequency Max duty cycle 72% Low Power Standby Mode to meet European Commission Requirements Thermal Shut Down with Auto Restart Overload and Open Loop Protection Overvoltage Protection during Auto Restart Adjustable Peak Current Limitation via external resistor Overall tolerance of Current Limiting < ±5% Internal Leading Edge Blanking User defined Soft Start Soft Switching for low EMI Typical Application + Snubber RStart-up 85 ... 270 VAC Converter DC Output - CVCC VCC Drain Feedback Low Power StandBy Power Management SoftS Soft-Start Control CSoft Start CoolMOS™ PWM Controller Current Mode Isense Precise Low Tolerance Peak Current Limitation RSense FB Protection Unit GND PWM-Controller Feedback Version 2.0 CoolSET™-F2 3 11 Jun 2004 CoolSET™-F2 Ordering Codes Ordering Code Package VDS FOSC RDSon1) 230VAC ±15%2) ICE2A0565 Q67040-S4542 P-DIP-8-6 650V 100kHz 4.7Ω 23W 13W ICE2A165 Q67040-S4426 P-DIP-8-6 650V 100kHz 3.0Ω 31W 18W ICE2A265 Q67040-S4414 P-DIP-8-6 650V 100kHz 0.9Ω 52W 32W ICE2A365 Q67040-S4415 P-DIP-8-6 650V 100kHz 0.45Ω 67W 45W ICE2B0565 Q67040-S4540 P-DIP-8-6 650V 67kHz 4.7Ω 23W 13W ICE2B165 Q67040-S4489 P-DIP-8-6 650V 67kHz 3.0Ω 31W 18W ICE2B265 Q67040-S4478 P-DIP-8-6 650V 67kHz 0.9Ω 52W 32W ICE2B365 Q67040-S4490 P-DIP-8-6 650V 67kHz 0.45Ω 67W 45W ICE2A0565Z Q67040-S4541 P-DIP-7-1 650V 100kHz 4.7Ω 23W 13W ICE2A180Z Q67040-S4546 P-DIP-7-1 800V 100kHz 3.0Ω 29W 17W ICE2A280Z Q67040-S4547 P-DIP-7-1 800V 100KHz 0.8Ω 50W 31W Type 1) typ @ T=25°C 2) Maximum power rating at Ta=75°C, Tj=125°C and with copper area on PCB = 6cm² Type ICE2A0565G Ordering Code Package VDS FOSC RDSon1) 230VAC ±15%2) Q67040-S4656 P-DSO-16/12 650V 100kHz 4.7Ω 1) typ @ T=25°C 2) Maximum power rating at Ta=75°C, Tj=125°C and with copper area on PCB = 6cm² 23W 85-265 VAC2) 85-265 VAC2) 13W Ordering Code Package VDS FOSC RDSon1) 230VAC ±15%2) ICE2A765I Q67040-S4609 P-TO-220-6-46 650V 100kHz 0.45Ω 240W 130W ICE2B765I Q67040-S4607 P-TO-220-6-46 650V 67kHz 0.45Ω 240W 130W ICE2A765P2 Q67040-S4610 P-TO-220-6-47 650V 100kHz 0.45Ω 240W 130W ICE2B765P2 Q67040-S4608 P-TO-220-6-47 650V 67kHz 0.45Ω 240W 130W Type 1) typ @ T=25°C 2) Maximum practical continuous power in an open frame design at Ta=75°C, Tj=125°C and RthCA=2.7K/W Version 2.0 4 85-265 VAC2) 11 Jun 2004 CoolSET™-F2 Table of Contents Page 1 1.1 1.2 1.3 1.4 1.5 Pin Configuration and Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 Pin Configuration with P-DIP-8-6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 Pin Configuration with P-DIP-7-1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 Pin Configuration with P-TO220-6-46/47 . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 Pin Configuration with P-DSO-16/12 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 Pin Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 2 Representative Blockdiagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 3 3.1 3.2 3.2.1 3.2.2 3.3 3.4 3.4.1 3.4.2 3.5 3.5.1 3.5.2 3.6 3.7 3.8 3.8.1 3.8.2 3.8.3 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Improved Current Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 PWM-OP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 PWM-Comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 Soft-Start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Oscillator and Frequency Reduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Frequency Reduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Current Limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Leading Edge Blanking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Propagation Delay Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 PWM-Latch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 Protection Unit (Auto Restart Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 Overload / Open Loop with Normal Load . . . . . . . . . . . . . . . . . . . . . . . .15 Overvoltage due to Open Loop with No Load . . . . . . . . . . . . . . . . . . . . .16 Thermal Shut Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 4 4.1 4.2 4.3 4.4 4.4.1 4.4.2 4.4.3 4.4.4 4.4.5 4.4.6 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 Thermal Impedance (ICE2X765I and ICE2X765P2) . . . . . . . . . . . . . . . . . .19 Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 Supply Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 Internal Voltage Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21 Control Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21 Protection Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 Current Limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 CoolMOS™ Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 5 Typical Performance Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .25 6 Layout Recommendation for C18 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31 7 Outline Dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32 Version 2.0 5 11 Jun 2004 CoolSET™-F2 Pin Configuration and Functionality 1 Pin Configuration and Functionality 1.1 Pin Configuration with P-DIP-8-6 1.2 Pin Configuration with P-DIP-7-1 Pin Symbol Function Pin Symbol Function 1 SoftS Soft-Start 1 SoftS Soft-Start 2 FB Feedback 2 FB Feedback 3 Isense Controller Current Sense Input, CoolMOS™ Source Output 3 Isense Controller Current Sense Input, CoolMOS™ Source Output 4 Drain 650V1)/800V2) CoolMOS™ Drain 4 N.C. Not connected 5 Drain 650V1)/800V2) CoolMOS™ Drain 5 Drain 650V1)/800V2) CoolMOS™ Drain 6 N.C Not connected 7 VCC Controller Supply Voltage 7 VCC Controller Supply Voltage 8 GND Controller Ground 8 GND Controller Ground 1) at Tj = 110°C 2) at Tj = 25°C 1) at Tj = 110°C 2) at Tj = 25°C Package P-DIP-8-6 Package P-DIP-7-1 SoftS 1 8 GND SoftS 1 8 GND FB 2 7 VCC FB 2 7 VCC Isense 3 6 N.C Isense 3 4 5 Drain Figure 1 Drain n.c. Pin Configuration P-DIP-8-6 (top view) Version 2.0 Figure 2 6 4 5 Drain Pin Configuration P-DIP-7-1 (top view) 11 Jun 2004 CoolSET™-F2 Pin Configuration and Functionality 1.3 Pin Configuration with P-TO220-6-46/47 1.4 Pin Configuration with P-DSO-16/12 Pin Symbol Function Pin Symbol Function 1 Drain 650V1) CoolMOS™ Drain 1 N.C. Not Connected 3 Isense Controller Current Sense Input, CoolMOS™ Source Output 2 SoftS Soft-Start 3 FB Feedback 4 GND Controller Ground 4 Isense 5 VCC Controller Supply Voltage Controller Current Sense Input, CoolMOS™ Source Output 6 SoftS Soft-Start 5 Drain 650V1) CoolMOS™ Drain 7 FB Feedback 6 Drain 650V1) CoolMOS™ Drain 7 Drain 650V1) CoolMOS™ Drain 8 Drain 650V1) CoolMOS™ Drain 9 N.C. Not Connected 10 N.C. Not Connected 11 VCC Controller Supply Voltage 12 GND Controller Ground 1) at Tj = 110°C Package P-TO220-6-46/47 1) at Tj = 110°C Package P-DSO-16/12 Figure 3 6 7 Pin Configuration P-TO220-6-46/47 (top view) Version 2.0 1 12 GND S oftS 2 11 VCC FB 3 10 N .C . Isense 4 9 N .C . D rain 5 8 D rain D rain 6 7 D rain FB 5 SoftS 4 VCC 3 GND 2 Isense Drain 1 N .C Figure 4 7 Pin Configuration P-DSO-16/12 (top view) 11 Jun 2004 CoolSET™-F2 Pin Configuration and Functionality 1.5 Pin Functionality SoftS (Soft Start & Auto Restart Control) This pin combines the function of Soft Start in case of Start Up and Auto Restart Mode and the controlling of the Auto Restart Mode in case of an error detection. FB (Feedback) The information about the regulation is provided by the FB Pin to the internal Protection Unit and to the internal PWM-Comparator to control the duty cycle. Isense (Current Sense) The Current Sense pin senses the voltage developed on the series resistor inserted in the source of the integrated CoolMOS™. When Isense reaches the internal threshold of the Current Limit Comparator, the Driver output is disabled. By this means the Over Current Detection is realized. Furthermore the current information is provided for the PWM-Comparator to realize the Current Mode. Drain (Drain of integrated CoolMOS™) Pin Drain is the connection to the Drain of the internal CoolMOSTM. VCC (Power supply) This pin is the positive supply of the IC. The operating range is between 8.5V and 21V. To provide overvoltage protection the driver gets disabled when the voltage becomes higher than 16.5V during Start Up Phase. GND (Ground) This pin is the ground of the primary side of the SMPS. Version 2.0 8 11 Jun 2004 Figure 5 Version 2.0 FB CSoft-Start T1 9 C3 C4 C2 C1 GND Standby Unit fosc R S Q Q UFB Error-Latch Spike Blanking 5 s Power-Up Reset Protection Unit G3 13.5V Power-Down Reset 8.5V x3.65 C5 PWM Comparator Soft-Start Comparator 6.5V 5.3V 4.8V 4.0V fstandby fnorm Improved Current Mode PWM OP 0.8V 0.3V Soft Start Voltage Reference Internal Bias Power Management Undervoltage Lockout Tj >140°C G2 G1 CVCC CLine fnorm fstandby Thermal Shutdown 4.8V 5.3V 4.0V CoolSET™-F2 RFB 6.5V 5.6V RSoft-Start 6.5V 16.5V VCC RStart-up G4 20kHz 67kHz 100kHz 21.5kHz ICE2Bxxxx Vcsth Q Q ICE2Axxxx Current Limiting R S PWM-Latch 0.72 Duty Cycle Max Propagation-Delay Compensation Current-Limit Comparator fstandby-fnorm Clock Duty Cycle max Oscillator Leading Edge Blanking 220ns Gate Driver D1 10k CoolMOS™ Drain Optocoupler Isense RSense + Converter DC Output VOUT - 2 SoftS 85 ... 270 VAC Snubber CoolSET™-F2 Representative Blockdiagram Representative Blockdiagram Representative Blockdiagram 11 Jun 2004 CoolSET™-F2 Functional Description 3 Functional Description 3.1 Power Management 3.2 Improved Current Mode S o ft-S ta rt C o m p a ra to r M ain Line (10 0V -3 80 V ) P W M -L a tch FB R S tart-U p R Q D rive r P rim ary W ind in g P W M C o m p a ra to r C VC C S Q VCC 0 .8 V Po w er M anagem ent U nd ervo ltag e Intern al L ock out PW M OP B ia s 1 3.5V 8 .5V x3 .6 5 6.5 V P o w er-D ow n R e set Im proved Current M ode 5.3 V V olta ge 4.8 V R e fe renc e 4.0 V P o w e r-U p R ese t Figure 7 R 6.5V S S o ftS Current Mode Current Mode means that the duty cycle is controlled by the slope of the primary current. This is done by comparison the FB signal with the amplified current sense signal. Q P W M -La tc h R S oft-S tart Ise n se Q E rro r-Latch S oft-S tart C o m pa ra tor Amplified Current Signal C S oft-Start T1 E rror-D e te ctio n FB Figure 6 Power Management The Undervoltage Lockout monitors the external supply voltage VVCC. In case the IC is inactive the current consumption is max. 55µA. When the SMPS is plugged to the main line the current through RStart-up charges the external Capacitor CVCC. When VVCC exceeds the on-threshold VCCon=13.5V the internal bias circuit and the voltage reference are switched on. After that the internal bandgap generates a reference voltage VREF=6.5V to supply the internal circuits. To avoid uncontrolled ringing at switch-on a hysteresis is implemented which means that switch-off is only after active mode when Vcc falls below 8.5V. In case of switch-on a Power Up Reset is done by resetting the internal error-latch in the protection unit. When VVCC falls below the off-threshold VCCoff=8.5V the internal reference is switched off and the Power Down reset let T1 discharging the soft-start capacitor CSoft-Start at pin SoftS. Thus it is ensured that at every switch-on the voltage ramp at pin SoftS starts at zero. Version 2.0 10 0.8V Driver t T on t Figure 8 Pulse Width Modulation In case the amplified current sense signal exceeds the FB signal the on-time Ton of the driver is finished by resetting the PWM-Latch (see Figure 8). The primary current is sensed by the external series resistor RSense inserted in the source of the integrated CoolMOS™. By means of Current Mode regulation, the 11 Jun 2004 CoolSET™-F2 Functional Description secondary output voltage is insensitive on line variations. Line variation changes the current waveform slope which controls the duty cycle. The external RSense allows an individual adjustment of the maximum source current of the integrated CoolMOS™. VOSC max. Duty Cycle S o ft-S ta rt C o m p a ra to r P W M C o m p a ra to r Voltage Ramp FB P W M -L a tch O scilla to r t 0.8V FB 0.3V 0 .3 V C5 G a te D rive r V OSC Gate Driver t 0.8V 1 0 kΩ x3 .6 5 R1 T2 C1 V1 20pF PW M OP t Figure 10 V oltage R am p Figure 9 3.2.1 Improved Current Mode To improve the Current Mode during light load conditions the amplified current ramp of the PWM-OP is superimposed on a voltage ramp, which is built by the switch T2, the voltage source V1 and the 1st order low pass filter composed of R1 and C1(see Figure 9, Figure 10). Every time the oscillator shuts down for max. duty cycle limitation the switch T2 is closed by VOSC. When the oscillator triggers the Gate Driver T2 is opened so that the voltage ramp can start. In case of light load the amplified current ramp is to small to ensure a stable regulation. In that case the Voltage Ramp is a well defined signal for the comparison with the FB-signal. The duty cycle is then controlled by the slope of the Voltage Ramp. By means of the Comparator C5, the Gate Driver is switched-off until the voltage ramp exceeds 0.3V. It allows the duty cycle to be reduced continuously till 0% by decreasing VFB below that threshold. Version 2.0 11 Light Load Conditions PWM-OP The input of the PWM-OP is applied over the internal leading edge blanking to the external sense resistor RSense connected to pin Isense. RSense converts the source current into a sense voltage. The sense voltage is amplified with a gain of 3.65 by PWM OP. The output of the PWM-OP is connected to the voltage source V1. The voltage ramp with the superimposed amplified current signal is fed into the positive inputs of the PWMComparator, C5 and the Soft-Start-Comparator. 3.2.2 PWM-Comparator The PWM-Comparator compares the sensed current signal of the integrated CoolMOSTM with the feedback signal VFB (see Figure 11). VFB is created by an external optocoupler or external transistor in combination with the internal pull-up resistor RFB and provides the load information of the feedback circuitry. When the amplified current signal of the integrated CoolMOS™ exceeds the signal VFB the PWMComparator switches off the Gate Driver. 11 Jun 2004 CoolSET™-F2 Functional Description pull-up resistor RSoft-Start. The Soft-Start-Comparator compares the voltage at pin SoftS at the negative input with the ramp signal of the PWM-OP at the positive input. When Soft-Start voltage VSoftS is less than Feedback voltage VFB the Soft-Start-Comparator limits the pulse width by resetting the PWM-Latch (see Figure 12). In addition to Start-Up, Soft-Start is also activated at each restart attempt during Auto Restart. By means of the above mentioned CSoft-Start the SoftStart can be defined by the user. The Soft-Start is finished when VSoftS exceeds 5.3V. At that time the Protection Unit is activated by Comparator C4 and senses the FB by Comparator C3 wether the voltage is below 4.8V which means that the voltage on the secondary side of the SMPS is settled. The internal Zener Diode at SoftS has a clamp voltage of 5.6V to prevent the internal circuit from saturation (see Figure 13). 6 .5 V S o ft-S ta rt C o m p a ra to r R FB FB P W M -L a tch P W M C o m p a ra to r 0 .8 V O p to co u p le r PW M OP Ise n se x3 .6 5 6 .5 V 5 .6 V Im proved Current M ode Figure 11 3.3 P o w e r-U p R e s e t R S o ft-S ta rt E rro r-L a tc h S o ftS 6 .5 V 5 .3 V PWM Controlling 4 .8 V R FB Soft-Start FB V S o ftS C4 G2 C3 R Q S Q R Q G a te D riv e r C lo c k S Q P W M -L a tch 5 .6 V 5 .3 V Figure 13 The Start-Up time TStart-Up within the converter output voltage VOUT is settled must be shorter than the SoftStart Phase TSoft-Start (see Figure 14). T S o ft-S ta rt G a te D rive r Activation of Protection Unit T Soft – Start C Soft – Start = ------------------------------------R Soft – Start × 1.69 t By means of Soft-Start there is an effective minimization of current and voltage stresses on the integrated CoolMOS™, the clamp circuit and the output overshoot and prevents saturation of the transformer during Start-Up. t Figure 12 Soft-Start Phase The Soft-Start is realized by the internal pull-up resistor RSoft-Start and the external Capacitor CSoft-Start (see Figure 5). The Soft-Start voltage VSoftS is generated by charging the external capacitor CSoft-Start by the internal Version 2.0 12 11 Jun 2004 CoolSET™-F2 Functional Description kHz V S oftS 100 fOSC 5 .3 V T S o ft-S ta rt V FB 65 21.5 1.0 t 4 .8 V 1.1 T S ta rt-U p t Start Up Phase 3.4 Oscillator and Frequency Reduction 3.4.1 Oscillator The oscillator generates a frequency fswitch = 67kHz/ 100kHz. A resistor, a capacitor and a current source and current sink which determine the frequency are integrated. The charging and discharging current of the implemented oscillator capacitor are internally trimmed, in order to achieve a very accurate switching frequency. The ratio of controlled charge to discharge current is adjusted to reach a max. duty cycle limitation of Dmax=0.72. 3.4.2 1.5 fnorm 100kHz 67kHz 21.5kHz 20kHz 1.6 1.7 1.8 1.9 2.0 V VFB Frequency Dependence Current Limiting There is a cycle by cycle current limiting realized by the Current-Limit Comparator to provide an overcurrent detection. The source current of the integrated CoolMOSTM is sensed via an external sense resistor RSense. By means of RSense the source current is transformed to a sense voltage VSense. When the voltage VSense exceeds the internal threshold voltage Vcsth the Current-Limit-Comparator immediately turns off the gate drive. To prevent the Current Limiting from distortions caused by leading edge spikes a Leading Edge Blanking is integrated at the Current Sense. Furthermore a Propagation Delay Compensation is added to support the immediate shut down of the CoolMOS™ in case of overcurrent. V OUT Figure 14 1.4 fstandby 3.5 t 1.3 ICE2Bxxxx Figure 15 VOUT 1.2 ICE2Axxxx 3.5.1 Leading Edge Blanking V S en s e V cs th tLE B = 2 2 0 n s Frequency Reduction The frequency of the oscillator is depending on the voltage at pin FB. The dependence is shown in Figure 15. This feature allows a power supply to operate at lower frequency at light loads thus lowering the switching losses while maintaining good cross regulation performance and low output ripple. In case of low power the power consumption of the whole SMPS can now be reduced very effective. The minimal reachable frequency is limited to 20kHz/21.5 kHz to avoid audible noise in any case. Version 2.0 13 t Figure 16 Leading Edge Blanking Each time when CoolMOS™ is switched on a leading spike is generated due to the primary-side capacitances and secondary-side rectifier reverse recovery time. To avoid a premature termination of the switching pulse this spike is blanked out with a time constant of tLEB = 220ns. During that time the output of 11 Jun 2004 CoolSET™-F2 Functional Description the Current-Limit Comparator cannot switch off the gate drive. 3.5.2 Propagation Delay Compensation In case of overcurrent detection by ILimit the shut down of CoolMOS™ is delayed due to the propagation delay of the circuit. This delay causes an overshoot of the peak current Ipeak which depends on the ratio of dI/dt of the peak current (see Figure 17). . Signal1 ISense IOvershoot2 Ipeak2 Ipeak1 ILimit Signal2 tPropagation Delay The propagation delay compensation is done by means of a dynamic threshold voltage Vcsth (see Figure 18). In case of a steeper slope the switch off of the driver is earlier to compensate the delay. E.g. Ipeak = 0.5A with RSense = 2. Without propagation delay compensation the current sense threshold is set to a static voltage level Vcsth=1V. A current ramp of dI/dt = 0.4A/µs, that means dVSense/dt = 0.8V/µs, and a propagation delay time of i.e. tPropagation Delay =180ns leads then to a Ipeak overshoot of 12%. By means of propagation delay compensation the overshoot is only about 2% (see Figure 19). without compensation with compensation V 1.3 1.25 1.2 IOvershoot1 VSense 1.15 1.1 1.05 1 0.95 t Figure 17 0.9 0 Current Limiting The overshoot of Signal2 is bigger than of Signal1 due to the steeper rising waveform. A propagation delay compensation is integrated to bound the overshoot dependent on dI/dt of the rising primary current. That means the propagation delay time between exceeding the current sense threshold Vcsth and the switch off of CoolMOS™ is compensated over temperature within a range of at least. dI peak dV Sense - ≤ --------------0 ≤ R Sense× ----------dt dt VOSC 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 V/us dVSense dt Figure 19 3.6 Overcurrent Shutdown PWM-Latch The oscillator clock output applies a set pulse to the PWM-Latch when initiating CoolMOS™ conduction. After setting the PWM-Latch can be reset by the PWMOP, the Soft-Start-Comparator, the Current-LimitComparator, Comparator C3 or the Error-Latch of the Protection Unit. In case of resetting the driver is shut down immediately. max. Duty Cycle 3.7 off time Propagation Delay Vcsth t Signal1 Signal2 Dynamic Voltage Threshold Vcsth Version 2.0 Driver The driver-stage drives the gate of the CoolMOS™ and is optimized to minimize EMI and to provide high circuit efficiency. This is done by reducing the switch on slope when reaching the CoolMOS™ threshold. This is achieved by a slope control of the rising edge at the driver’s output (see Figure 20) to the CoolMOS™ gate. Thus the leading switch on spike is minimized. When CoolMOS™ is switched off, the falling shape of the driver is slowed down when reaching 2V to prevent an overshoot below ground. Furthermore the driver circuit is designed to eliminate cross conduction of the output stage. At voltages below the undervoltage lockout threshold VVCCoff the gate drive is active low. t VSense Figure 18 0.2 14 11 Jun 2004 CoolSET™-F2 Functional Description V G ate Overload / Open Loop with Normal Load ca. t = 130ns 5µs Blanking FB 4.8V Failure Detection 5V t SoftS t Figure 20 3.8 5.3V Soft-Start Phase Internal Gate Rising Slope Protection Unit (Auto Restart Mode) An overload, open loop and overvoltage detection is integrated within the Protection Unit. These three failure modes are latched by an Error-Latch. Additional thermal shutdown is latched by the Error-Latch. In case of those failure modes the Error-Latch is set after a blanking time of 5µs and the CoolMOS™ is shut down. That blanking prevents the Error-Latch from distortions caused by spikes during operation mode. 3.8.1 Overload / Open Loop with Normal Load Figure 21 shows the Auto Restart Mode in case of overload or open loop with normal load. The detection of open loop or overload is provided by the Comparator C3, C4 and the AND-gate G2 (see Figure 22). The detection is activated by C4 when the voltage at pin SoftS exceeds 5.3V. Till this time the IC operates in the Soft-Start Phase. After this phase the comparator C3 can set the Error-Latch in case of open loop or overload which leads the feedback voltage VFB to exceed the threshold of 4.8V. After latching VCC decreases till 8.5V and inactivates the IC. At this time the external Soft-Start capacitor is discharged by the internal transistor T1 due to Power Down Reset. When the IC is inactive VVCC increases till VCCon = 13.5V by charging the Capacitor CVCC by means of the Start-Up Resistor RStart-Up. Then the Error-Latch is reset by Power Up Reset and the external Soft-Start capacitor CSoft-Start is charged by the internal pull-up resistor RSoft-Start. During the Soft-Start Phase which ends when the voltage at pin SoftS exceeds 5.3V the detection of overload and open loop by C3 and G2 is inactive. In this way the Start Up Phase is not detected as an overload. t TBurst1 Driver TRestart t VCC 13.5V 8.5V t Figure 21 Auto Restart Mode 6 .5 V P o w e r U p R e se t S o ftS R S o ft-S tart C S oft-S ta rt C4 5 .3 V E rro r-L a tc h G2 T1 4 .8 V C3 FB R FB 6 .5 V Figure 22 Version 2.0 15 FB-Detection 11 Jun 2004 CoolSET™-F2 Functional Description But the Soft-Start Phase must be finished within the Start Up Phase to force the voltage at pin FB below the failure detection threshold of 4.8V. 3.8.2 normal operation mode is prevented from overvoltage detection due to varying of VCC concerning the regulation of the converter output. When the voltage VSoftS is above 4.0V the overvoltage detection by C1 is deactivated. Overvoltage due to Open Loop with No Load VCC O pen loop & no load condition FB 6 .5 V 5 µ s B la n k in g C1 1 6 .5 V 4 .8 V R S oft-S ta rt F a ilu re D e te ctio n 4 .0 V C2 S o ftS t S o ft-S ta rt P h a s e S o ftS C S oft-S ta rt T1 5 .3 V 4 .0 V E rro r L a tc h G1 P o w e r U p R e se t O v e rv o lta g e D e te c tio n P h a s e Figure 24 t T B u rs t2 D rive r T R es tart 3.8.3 Overvoltage Detection Thermal Shut Down Thermal Shut Down is latched by the Error-Latch when junction temperature Tj of the pwm controller is exceeding an internal threshold of 140°C. In that case the IC switches in Auto Restart Mode. O v e rv o lta g e D e te ctio n t VCC 1 6 .5 V 1 3 .5 V 8 .5 V t Figure 23 Auto Restart Mode Figure 23 shows the Auto Restart Mode for open loop and no load condition. In case of this failure mode the converter output voltage increases and also VCC. An additional protection by the comparators C1, C2 and the AND-gate G1 is implemented to consider this failure mode (see Figure 24).The overvoltage detection is provided by Comparator C1 only in the first time during the Soft-Start Phase till the Soft-Start voltage exceeds the threshold of the Comparator C2 at 4.0V and the voltage at pin FB is above 4.8V. When VCC exceeds 16.5V during the overvoltage detection phase C1 can set the Error-Latch and the Burst Phase during Auto Restart Mode is finished earlier. In that case TBurst2 is shorter than TSoft-Start. By means of C2 the Version 2.0 16 Note: All the values which are mentioned in the functional description are typical. Please refer to Electrical Characteristics for min/max limit values. 11 Jun 2004 CoolSET™-F2 Electrical Characteristics 4 Electrical Characteristics 4.1 Absolute Maximum Ratings Note: Absolute maximum ratings are defined as ratings, which when being exceeded may lead to destruction of the integrated circuit. For the same reason make sure, that any capacitor that will be connected to pin 6 (VCC) is discharged before assembling the application circuit. Parameter Symbol Limit Values min. max. Unit Remarks Drain Source Voltage ICE2A0565/165/265/365/765I/765P2 ICE2B0565/165/265/365/765I/765P2 ICE2A0565G ICE2A0565Z VDS - 650 V Tj = 110°C Drain Source Voltage ICE2A180Z/280Z VDS - 800 V Tj = 25°C ICE2A0565 EAR1 - 0.01 mJ ICE2A165 EAR2 - 0.07 mJ ICE2A265 EAR3 - 0.40 mJ ICE2A365 EAR4 - 0.50 mJ ICE2B0565 EAR5 - 0.01 mJ ICE2B165 EAR6 - 0.07 mJ ICE2B265 EAR7 - 0.40 mJ ICE2B365 EAR8 - 0.50 mJ ICE2A0565G EAR9 - 0.01 mJ ICE2A0565Z EAR10 - 0.01 mJ ICE2A180Z EAR11 - 0.07 mJ ICE2A280Z EAR12 - 0.40 mJ ICE2A765I EAR13 - 0.50 mJ ICE2B765I EAR14 - 0.50 mJ ICE2A765P2 EAR15 - 0.50 mJ ICE2B765P2 EAR16 - 0.50 mJ Avalanche energy, repetitive tAR limited by max. Tj=150°C1) 1) Repetitive avalanche causes additional power losses that can be calculated as PAV=EAR* f Version 2.0 17 11 Jun 2004 CoolSET™-F2 Electrical Characteristics Parameter Symbol Limit Values Unit min. max. IAR1 - 0.5 A IAR2 - 1 A IAR3 - 2 A ICE2A365 IAR4 - 3 A ICE2B0565 IAR5 - 0.5 A ICE2B165 IAR6 - 1 A ICE2B265 IAR7 - 2 A ICE2B365 IAR8 - 3 A ICE2A0565G IAR9 - 0.5 A ICE2A0565Z IAR10 - 0.5 A ICE2A180Z IAR11 - 1 A ICE2A280Z IAR12 - 2 A ICE2A765I IAR13 - 7 A ICE2B765I IAR14 - 7 A ICE2A765P2 IAR15 - 7 A ICE2B765P2 IAR16 - 7 A Avalanche current, ICE2A0565 repetitive tAR limited by ICE2A165 max. Tj=150°C ICE2A265 Remarks VCC Supply Voltage VCC -0.3 22 V FB Voltage VFB -0.3 6.5 V SoftS Voltage VSoftS -0.3 6.5 V ISense ISense -0.3 3 V Junction Temperature Tj -40 150 °C Storage Temperature TS -50 150 °C Thermal Resistance Junction-Ambient RthJA1 - 90 K/W P-DIP-8-6 RthJA2 - 96 K/W P-DIP-7-1 RthJA3 - 110 K/W P-DSO-16/12 VESD - 22) kV Human Body Model ESD Robustness1) 1) Equivalent to discharging a 100pF capacitor through a 1.5 kΩ series resistor 2) 1kV at pin drain of ICE2x0565, ICE2A0565Z and ICE2A0565G Version 2.0 18 Controller & CoolMOS™ 11 Jun 2004 CoolSET™-F2 Electrical Characteristics 4.2 Thermal Impedance (ICE2X765I and ICE2X765P2) Parameter Symbol Limit Values min. max. Unit Remarks Free standing with no heat-sink Thermal Resistance Junction-Ambient ICE2A765I RthJA4 ICE2B765I ICE2A765P2 ICE2B765P2 - 74 K/W Junction-Case ICE2A765I RthJC ICE2B765I ICE2A765P2 ICE2B765P2 - 2.5 K/W 4.3 Note: Operating Range Within the operating range the IC operates as described in the functional description. Parameter Symbol Limit Values min. max. Unit VCC Supply Voltage VCC VCCoff 21 V Junction Temperature of Controller TJCon -25 130 °C Junction Temperature of CoolMOS™ TJCoolMOS -25 150 °C Version 2.0 19 Remarks Limited due to thermal shut down of controller 11 Jun 2004 CoolSET™-F2 Electrical Characteristics 4.4 Note: 4.4.1 Characteristics The electrical characteristics involve the spread of values given within the specified supply voltage and junction temperature range TJ from – 25 ° C to 125 ° C.Typical values represent the median values, which are related to 25°C. If not otherwise stated, a supply voltage of VCC = 15 V is assumed. Supply Section Parameter Symbol Limit Values min. typ. max. Unit Test Condition Start Up Current IVCC1 - 27 55 µA VCC=VCCon -0.1V Supply Current with Inactive Gate IVCC2 - 5.0 6.6 mA VSoftS = 0 IFB = 0 Supply Current ICE2A0565 with Active Gate ICE2A165 IVCC3 - 5.3 6.7 mA IVCC4 - 6.5 7.8 mA VSoftS = 5V IFB = 0 ICE2A265 IVCC5 - 6.7 8.0 mA ICE2A365 IVCC6 - 8.5 9.8 mA ICE2B0565 IVCC7 - 5.2 6.7 mA ICE2B165 IVCC8 - 5.5 7.0 mA ICE2B265 IVCC9 - 6.1 7.3 mA ICE2B365 IVCC10 - 7.1 8.3 mA ICE2A0565G IVCC11 - 5.3 6.7 mA ICE2A0565Z IVCC12 - 5.3 6.7 mA ICE2A180Z IVCC13 - 6.5 7.8 mA ICE2A280Z IVCC14 - 7.7 9.0 mA IVCC15 - 8.5 9.8 mA IVCC16 - 7.1 8.3 mA ICE2A765P2 IVCC17 - 8.5 9.8 mA ICE2B765P2 IVCC18 - 7.1 8.3 mA VCCon VCCoff VCCHY 13 4.5 13.5 8.5 5 14 5.5 V V V Supply Current ICE2A765I with Active Gate ICE2B765I VCC Turn-On Threshold VCC Turn-Off Threshold VCC Turn-On/Off Hysteresis Version 2.0 20 VSoftS = 5V IFB = 0 11 Jun 2004 CoolSET™-F2 Electrical Characteristics 4.4.2 Internal Voltage Reference Parameter Trimmed Reference Voltage 4.4.3 Symbol Limit Values VREF min. typ. max. 6.37 6.50 6.63 Unit Test Condition V measured at pin FB Control Section Parameter Symbol Limit Values min. typ. max. Unit Test Condition Oscillator Frequency ICE2A0565/165/265/365/765I/765P2 ICE2A0565G/0565Z/180Z/280Z fOSC1 93 100 107 kHz VFB = 4V Oscillator Frequency ICE2B0565/165/265/365/765I/765P2 fOSC3 62 67 72 kHz VFB = 4V Reduced Osc. Frequency ICE2A0565/165/265/365/765I/765P2 ICE2A0565G/0565Z/180Z/280Z fOSC2 - 21.5 - kHz VFB = 1V Reduced Osc. Frequency ICE2B0565/165/265/365/765I/765P2 fOSC4 - 20 - kHz VFB = 1V Frequency Ratio fosc1/fosc2 ICE2A0565/165/265/365/765I/765P2 ICE2A0565G/0565Z/180Z/280Z 4.5 4.65 4.9 Frequency Ratio fosc3/fosc4 ICE2B0565/165/265/365/765I/765P2 3.18 3.35 3.53 Max Duty Cycle Dmax 0.67 0.72 0.77 Min Duty Cycle Dmin 0 - - PWM-OP Gain AV 3.45 3.65 3.85 VFB Operating Range Min Level VFBmin 0.3 - - V VFB Operating Range Max level VFBmax - - 4.6 V Feedback Resistance RFB 3.0 3.7 4.9 kΩ Soft-Start Resistance RSoft-Start 42 50 62 kΩ Version 2.0 21 VFB < 0.3V 11 Jun 2004 CoolSET™-F2 Electrical Characteristics 4.4.4 Protection Unit Parameter Symbol Limit Values min. typ. max. Unit Test Condition Over Load & Open Loop Detection Limit VFB2 4.65 4.8 4.95 V VSoftS > 5.5V Activation Limit of Overload & Open Loop Detection VSoftS1 5.15 5.3 5.46 V VFB > 5V Deactivation Limit of Overvoltage Detection VSoftS2 3.88 4.0 4.12 V VFB > 5V VCC > 17.5V Overvoltage Detection Limit VVCC1 16 16.5 17.2 V VSoftS < 3.8V VFB > 5V Latched Thermal Shutdown TjSD 130 140 150 °C 1) Spike Blanking tSpike - 5 - µs 1) The parameter is not subject to production test - verified by design/characterization 4.4.5 Current Limiting Parameter Symbol Limit Values min. typ. max. Unit Test Condition dVsense / dt = 0.6V/µs Peak Current Limitation (incl. Propagation Delay Time) Vcsth 0.95 1.0 1.05 V Leading Edge Blanking tLEB - 220 - ns Version 2.0 22 11 Jun 2004 CoolSET™-F2 Electrical Characteristics 4.4.6 CoolMOS™ Section Parameter Symbol Limit Values min. typ. max. Unit Test Condition Drain Source Breakdown Voltage ICE2A0565/165/265/365/765I/765P2 ICE2B0565/165/265/365/765I/765P2 ICE2A0565G/0565Z V(BR)DSS 600 650 - - V V Tj=25°C Tj=110°C Drain Source Breakdown Voltage ICE2A180Z/280Z V(BR)DSS 800 870 - - V V Tj=25°C Tj=110°C Drain Source On-Resistance ICE2A0565 RDSon1 - 4.7 10.0 5.5 12.5 Ω Ω Tj=25°C Tj=125°C ICE2A165 RDSon2 - 3 6.6 3.3 7.3 Ω Ω Tj=25°C Tj=125°C ICE2A265 RDSon3 - 0.9 1.9 1.08 2.28 Ω Ω Tj=25°C Tj=125°C ICE2A365 RDSon4 - 0.45 0.95 0.54 1.14 Ω Ω Tj=25°C Tj=125°C ICE2B0565 RDSon5 - 4.7 10.0 5.5 12.5 Ω Ω Tj=25°C Tj=125°C ICE2B165 RDSon6 - 3 6.6 3.3 7.3 Ω Ω Tj=25°C Tj=125°C ICE2B265 RDSon7 - 0.9 1.9 1.08 2.28 Ω Ω Tj=25°C Tj=125°C ICE2B365 RDSon8 - 0.45 0.95 0.54 1.14 Ω Ω Tj=25°C Tj=125°C ICE2A0565G RDSon9 - 4.7 10.0 5.5 12.5 Ω Ω Tj=25°C Tj=125°C ICE2A0565Z RDSon10 - 4.7 10.0 5.5 12.5 Ω Ω Tj=25°C Tj=125°C ICE2A180Z RDSon11 - 3 6.6 3.3 7.3 Ω Ω Tj=25°C Tj=125°C ICE2A280Z RDSon12 - 0.8 1.7 1.06 2.04 Ω Ω Tj=25°C Tj=125°C ICE2A765I RDSon13 - 0.45 0.95 0.54 1.14 Ω Ω Tj=25°C Tj=125°C ICE2B765I RDSon14 - 0.45 0.95 0.54 1.14 Ω Ω Tj=25°C Tj=125°C ICE2A765P2 RDSon15 - 0.45 0.95 0.54 1.14 Ω Ω Tj=25°C Tj=125°C ICE2B765P2 RDSon16 - 0.45 0.95 0.54 1.14 Ω Ω Tj=25°C Tj=125°C Version 2.0 23 11 Jun 2004 CoolSET™-F2 Electrical Characteristics Parameter Effective output capacitance, energy related Symbol Limit Values min. typ. max. Test Condition VDS =0V to 480V ICE2A0565 Co(er)1 - 4.751 - pF ICE2A165 Co(er)2 - 7 - pF ICE2A265 Co(er)3 - 21 - pF ICE2A365 Co(er)4 - 30 - pF ICE2B0565 Co(er)5 - 4.751 - pF ICE2B165 Co(er)6 - 7 - pF ICE2B265 Co(er)7 - 21 - pF ICE2B365 Co(er)8 - 30 - pF ICE2A0565G Co(er)9 - 4.751 - pF ICE2A0565Z Co(er)10 - 4.751 - pF ICE2A180Z Co(er)11 - 7 - pF ICE2A280Z Co(er)12 - 22 - pF ICE2A765I Co(er)13 - 30 - pF ICE2B765I Co(er)14 - 30 - pF ICE2A765P2 Co(er)15 - 30 - pF ICE2B765P2 Co(er)16 - 30 - pF IDSS - 0.5 Zero Gate Voltage Drain Current - µA 1) - ns - ns Rise Time trise - 30 Fall Time tfall - 301) 1) Unit VVCC=0V Measured in a Typical Flyback Converter Application Version 2.0 24 11 Jun 2004 CoolSET™-F2 Typical Performance Characteristics Typical Performance Characteristics 40 7,1 Supply Current IVCCi [mA] 34 32 PI-001-190101 Start Up Current IVCC1 [µA] 36 30 28 26 24 22 -25 -15 ICE2B365 6,9 38 6,7 6,5 6,3 ICE2B265 6,1 5,9 5,7 ICE2B165 5,5 5,3 5,1 ICE2B0565 4,9 4,7 -5 5 15 25 35 45 55 65 75 85 4,5 -25 -15 95 105 115 125 -5 5 15 25 35 45 55 65 75 85 95 105 115 125 Junction Temperature [°C] Junction Temperature [°C] Figure 25 PI-002-190101 5 Start Up Current IVCC1 vs. Tj Figure 28 Supply Current IVCCI vs. Tj 8,5 5,9 8,3 8,1 5,3 5,1 4,9 4,7 7,9 7,7 ICE2A280Z 7,5 7,3 7,1 PI-002-190101 Supply Current IVCCi [mA] 5,5 PI-003-190101 Supply Current IVCC2 [mA] 5,7 6,9 6,7 6,5 ICE2A180Z 6,3 6,1 5,9 5,7 4,5 -25 -15 -5 5 15 25 35 45 55 65 75 85 5,5 -25 -15 95 105 115 125 -5 5 Static Supply Current IVCC2 vs. Tj Figure 29 55 65 75 85 95 105 115 125 Supply Current IVCCI vs. Tj 8,6 Supply Current IVCCi [mA] 8,0 7,6 7,2 6,8 ICE2A265 6,4 ICE2A165 6,0 PI-002-190101 Supply Current IVCCi [mA] 45 8,8 ICE2A365 8,4 5,6 5,2 ICE2A0565 /G/Z 4,8 4,4 8,4 ICE2A765P2 8,2 8,0 7,8 7,6 7,4 ICE2B765P2 7,2 7,0 6,8 6,6 6,4 -5 5 15 25 35 45 55 65 75 85 6,2 -25 -15 95 105 115 125 Junction Temperature [°C] Figure 27 35 9,0 8,8 4,0 -25 -15 25 PI-002-190101 Figure 26 15 Junction Temperature [°C] Junction Temperature [°C] 5 15 25 35 45 55 65 75 85 95 105 115 125 Junction Temperature [°C] Supply Current IVCCI vs. Tj Version 2.0 -5 Figure 30 25 Supply Current IVCCI vs. Tj 11 Jun 2004 CoolSET™-F2 Typical Performance Characteristics 13,56 13,54 13,52 13,50 13,48 13,46 13,44 5 15 25 35 45 55 65 75 85 95 105 115 125 6,495 6,490 6,485 6,480 6,475 6,470 -25 -15 -5 5 Junction Temperature [°C] VCC Turn-On Threshold VCCon vs. Tj Figure 34 102,0 8,64 101,5 Oscillator Frequency fOSC1 [kHz] 8,67 8,61 8,58 8,55 PI-005-190101 VCC Turn-Off Threshold VVCCoff [V] Figure 31 8,52 8,49 8,46 8,43 8,40 -25 -15 -5 5 15 25 35 45 55 65 75 85 VCC Turn-Off Threshold VVCCoff vs. Tj 55 65 75 85 95 105 115 125 100,5 ICE2A0565 /G/Z ICE2A165 ICE2A265 ICE2A365 ICE2A180Z ICE2A280Z ICE2A765P2 100,0 99,5 99,0 98,5 98,0 97,5 Figure 35 -5 5 15 25 35 45 55 65 75 85 95 105 115 125 Oscillator Frequency fOSC1 vs. Tj Oscillator Frequency f OSC3 [kHz] 70,0 5,04 5,01 4,98 PI-006-190101 VCC Turn-On/Off Hysteresis V CCHY [V] 45 Junction Temperature [°C] 5,07 4,95 4,92 4,89 4,86 -5 5 15 25 35 45 55 65 75 85 69,5 69,0 68,5 68,0 67,5 67,0 66,0 65,5 65,0 64,5 64,0 -25 -15 95 105 115 125 -5 5 15 25 35 45 55 65 75 85 95 105 115 125 Junction Temperature [°C] VCC Turn-On/Off Hysteresis VVCCHY vs. Tj Version 2.0 ICE2B0565 ICE2B165 ICE2B265 ICE2B365 ICE2B765P2 66,5 Junction Temperature [°C] Figure 33 35 101,0 97,0 -25 -15 95 105 115 125 5,10 4,83 -25 -15 25 Trimmed Reference VREF vs. Tj Junction Temperature [°C] Figure 32 15 Junction Temperature [°C] PI-008-190101 -5 6,500 PI-008a-190101 13,42 -25 -15 6,505 PI-007-190101 Trimmed Reference Voltage V REF [V] 6,510 PI-004-190101 VCC Turn-On Threshold VCCon [V] 13,58 Figure 36 26 Oscillator Frequency fOSC3 vs. Tj 11 Jun 2004 CoolSET™-F2 3,45 21,8 3,43 ICE2A0565 /G/Z ICE2A165 ICE2A265 ICE2A365 ICE2A180Z ICE2A280Z ICE2A765P2 21,4 21,2 21,0 20,8 20,6 20,4 20,2 20,0 -25 -15 -5 5 15 25 35 45 55 65 75 85 3,41 3,39 3,35 3,33 3,31 3,29 3,27 3,25 -25 -15 95 105 115 125 ICE2B0565 ICE2B165 ICE2B265 ICE2B365 ICE2B765P2 3,37 -5 5 Junction Temperature [°C] Reduced Osc. Frequency fOSC2 vs. Tj Figure 40 21,0 0,730 20,8 0,728 Max. Duty Cycle 20,2 20,0 19,8 19,6 25 35 45 55 65 75 85 0,710 -25 -15 95 105 115 125 -5 5 Reduced Osc. Frequency fOSC4 vs. Tj Figure 41 3,70 3,69 25 35 45 55 65 75 85 95 105 115 125 85 95 105 115 125 Max. Duty Cycle vs. Tj 3,68 ICE2A0565/G/Z ICE2A165 ICE2A265 ICE2A365 ICE2A180Z ICE2A280Z ICE2A765P2 4,67 4,65 4,63 4,61 3,67 3,66 3,65 3,64 3,63 4,59 3,62 4,57 3,61 -5 5 15 25 35 45 55 65 75 85 3,60 -25 -15 95 105 115 125 Junction Temperature [°C] -5 5 15 25 35 45 55 65 75 Junction Temperature [°C] Frequency Ratio fOSC1 / fOSC2 vs. Tj Version 2.0 PI-012-190101 4,69 PWM-OP Gain AV 4,71 PI-010-190101 Frequency Ratio fOSC1/fOSC2 15 Junction Temperature [°C] 4,73 Figure 39 95 105 115 125 0,716 4,75 4,55 -25 -15 85 Frequency Ratio fOSC3 / fOSC4 vs. Tj Junction Temperature [°C] Figure 38 75 0,718 0,712 15 65 0,720 19,2 5 55 0,722 0,714 -5 45 0,724 19,4 19,0 -25 -15 35 0,726 ICE2B0565 ICE2B165 ICE2B265 ICE2B365 ICE2B765P2 20,4 25 PI-011-190101 20,6 15 Junction Temperature [°C] PI-009a-190101 Reduced Osc. Frequency fOSC4 [kHz] Figure 37 PI-010a-190101 21,6 Frequency Ratio fOSC3/fOSC4 22,0 PI-009-190101 Reduced Osc. Frequency f OSC2 [kHz] Typical Performance Characteristics Figure 42 27 PWM-OP Gain AV vs. Tj 11 Jun 2004 CoolSET™-F2 5,320 3,95 5,315 3,90 3,85 3,80 3,75 3,70 3,65 3,60 3,55 3,50 -25 -15 -5 5 15 25 35 45 55 65 75 85 5,310 5,305 5,300 5,295 5,290 5,285 5,280 5,275 5,270 -25 -15 95 105 115 125 PI-016-190101 Detection Limit VSoft-Start1 [V] 4,00 PI-013-190101 Feedback Resistance R FB [kOhm] Typical Performance Characteristics -5 5 Junction Temperature [°C] Figure 46 4,05 56 4,04 Detection Limit VSoft-Start2 [V] 58 54 52 50 48 46 44 42 40 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 4,795 4,790 4,785 25 35 45 55 65 75 85 95 105 115 125 95 105 115 125 4,00 3,99 3,98 3,97 3,96 -5 5 15 25 35 45 55 65 75 85 95 105 115 125 Detection Limit VSoft-Start2 vs. Tj 16,80 16,75 16,70 16,65 16,60 16,55 16,50 16,45 16,40 16,35 16,30 16,25 16,20 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125 Junction Temperature [°C] Detection Limit VFB2 vs. Tj Version 2.0 85 4,01 Junction Temperature [°C] Figure 45 75 PI-018-190101 Overvoltage Detection Limit VVCC1 [V] PI-015-190101 Detection Limit VFB2 [V] 4,800 15 65 4,02 Figure 47 4,805 5 55 Junction Temperature [°C] Soft-Start Resistance RSoft-Start vs. Tj -5 45 4,03 3,95 -25 -15 105 115 125 4,810 4,780 -25 -15 35 Detection Limit VSoft-Start1 vs. Tj Junction Temperature [°C] Figure 44 25 PI-017-190101 Feedback Resistance RFB vs. Tj PI-014-190101 Soft-Start Resistance RSoft-Start [kOhm] Figure 43 15 Junction Temperature [°C] Figure 48 28 Overvoltage Detection Limit VVCC1 vs. Tj 11 Jun 2004 CoolSET™-F2 2,2 1,008 2,0 1,006 1,004 1,002 1,000 0,998 0,996 0,994 0,992 0,990 -25 -15 -5 5 15 25 35 45 55 65 75 85 1,8 1,6 1,4 ICE2A265 ICE2B265 1,2 1,0 ICE2A280Z 0,8 0,6 0,4 -25 -15 95 105 115 125 -5 5 Junction Temperature [°C] Figure 49 PI-022-190101 On-Resistance Rdson [Ohm] 1,010 PI-019-190101 Peak Current Limitation Vcsth [V] Typical Performance Characteristics 15 25 35 45 55 65 75 85 95 105 115 125 Junction Temperature [°C] Peak Current Limitation Vcsth vs. Tj Figure 52 Drain Source On-Resistance RDSon vs. Tj 9,5 260 250 240 230 220 210 200 190 -5 5 15 25 35 45 55 65 75 85 7,5 6,5 4,5 ICE2A165 ICE2B165 ICE2A180Z 3,5 2,5 1,5 -25 -15 95 105 115 125 ICE2A0565 /G/Z ICE2B0565 5,5 -5 5 Junction Temperature [°C] Leading Edge Blanking VVCC1 vs. Tj Figure 53 1,0 0,9 0,9 On-Resistance Rdson [Ohm] 1,0 0,8 0,7 0,6 0,5 ICE2A365 ICE2B365 0,4 0,3 0,2 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 45 55 65 75 85 95 105 115 125 Drain Source On-Resistance RDSon vs. Tj 0,7 0,6 ICE2A765P2 ICE2B765P2 0,5 0,4 0,3 0,2 -25 -15 105 115 125 -5 5 15 25 35 45 55 65 75 85 95 105 115 125 Junction Temperature [°C] Drain Source On-Resistance RDSon vs. Tj Version 2.0 35 0,8 Junction Temperature [°C] Figure 51 25 Junction Temperature [°C] PI-022-190101 On-Resistance Rdson [Ohm] Figure 50 15 PI-022-190101 180 -25 -15 8,5 PI-022-190101 On-Resistance Rdson [Ohm] 270 PI-020-190101 Leading Edge Blanking tLEB [ns] 280 Figure 54 29 Drain Source On-Resistance RDSon vs. Tj 11 Jun 2004 CoolSET™-F2 Typical Performance Characteristics 700 680 660 ICE2A0565 /G/Z ICE2A165 ICE2A265 ICE2A365 ICE2B0565 ICE2B165 ICE2B265 ICE2B365 ICE2A765P2 ICE2B765P2 640 620 600 580 560 -25 -15 -5 5 15 25 35 45 55 65 75 85 PI-025-190101 Breakdown Voltage V(BR)DSS [V] 720 95 105 115 125 Junction Temperature [°C] Figure 55 Breakdown Voltage VBR(DSS) vs. Tj 920 900 880 ICE2A180Z ICE2A280Z 860 PI-025-190101 Breakdown Voltage V(BR)DSS [V] 940 840 820 800 780 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125 Junction Temperature [°C] Figure 56 Breakdown Voltage VBR(DSS) vs. Tj Version 2.0 30 11 Jun 2004 CoolSET™-F2 Layout Recommendation for C18 6 Note: Layout Recommendation for C18 Only for ICE2A765I/P2 and ICE2B765I/P2 Soft Start Capacitor Layout Recommendation in Detail Detail X Figure 57B Detail X, Soft Start Capacitor C18 Layout Recommendation Place Soft Start capacitor C18 in the same way as shown in Detail X (blue mark). Figure 57A Layout of Board EVALSF2_ICE2B765P2 To improve the startup behavior of the IC during startup or auto restart mode, place the soft start capacitor C18 (red section Detail X in Figure 57A) as close as possible to the soft start PIN 6 and GND PIN 4. More details see Detail X in Figure 57B. Figure 57 Layout Recommendation for ICE2A765I/P2 and ICE2B765I/P2 Version 2.0 31 11 Jun 2004 CoolSET™-F2 Outline Dimension 7 Outline Dimension P-DIP-8-6 (Plastic Dual In-line Package) 1.7 MAX. 2.54 0.46 ±0.1 0.35 7x 3.25 MIN. P-DIP-7-1 (Plastic Dual In-line Package) 4.37 MAX. P-DIP-8-6 (Plastic Dual In-line Package) 0.38 MIN. Figure 58 7.87 ±0.38 0.25 +0.1 6.35 ±0.25 1) 8.9 ±1 5 7 4 1 9.52 ±0.25 1) Index Marking 1) Figure 59 Does not include plastic or metal protrusion of 0.25 max. per side P-DIP-7-1 (Plastic Dual In-line Package) Dimensions in mm Version 2.0 32 11 Jun 2004 CoolSET™-F2 Outline Dimension P-TO220-6-46 Isodrain Package 9.9 7.5 1.3 +0.1 -0.02 (0.8) B 9.2 ±0.2 0.05 8 1) 8.6 ±0.3 10.2 ±0.3 12.1±0.3 6.6 4.4 A 7.62 0.25 0...0.15 M 0.5 ±0.1 A B 2.4 6 x 0.6 ±0.1 5.3 ±0.3 4 x 1.27 8.4 ±0.3 1) Shear and punch direction no burrs this surface Back side, heatsink contour All metal surfaces tin plated, except area of cut. P-TO220-6-46 (Isodrain Package) 9.9 ±0.2 A 9.5 ±0.2 7.5 B 3.7 -0.15 13 0.05 1) 8.6 ±0.3 15.6 ±0.3 17.5 ±0.3 6.6 4.4 1.3 +0.1 -0.02 9.2 ±0.2 P-TO220-6-47 Isodrain Package 2.8 ±0.2 Figure 60 7.62 0...0.15 0.25 M 0.5 ±0.1 A B 2.4 6 x 0.6 ±0.1 4 x 1.27 5.3 ±0.3 8.4 ±0.3 1) Shear and punch direction no burrs this surface Back side, heatsink contour All metal surfaces tin plated, except area of cut. Figure 61 P-TO220-6-47 (Isodrain Package) Dimensions in mm Version 2.0 33 11 Jun 2004 CoolSET™-F2 Outline Dimension P-DSO-16/12 (Plastic Dual Small Outline Package) Figure 62 P-DSO-16/12 (Plastic Dual Small Outline Package) Dimensions in mm Version 2.0 34 11 Jun 2004 Total Quality Management Qualität hat für uns eine umfassende Bedeutung. Wir wollen allen Ihren Ansprüchen in der bestmöglichen Weise gerecht werden. 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