D CoolSET™-F 2 at a Datash eet, V ersion 2 .0 , A ugust 2001 ICE2A765P ar y ICE2B765P re li m in Off-Line SMPS Current Mode C o n t ro l l e r w i t h i n t e g ra t e d 6 5 0 V CoolMOS™ P P o w e r M a n a g em e n t & S u p p l y N e v e r s t o p t h i n k i n g . CoolSET™-F2 Revision History: 2001-08-20 Previous Version: V1.2 Page Datasheet Subjects (major changes since last revision) ICE2A765P is added For questions on technology, delivery and prices please contact the Infineon Technologies Offices in Germany or the Infineon Technologies Companies and Representatives worldwide: see our webpage at http:// www.infineon.com CoolMOS™, CoolSET™ are trademarks of Infineon Technologies AG. We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: [email protected] Edition 2001-08-20 Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81541 München © Infineon Technologies AG 1999. All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as warranted characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologies is an approved CECC manufacturer. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. CoolSET™-F2 Preliminary Specification ICE2A765P ICE2B765P Off-Line SMPS Current Mode Controller with integrated 650V CoolMOS™ Product Highlights • Isolated Drain Package • Lowest Standby Power Dissipation • Enhanced Protection Functions all with Auto Restart Mode P-TO220-6-3 Features Description • • • • • • The second generation COOLSET™-F2 provides several special enhancements to satisfy the needs for low power standby and protection features. In standby mode frequency reduction is used to lower the power consumption and support a stable output voltage in this mode. The frequency reduction is limited to 20kHz / 21.5 kHz (typ.) to avoid audible noise. In case of failure modes like open loop, overvoltage or overload due to short circuit the device switches in Auto Restart Mode which is controlled by the internal protection unit. By means of the internal precise peak current limitation the dimension of the transformer and the secondary diode can be lower which leads to more cost efficiency. • • • • • • • • 650V Avalanche Rugged CoolMOS™ Only few external Components required Input Undervoltage Lockout 67kHz/100kHz Switching Frequency Max Duty Cycle 72% Low Power Standby Mode to support “Blue Angle” Norm Thermal Shut Down with Auto Restart Overload and Open Loop Protection Overvoltage Protection during Auto Restart Adjustable Peak Current Limitation via External Resistor Overall Tolerance of Current Limiting < ±5% Internal Leading Edge Blanking User defined Soft Start Soft Switching for Low EMI Typical Application + Snubber RStart-up 85 ... 270 VAC Converter DC Output - CVCC VCC Drain Feedback Low Power StandBy Power Management SoftS Soft-Start Control CSoft Start CoolMOS™ PWM Controller Current Mode Isense Precise Low Tolerance Peak Current Limitation RSense FB Protection Unit GND PWM-Controller Feedback CoolSET™-F2 FOSC RDSON1) 230VAC ±15%2) 85-265 VAC2) P-TO-220-6-3 650V 100kHz 0.5Ω 240W 130W P-TO-220-6-3 650V 67kHz 0,5Ω 240W 130W Type Ordering Code Package ICE2A765P Q67040-S4533 ICE2B765P Q67040-S4532 1) 2) UDS typ. value @ T=25°C Maximum practical continous power in an open frame design at 75°C ambient, Tj=125°C, Rth=2.7K/W Datasheet Preliminary Data 3 August 2001 Preliminary Specification Table of Contents CoolSET™-F2 ICE2A765P ICE2B765P Page 1 1.1 1.2 Pin Configuration and Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 Pin Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 2 Representative Blockdiagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 3 3.1 3.2 3.2.1 3.2.2 3.3 3.4 3.4.1 3.4.2 3.5 3.5.1 3.5.2 3.6 3.7 3.8 3.8.1 3.8.2 3.8.3 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 Improved Current Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 PWM-OP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 PWM-Comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 Soft-Start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 Oscillator and Frequency Reduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Frequency Reduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Current Limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Leading Edge Blanking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Propagation Delay Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 PWM-Latch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Protection Unit (Auto Restart Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Overload & Open loop with normal load . . . . . . . . . . . . . . . . . . . . . . . . .12 Overvoltage due to open loop with no load . . . . . . . . . . . . . . . . . . . . . . .13 Thermal Shut Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 4 4.1 4.2 4.3 4.4 4.4.1 4.4.2 4.4.3 4.4.4 4.4.5 4.4.6 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 Supply Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 Internal Voltage Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 Control Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 Protection Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 Current Limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 CoolMOS™ Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 5 Typical Performance Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .19 6 Outline Dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 Datasheet Preliminary Data 4 August 2001 Preliminary Specification CoolSET™-F2 ICE2A765P ICE2B765P Pin Configuration and Functionality 1 Pin Configuration and Functionality 1.1 Pin Configuration 1.2 Pin Symbol Function 1 Drain 650V1) CoolMOS™ Drain 3 Isense 650V1) CoolMOS™ Source 4 GND Controller Ground 5 VCC Controller Supply Voltage 6 SoftS Soft-Start 7 FB Feedback 1) Pin Functionality SoftS (Soft Start & Auto Restart Control) This pin combines the function of Soft Start in case of Start Up and Auto Restart Mode and the controlling of the Auto Restart Mode in case of an error detection. FB (Feedback) The information about the regulation is provided by the FB Pin to the internal Protection Unit and to the internal PWM-Comparator to control the duty cycle. Isense (Current Sense) The Current Sense pin senses the voltage developed on the series resistor inserted in the source of the integrated CoolMOS™. When Isense reaches the internal threshold of the Current Limit Comparator, the Driver output is disabled. By this means the Over Current Detection is realized. Furthermore the current information is provided for the PWM-Comparator to realize the Current Mode. at Tj = 110°C Package P-TO220-6-3 Drain (Drain of integrated CoolMOS™) Pin Drain is the connection to the Drain of the internal CoolMOSTM. Figure 1 3 4 5 6 7 GND VCC SoftS FB 2 Drain 1 Isense VCC (Power supply) This pin is the positiv supply of the IC. The operating range is between 8.5V and 21V. To provide overvoltage protection the driver gets disabled when the voltage becomes higher than 16.5V during Start Up Phase. GND (Ground) This pin is the ground of the primary side of the SMPS. Pin Configuration (top view) Datasheet Preliminary Data 5 August 2001 Figure 2 Datasheet Preliminary Data FB CSoft-Start T1 6 Thermal Shutdown C3 C4 C2 C1 GND Protection Unit Tj >140°C 4.8V 5.3V 4.0V CoolSET™-F2 RFB 6.5V 5.6V RSoft-Start 6.5V 16.5V VCC RStart-up G2 G1 8.5V fosc fstandby fnorm R S Q Q UFB Error-Latch Spike Blanking 5µs Power-Up Reset Power-Down Reset 13.5V x3.65 C5 PWM Comparator Soft-Start Comparator 6.5V 5.3V 4.8V 4.0V Current-Limit Comparator G4 Current Limiting Vcsth Q Q Leading Edge Blanking 200ns Gate Driver D1 10kΩ CoolMOS™ Drain Snubber 100kHz 21.5kHz 67kHz Frequency in Standby Mode fstandby: 20kHz ICE2B765P ICE2A765P R S PWM-Latch 0.72 Propagation-Delay Compensation Clock Duty Cycle max Oscillator Frequency in Normal Mode fnorm: Improved Current Mode PWM OP 0.8V 0.3V Soft Start Voltage Reference Internal Bias Power Management Undervoltage Lockout Standby Unit G3 CVCC CLine Isense Optocoupler RSense 2 SoftS 85 ... 270 VAC + Converter DC Output VOUT - Target Specification CoolSET™-F2 ICE2A765P ICE2B765P Representative Blockdiagram Representative Blockdiagram Representative Blockdiagram August 2001 CoolSET™-F2 ICE2A765P ICE2B765P Preliminary Specification Functional Description 3 Functional Description 3.1 Power Management 3.2 M ain L in e (1 00 V -3 80 V ) Improved Current Mode S o ft-S ta rt C o m p a ra to r R S tart-U p P rim ary W in ding P W M -L a tch FB C VC C R Q D rive r VCC P W M C o m p a ra to r Pow er M anagem ent S U n de rvolta g e Q In te rn a l L o ckou t B ias 0 .8V 1 3 .5V 8 .5 V P o w er-D ow n 6.5 V R e set 5.3 V V o lta g e PW M OP x3 .6 5 4.8 V R efe ren ce 4.0 V P o w er-U p Ise n se Im proved C urrent M ode R e se t R Q P W M -L atch Figure 4 6 .5 V S R Soft-Sta rt S o ftS Q Current Mode means that the duty cycle is controlled by the slope of the primary current. This is done by comparison the FB signal with the amplified current sense signal. E rro r-L a tch S o ft-S ta rt C om p ara tor C S oft-Start T1 Current Mode E rror-D ete ctio n A m p lified C u rren t S ig n al Figure 3 Power Management FB The Undervoltage Lockout monitors the external supply voltage VVCC. In case the IC is inactive the current consumption is max. 55µA. When the SMPS is plugged to the main line the current through RStart-up charges the external Capacitor CVCC. When VVCC exceeds the on-threshold VCCon=13.5V the internal bias circuit and the voltage reference are switched on. After it the internal bandgap generates a reference voltage VREF=6.5V to supply the internal circuits. To avoid uncontrolled ringing at switch-on a hysteresis is implemented which means that switch-off is only after active mode when Vcc falls below 8.5V. In case of switch-on a Power Up Reset is done by reseting the internal error-latch in the protection unit. When VVCC falls below the off-threshold VCCoff=8.5V the internal reference is switched off and the Power Down reset let T1 discharging the soft-start capacitor CSoft-Start at pin SoftS. Thus it is ensured that at every switch-on the voltage ramp at pin SoftS starts at zero. Datasheet Preliminary Data 0 .8 V D rive r t T on t Figure 5 Pulse Width Modulation In case the amplified current sense signal exceeds the FB signal the on-time Ton of the driver is finished by reseting the PWM-Latch (see Figure 5). 7 August 2001 CoolSET™-F2 ICE2A765P ICE2B765P Preliminary Specification Functional Description The primary current is sensed by the external series resistor RSense inserted in the source of the integrated CoolMOS™. By means of Current Mode the regulation of the secondary voltage is insensitive on line variations. Line variation causes varition of the increasing current slope which controls the duty cycle. The external RSense allows an individual adjustment of the maximum source current of the integrated CoolMOS™. V OSC m a x. D u ty C yc le V olta ge R a m p t S oft-S tart C o m p ara to r P W M C o m pa ra to r 0 .8 V FB FB 0 .3 V P W M -La tch O s cilla to r G a te D rive r 0.3V t C5 G a te D rive r V O SC 0.8V 1 0 kΩ x3 .6 5 R1 T2 C1 V1 2 0p F t PW M OP Figure 7 3.2.1 V oltage Ram p Figure 6 PWM-OP The input of the PWM-OP is applied over the internal leading edge blanking to the external sense resistor RSense connected to pin ISense. RSense converts the source current into a sense voltage. The sense voltage is amplified with a gain of 3.65 by PWM OP. The output of the PWM-OP is connected to the voltage source V1. The voltage ramp with the superimposed amplified current singal is fed into the positive inputs of the PWMComparator, C5 and the Soft-Start-Comparator. Improved Current Mode To improve the Current Mode during light load conditions the amplified current ramp of the PWM-OP is superimposed on a voltage ramp, which is built by the switch T2, the voltage source V1 and the 1st order low pass filter composed of R1 and C1(see Figure 6, Figure 7). Every time the oscillator shuts down for max. duty cycle limitation the switch T2 is closed by VOSC. When the oscillator triggers the Gate Driver T2 is opened so that the voltage ramp can start. In case of light load the amplified current ramp is to small to ensure a stable regulation. In that case the Voltage Ramp is a well defined signal for the comparison with the FB-signal. The duty cycle is then controlled by the slope of the Voltage Ramp. By means of the C5 Comparator the Gate Driver is switched-off until the voltage ramp exceeds 0.3V. It allows the duty cycle to be reduced continously till 0% by decreasing VFB below that threshold. Datasheet Preliminary Data Light Load Conditions 3.2.2 PWM-Comparator The PWM-Comparator compares the sensed current signal of the integrated CoolMOSTM with the feedback signal VFB (see Figure 8). VFB is created by an external optocoupler or external transistor in combination with the internal pullup resistor RFB and provides the load information of the feedback circuitry. When the amplified current signal of the integrated CoolMOS™ exceeds the signal VFB the PWM-Comparator switches off the Gate Driver. 8 August 2001 CoolSET™-F2 ICE2A765P ICE2B765P Preliminary Specification Functional Description pullup resistor RSoft-Start. The Soft-Start-Comparator compares the voltage at pin SoftS at the negative input with the ramp signal of the PWM-OP at the positive input. When Soft-Start voltage VSoftS is less than Feedback voltage VFB the Soft-Start-Comparator limits the pulse width by reseting the PWM-Latch (see Figure 9). In addition to Start-Up, Soft-Start is also activated at each restart attempt during Auto Restart. By means of the above mentioned CSoft-Start the Soft-Start can be defined by the user. The Soft-Start is finished when VSoftS exceeds 5.3V. At that time the Protection Unit is activated by Comparator C4 and senses the FB by Comparator C3 wether the voltage is below 4.8V which means that the voltage on the secondary side of the SMPS is settled. The internal Zener Diode at SoftS with breaktrough voltage of 5.6V is to prevent the internal circuit from saturation (see Figure 10). 6 .5 V S o ft-S ta rt C o m p ara to r R FB FB P W M -L atch P W M C o m p a rato r 0 .8 V O p to co u p le r PW M OP Ise n se 6 .5 V x3 .65 5 .6 V R S oft-S tart Im proved Current M ode Figure 8 3.3 P o w e r-U p R e se t E rro r-L a tch S o ftS 6 .5 V 5 .3 V PWM Controlling Soft-Start 4 .8 V R FB V S oftS C4 G2 C3 FB R Q S Q R Q G a te D riv e r C lo ck S Q P W M -L a tch 5 .6 V 5 .3 V Figure 10 The Start-Up time TStart-Up within the converter output voltage VOUT is settled must be shorter than the SoftStart Phase TSoft-Start (see Figure 11). T S oft-S tart G a te D rive r t C Soft − Start = T Soft − Start R Soft − Start × 1, 69 By means of Soft-Start there is an effective minimization of current and voltage stresses on the integrated CoolMOS™, the clamp circuit and the output overshoot and prevents saturation of the transformer during Start-Up. t Figure 9 Activation of Protection Unit Soft-Start Phase The Soft-Start is realized by the internal pullup resistor RSoft-Start and the external Capacitor CSoft-Start (see Figure 2). The Soft-Start voltage VSoftS is generated by charging the external capacitor CSoft-Start by the internal Datasheet Preliminary Data 9 August 2001 CoolSET™-F2 ICE2A765P ICE2B765P Preliminary Specification Functional Description V S o ftS kH z fnorm f OS C 5 .3 V T S oft-S ta rt fstandby V FB t 1 ,0 1 ,1 1 ,2 1 ,3 1 ,4 1 ,5 1 ,6 1 ,7 1 ,8 1 ,9 2 V VF B ICE2B765P 4 .8 V 67kHz 100kHz fst andby : 20kHz 21.5kHz Figure 12 V OUT 3.5 t Start Up Phase 3.4 Oscillator and Frequency Reduction 3.4.1 Oscillator Current Limiting There is a cycle by cycle current limiting realised by the Current-Limit Comparator to provide an overcurrent detection. The source current of the integrated CoolMOSTM is sensed via an external sense resistor RSense . By means of RSense the source current is transformed to a sense voltage VSense. When the voltage VSense exceeds the internal threshold voltage Vcsth the Current-Limit-Comparator immediately turns off the gate drive. To prevent the Current Limiting from distortions caused by leading edge spikes a Leading Edge Blanking is integrated at the Current Sense. Furthermore a Propagation Delay Compensation is added to support the immedeate shut down of the CoolMOS™ in case of overcurrent. T S ta rt-U p The oscillator generates a frequency fswitch = 67kHz/ 100kHz. A resistor, a capacitor and a current source and current sink which determine the frequency are integrated. The charging and discharging current of the implemented oscillator capacitor are internally trimmed, in order to achieve a very accurate switching frequency. The ratio of controlled charge to discharge current is adjusted to reach a max. duty cycle limitation of Dmax=0.72. 3.4.2 Frequency Dependence t V O UT Figure 11 ICE2A765P fnorm : 3.5.1 Leading Edge Blanking V S en s e V c s th t L E B = 22 0 ns Frequency Reduction The frequency of the oscillator is depending on the voltage at pin FB. The dependence is shown in Figure 12. This feature allows a power supply to operate at lower frequency at light loads thus lowering the switching losses while maintaining good cross regulation performance and low output ripple. In case of low power the power consumption of the whole SMPS can now be reduced very effective. The minimal reachable frequency is limited to 20kHz / 21.5 kHz to avoid audible noise in any case. Datasheet Preliminary Data t Figure 13 Leading Edge Blanking Each time when CoolMOS™ is switched on a leading spike is generated due to the primary-side capacitances and secondary-side rectifier reverse recovery time. To avoid a premature termination of the switching pulse this spike is blanked out with a time constant of tLEB = 220ns. During that time the output of 10 August 2001 CoolSET™-F2 ICE2A765P ICE2B765P Preliminary Specification Functional Description the Current-Limit Comparator cannot switch off the gate drive. 3.5.2 VOSC In case of overcurrent detection by ILimit the shut down of CoolMOS™ is delayed due to the propagation delay of the circuit and the CoolMOS™. This delay causes an overshoot of the peak current Ipeak which depends on the ratio of dI/dt of the peak current (see Figure 14). . S ig n a l2 off time VSense S ig n a l1 t P ro pa ga tion D e la y I S e ns e I p ea k 2 I p ea k 1 I L im it max. Duty Cycle Propagation Delay Compensation Propagation Delay t Vcsth I O v ers h oo t2 I O v e rs ho ot1 Signal1 Signal2 t Figure 15 t Figure 14 The propagation delay compensation is done by means of a dynamic threshold voltage Vcsth (see Figure 15). In case of a steeper slope the detection of the overcurrent take place earlier to compensate the propagation delay. Every time when the internal oscillator starts the switch on the threshold voltage Vcsth starts at a certain level and rises until max. duty cycle is reached. During the off time of the oscillaltor Vcsth decreases to the starting level. E.g. Ipeak = 0.5A with RSense = 2 . Without propagation delay compensation the current sense threshold is set to a static voltage level Vcsth=1V. A current ramp of dI/dt = 0.4A/µs, that means dVSense/dt = 0.8V/µs, and a propagation delay time of i.e. tPropagation Delay =180ns leads then to a Ipeak overshoot of 12%. By means of propagation delay compensation the overshoot is only about 2% (see Figure 16). So current limiting is now capable in a very accurate way. Current Limiting The overshoot of Signal2 is bigger than of Signal1 due to the steeper rising waveform. A propagation delay compensation is integrated to bound the overshoot dependent on dI/dt of the rising primary current. That means the propagation delay time between exceeding the internal current sense threshold Vcsth and the switch off of CoolMOS™ is compensated over temperature within a range of at least (see Figure 16): 0 ≤ R Sense × dI peak dt Datasheet Preliminary Data ≤ 1 Dynamic Voltage Threshold Vcsth dV Sense dt 11 August 2001 Preliminary Specification CoolSET™-F2 ICE2A765P ICE2B765P Functional Description 3.8 with compensation without compensation An overload, open loop and overvoltage detection is integrated within the Protection Unit. These three failure modes are latched by an Error-Latch. Additional thermal shutdown is latched by the Error-Latch. In case of those failure modes the Error-Latch is set after a blanking time of 5µs and the CoolMOS™ is shut down. That blanking prevents the Error-Latch from distortions caused by spikes during operation mode. V 1,3 1,25 1,2 VSense Protection Unit (Auto Restart Mode) 1,15 1,1 1,05 1 3.8.1 0,95 0,9 0 0,2 0,4 0,6 0,8 1 1,2 1,4 1,6 1,8 V µs 2 dVSense dt Figure 16 3.6 Figure 18 shows the Auto Restart Mode in case of overload or open loop with normal load. The detection of open loop or overload is provided by the Comparator C3, C4 and the AND-gate G2 (see Figure19). The detection is activated by C4 when the voltage at pin SoftS exceeds 5.3V. Till this time the IC operates in the Soft-Start Phase. After this phase the comparator C3 can set the Error-Latch in case of open loop or overload which leads the feedback voltage VFB to exceed the threshold of 4.8V. After latching VCC decreases till 8.5V and inactivates the IC. At this time the external Soft-Start capacitor is discharged by the internal transistor T1 due to Power Down Reset. When the IC is inactive VVCC increases till VCCon = 13.5V by charging the Capacitor CVCC by means of the Start-Up Resistor RStart-Up. Then the Error-Latch is reset by Power Up Reset and the external Soft-Start capacitor CSoft-Start is charged by the internal pullup resistor RSoft-Start . During the Soft-Start Phase which ends when the voltage at pin SoftS exceeds 5.3V the detection of overload and open loop by C3 and G2 is inactive. In this way the Start Up Phase is not detected as an overload. Overcurrent Shutdown PWM-Latch The oscillator clock output applies a set pulse to the PWM-Latch when initiating CoolMOS™ conduction. After setting the PWM-Latch can be reset by the PWMOP, the Soft-Start-Comparator, the Current-LimitComparator, Comparator C3 or the Error-Latch of the Protection Unit. In case of reseting the driver is shut down immediately. 3.7 Driver The driver-stage drives the gate of the CoolMOS™ and is optimized to minimize EMI and to provide high circuit efficiency. This is done by reducing the switch on slope when reaching the CoolMOS™ threshold. This is achieved by a slope control of the rising edge at the driver’s output (see Figure 17). Thus the leading switch on spike is minimized. When CoolMOS™ is switched off, the falling shape of the driver is slowed down when reaching 2V to prevent an overshoot below ground. Furthermore the driver circuit is designed to eliminate cross conduction of the output stage. At voltages below the undervoltage lockout threshold VVCCoff the gate drive is active low. V G a te Overload & Open loop with normal load ca . t = 1 3 0 n s 5V t Figure 17 Gate Rising Slope Datasheet Preliminary Data 12 August 2001 CoolSET™-F2 ICE2A765P ICE2B765P Preliminary Specification Functional Description But the Soft-Start Phase must be finished within the Start Up Phase to force the voltage at pin FB below the failure detection threshold of 4.8V. O verload & O pen loop/norm al load 5µ s B la n king FB 3.8.2 Overvoltage due to open loop with no load 4 .8 V F a ilu re D e te ctio n O pen loop & no load conditio n t FB 5 µs B la n kin g S o ftS 4 .8V 5 .3 V F ailure D ete ction S o ft-S ta rt P h a se D rive r S o ftS t T B u rs t1 t S o ft-S ta rt P ha se 5 .3V T R e s tart 4 .0V D rive r t O v erv olta g e D e te ction P ha se t T B urs t2 T R es ta rt VC C 1 3 .5 V 8 .5 V O ve rvo ltag e D ete ctio n t Figure 18 t VCC 1 6.5 V 1 3.5 V Auto Restart Mode 8.5 V 6.5 V P o w e r U p R e se t S o ftS t R S oft-S tart Figure 20 C S oft-S tart C4 5 .3 V Figure 20 shows the Auto Restart Mode for open loop and no load condition. In case of this failure mode the converter output voltage increases and also VCC. An additional protection by the comparators C1, C2 and the AND-gate G1 is implemented to consider this failure mode (see Figure 21).The overvoltage detection is provided by Comparator C1 only in the first time during the Soft-Start Phase till the Soft-Start voltage exceeds the threshold of the Comparator C2 at 4.0V and the voltage at pin FB is above 4.8V. When VCC exceeds 16.5V during the overvoltage detection phase C1 can set the Error-Latch and the Burst Phase during Auto Restart Mode is finished earlier. In that case TBurst2 is shorter than TSoft-Start . By means of C2 the normal operation mode is prevented from overvoltage E rro r-L a tch G2 T1 4 .8V C3 FB R FB 6 .5 V Figure 19 FB-Detection Datasheet Preliminary Data Auto Restart Mode 13 August 2001 Target Specification CoolSET™-F2 ICE2A765P ICE2B765P Functional Description detection due to varying of VCC concerning the regulation of the converter output. When the voltage VSoftS is above 4.0V the overvoltage detection by C1 is deactivated. VCC 6 .5 V C1 1 6 .5 V E rro r L a tch G1 R S o ft-S ta rt 4 .0 V C2 S o ftS C S o ft-S ta rt T1 Figure 21 3.8.3 P o w e r U p R e se t Overvoltage Detection Thermal Shut Down Thermal Shut Down is latched by the Error-Latch when junction temperature Tj of the pwm controller is exceeding an internal threshold of 140°C. In that case the IC switches in Auto Restart Mode. Note: All the values which are mentioned in the functional description are typical. Please refer to Electrical Characteristics for min/max limit values. Datasheet Preliminary Data 14 August 2001 CoolSET™-F2 ICE2A765P ICE2B765P Target Specification Electrical Characteristics 4 Electrical Characteristics 4.1 Absolute Maximum Ratings Note: Absolute maximum ratings are defined as ratings, which when being exceeded may lead to destruction of the integrated circuit. For the same reason make sure, that any capacitor that will be connected to pin 6 (VCC) is discharged before assembling the application circuit. Parameter Symbol Limit Values Unit Remarks Tj=110°C min. max. - 650 V Pulsed Drain Current, tp limited ID by max. Tj=150°C - 21 A Avalanche energy, repetitive tAR limited by max. Tj=150°C1) EAR - 0.5 mJ Avalanche current, repetitive tAR limited by max. Tj=150°C IAR - 7 A VCC Supply Voltage VCC -0.3 22 V FB Voltage VFB -0.3 6.5 V SoftS Voltage VSoftS -0.3 6.5 V ISense ISense -0.3 3 V Junction Temperature Tj -40 150 °C Storage Temperature TS -50 150 °C VESD - 2 kV Drain Source Voltage ESD Capability 2) VDS Controller & CoolMOS™ limited by internal circuitry Human Body Model 1) Repetetive avalanche causes additional power losses that can be calculated as PAV=EAR*f 2) Equivalent to discharging a 100pF capacitor through a 1.5 kΩ series resistor 4.2 Thermal Impedance Parameter Symbol Limit Values min. max. Unit Remarks Free standing with no heatsink Thermal Resistance Junction-Ambient RthJA - 74 K/W Junction-Case RthJC - 2.5 K/W Datasheet Preliminary Data 15 August 2001 CoolSET™-F2 ICE2A765P ICE2B765P Target Specification Electrical Characteristics 4.3 Note: Operating Range Within the operating range the IC operates as described in the functional description. Parameter Symbol Limit Values min. max. Unit VCC Supply Voltage VCC VCCoff 21 V Junction Temperature of Controller TJCon -25 130 °C Junction Temperature of CoolMOS™ TJCoolMOS -25 130 °C 4.4 Note: 4.4.1 Remarks limited due to thermal shut down of controller Characteristics The electrical characteristics involve the spread of values guaranteed within the specified supply voltage and junction temperature range TJ from – 25 °C to 125 °C.Typical values represent the median values, which are related to 25°C. If not otherwise stated, a supply voltage of VCC = 15 V is assumed. Supply Section Parameter Symbol Limit Values min. typ. max. Unit Test Condition Start Up Current IVCC1 - 27 55 µA VCC=VCCon -0.1V Supply Current with Inactiv Gate IVCC2 - 5.3 6.6 mA VSoftS = 0 IFB = 0 Supply Current ICE2A765P with activ Gate IVCC3 - 8.5 9.8 mA VSoftS = 5V IFB = 0 ICE2B765P IVCC3 - 7.1 8.3 mA VSoftS = 5V IFB = 0 VCCon VCCoff VCCHY 13 4.5 13.5 8.5 5 14 5.5 V V V VCC Turn-On Threshold VCC Turn-Off Threshold VCC Turn-On/Off Hysteresis 4.4.2 Internal Voltage Reference Parameter Trimmed Reference Voltage Datasheet Preliminary Data Symbol VREF Limit Values min. typ. max. 6.37 6.50 6.63 16 Unit Test Condition V measured at pin FB August 2001 CoolSET™-F2 ICE2A765P ICE2B765P Target Specification Electrical Characteristics 4.4.3 Control Section Parameter Symbol Limit Values min. typ. max. Unit Test Condition Oscillator Frequency ICE2A765P fOSC1 93 100 107 kHz VFB = 4V Oscillator Frequency ICE2B765P fOSC3 62 67 72 kHz VFB = 4V Reduced Osc. Frequency ICE2A765P fOSC2 - 21.5 - kHz VFB = 1V Reduced Osc. Frequency ICE2B765P fOSC4 - 20 - kHz VFB = 1V Frequency Ratio fosc1/fosc2 ICE2A765P 4.5 4.65 4.9 Frequency Ratio fosc3/fosc4 ICE2B765P 3.18 3.35 3.53 Max Duty Cycle Dmax 0.67 0.72 0.77 Min Duty Cycle Dmin 0 - - PWM-OP Gain AV 3.45 3.65 3.85 Max. Level of Voltage Ramp VMax-Ramp - 0.80 - V VFB Operating Range Min Level VFBmin 0.3 - - V VFB Operating Range Max level VFBmax - - 4.6 V Feedback Resistance RFB 3.0 3.7 4.9 kΩ Soft-Start Resistance RSoft-Start 42 50 62 kΩ 4.4.4 VFB < 0.3V Protection Unit Parameter Symbol Limit Values min. typ. max. Unit Test Condition Over Load & Open Loop Detection Limit VFB2 4.65 4.8 4.95 V VSoftS > 5.5V Activation Limit of Overload & Open Loop Detection VSoftS1 5.15 5.3 5.46 V VFB > 5V Deactivation Limit of Overvoltage Detection VSoftS2 3.88 4.0 4.12 V VFB > 5V VCC > 17.5V Overvoltage Detection Limit VVCC1 16 16.5 17.2 V VSoftS < 3.8V VFB > 5V Latched Thermal Shutdown TjSD 130 140 150 °C guaranteed by design Spike Blanking tSpike - 5 - µs Datasheet Preliminary Data 17 August 2001 CoolSET™-F2 ICE2A765P ICE2B765P Preliminary Specification Electrical Characteristics 4.4.5 Current Limiting Parameter Symbol Limit Values min. typ. max. Unit Test Condition dVsense / dt = 0.6V/µs Peak Current Limitation (incl. Propagation Delay Time) (see Figure 7) Vcsth 0.95 1.00 1.05 V Leading Edge Blanking tLEB - 220 - ns 4.4.6 CoolMOS™ Section Parameter Symbol Drain Source Breakdown Voltage V(BR)DSS Limit Values Unit Test Condition min. typ. max. 600 650 - - V V Tj=25°C Tj=110°C Effective output capacitance, energy related Co(er) - 30 - pF VDS =0V to 640V Drain Source On-Resistance RDSon - 0.45 0.95 0.54 1.14 Ω Ω Tj=25°C Tj=125°C - 0.5 - µA VVCC=0V 1) Zero Gate Voltage Drain Current IDSS Rise Time trise - 50 - ns Fall Time tfall - 301) - ns 1) Measured in a Typical Flyback Converter Application Datasheet Preliminary Data 18 August 2001 Preliminary Specification CoolSET™-F2 ICE2A765P ICE2B765P Typical Performance Characteristics Typical Performance Characteristics 13,58 [V] CCon 38 VCC Turn-On Threshold V 36 34 32 PI-001-190101 Start Up Current I VCC1 [µA] 40 30 28 26 24 22 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125 13,56 13,54 13,52 PI-004-190101 5 13,50 13,48 13,46 13,44 13,42 -25 -15 -5 5 Junction Temperature [°C] Start Up Current IVCC1 vs. Tj Figure 25 [V] VCCoff 5,7 VCC Turn-Off Threshold V 5,5 5,3 PI-003-190101 Supply Current I VCC2 [mA] 5,9 5,1 4,9 4,7 4,5 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125 VCC Turn-On Threshold VVCCon vs. Tj 8,67 8,64 8,61 8,58 8,55 PI-005-190101 Figure 22 8,52 8,49 8,46 8,43 8,40 -25 -15 -5 5 Junction Temperature [°C] Figure 26 9,0 CCHY VCC Turn-On/Off Hysteresis V 8,6 ICE2A765P 8,2 8,0 7,8 PI-002-190101 Supply Current I VCC3 [mA] 8,8 7,6 7,4 7,2 ICE2B765P 7,0 6,8 6,6 6,4 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125 5,10 5,07 5,04 5,01 4,98 4,95 4,92 4,89 4,86 4,83 -25 -15 -5 Junction Temperature [°C] Figure 24 5 15 25 35 45 55 65 75 85 95 105 115 125 Junction Temperature [°C] Supply Current IVCC3 vs. Tj Datasheet Preliminary Data VCC Turn-Off Threshold VVCCoff vs. Tj PI-006-190101 Static Supply Current IVCC2 vs. Tj 8,4 15 25 35 45 55 65 75 85 95 105 115 125 Junction Temperature [°C] [V] Figure 23 15 25 35 45 55 65 75 85 95 105 115 125 Junction Temperature [°C] Figure 27 19 VCC Turn-On/Off HysteresisVVCCHY vs. Tj August 2001 CoolSET™-F2 ICE2A765P ICE2B765P Preliminary Specification OSC2 6,54 6,53 Reduced Osc. Frequency f 6,52 6,51 6,49 6,48 6,47 6,46 6,45 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125 21,8 21,6 ICE2A765P 21,4 21,2 21,0 20,8 20,6 20,4 20,2 20,0 -25 -15 -5 5 Junction Temperature [°C] Figure 28 Trimmed Reference VREF vs. Tj Figure 31 [kHz] OSC4 101,5 101,0 ICE2A765P Reduced Osc. Frequency f 100,5 100,0 PI-008-190101 Oscillator Frequency f OSC1 [kHz] 102,0 99,5 99,0 98,5 98,0 97,5 97,0 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125 Reduced Osc. Frequency fOSC2 vs. Tj 21,0 20,8 20,6 20,4 20,2 20,0 ICE2B765P 19,8 19,6 19,4 19,2 19,0 -25 -15 -5 5 Junction Temperature [°C] Figure 32 4,75 69,5 4,73 OSC1 /f OSC2 70,0 69,0 68,5 ICE2B765P Frequency Ratio f 67,5 67,0 66,5 66,0 65,5 65,0 64,5 64,0 -25 -15 -5 5 4,71 4,69 4,67 4,63 4,61 4,59 4,57 4,55 -25 -15 -5 15 25 35 45 55 65 75 85 95 105 115 125 5 15 25 35 45 55 65 75 85 95 105 115 125 Junction Temperature [°C] Oscillator Frequency fOSC3 vs. Tj Datasheet Preliminary Data ICE2A765P 4,65 Junction Temperature [°C] Figure 30 Reduced Osc. Frequency fOSC4 vs. Tj PI-010-190101 Oscillator Frequency fOSC1 vs. Tj 68,0 15 25 35 45 55 65 75 85 95 105 115 125 Junction Temperature [°C] PI-008a-190101 Oscillator Frequency f OSC3 [kHz] Figure 29 15 25 35 45 55 65 75 85 95 105 115 125 Junction Temperature [°C] PI-009a-190101 6,50 22,0 PI-009-190101 [kHz] 6,55 PI-007-190101 Trimmed Reference Voltage V REF [V] Typical Performance Characteristics Figure 33 20 Frequency Ratio fOSC1 / fOSC2 vs. Tj August 2001 CoolSET™-F2 ICE2A765P ICE2B765P Preliminary Specification Typical Performance Characteristics 3,41 3,39 3,37 ICE2B765P 3,35 3,33 3,31 3,29 3,27 3,25 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125 3,95 3,90 3,85 3,80 PI-013-190101 Feedback Resistance RFB [kOhm] 4,00 3,43 PI-010a-190101 Frequency Ratio f OSC3 /f OSC4 3,45 3,75 3,70 3,65 3,60 3,55 3,50 -25 -15 -5 5 Junction Temperature [°C] Figure 37 0,730 0,728 0,724 0,722 PI-011-190101 Max. Duty Cycle 0,726 0,720 0,718 0,716 0,714 0,712 0,710 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125 Feedback Resistance RFB vs. Tj 58 56 54 52 50 PI-014-190101 Frequency Ratio fOSC3 / fOSC4 vs. Tj Soft-Start Resistance R Soft-Start [kOhm] Figure 34 48 46 44 42 40 -25 -15 -5 5 15 Figure 38 4,85 3,69 4,84 Detection Limit V FB2 [V] 3,70 3,67 3,66 PI-012-190101 PWM-OP Gain A V 3,68 3,64 3,63 3,62 45 55 65 75 85 95 105 115 125 Soft-Start Resistance RSoft-Start vs. Tj 4,83 4,82 4,81 4,80 4,79 4,78 4,77 4,76 3,61 3,60 -25 -15 -5 5 4,75 -25 -15 -5 15 25 35 45 55 65 75 85 95 105 115 125 PWM-OP Gain AV vs. Tj Datasheet Preliminary Data 5 15 25 35 45 55 65 75 85 95 105 115 125 Junction Temperature [°C] Junction Temperature [°C] Figure 36 35 PI-015-190101 Max. Duty Cycle vs. Tj 3,65 25 Junction Temperature [°C] Junction Temperature [°C] Figure 35 15 25 35 45 55 65 75 85 95 105 115 125 Junction Temperature [°C] Figure 39 21 Detection Limit VFB2 vs. Tj August 2001 Preliminary Specification CoolSET™-F2 ICE2A765P ICE2B765P Typical Performance Characteristics 1,010 Peak Current Limitation V 5,33 5,32 5,31 5,30 5,29 5,28 5,27 5,26 5,25 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125 1,008 1,006 1,004 1,002 PI-019-190101 [V] csth 5,34 PI-016-190101 Detection Limit V Soft-Start1 [V] 5,35 1,000 0,998 0,996 0,994 0,992 0,990 -25 -15 -5 5 Detection Limit VSoft-Start1 vs. Tj Figure 43 [ns] 280 4,04 LEB 4,03 Leading Edge Blanking t 4,02 4,01 PI-017-190101 Detection Limit V Soft-Start2 [V] 4,05 Peak Current Limitation Vcsth vs. Tj 4,00 3,99 3,98 3,97 3,96 3,95 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125 270 260 250 240 PI-020-190101 Figure 40 230 220 210 200 190 180 -25 -15 -5 5 Junction Temperature [°C] Detection Limit VSoft-Start2 vs. Tj Figure 44 Leading Edge Blanking VVCC1 vs. Tj 700 16,75 16,70 16,65 16,60 16,55 16,50 16,45 16,40 16,35 16,30 16,25 16,20 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125 680 660 640 620 600 580 560 540 520 500 -25 -15 -5 Junction Temperature [°C] 5 15 25 35 45 55 65 75 85 95 105 115 125 Junction Temperature [°C] Overvoltage Detection Limit VVCC1 vs. Tj Datasheet Preliminary Data PI-021-190101 Breakdown Voltage V (BR)DSS [V] 16,80 Figure 42 15 25 35 45 55 65 75 85 95 105 115 125 Junction Temperature [°C] PI-018-190101 Overvoltage Detection Limit V VCC1 [V] Figure 41 15 25 35 45 55 65 75 85 95 105 115 125 Junction Temperature [°C] Junction Temperature [°C] Figure 45 22 Breakdown Voltage VBR(DSS) vs. Tj August 2001 Target Specification CoolSET™-F2 ICE2A765P ICE2B765P Typical Performance Characteristics 1,2 1,0 0,9 0,8 0,7 PI-022-190101 On-Resistance R dson [Ohm] 1,1 0,6 0,5 0,4 0,3 0,2 0,1 0,0 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125 Junction Temperature [°C] Figure 46 Drain Source On-Resistance RDSon vs. Tj Datasheet Preliminary Data 23 August 2001 CoolSET™-F2 ICE2A765P ICE2B765P Preliminary Specification Outline Dimension Outline Dimension 9.9 ±0.2 A 9.5 ±0.2 B 7.5 4.4 1.3 +0.1 -0.02 2.8 ±0.2 3.7 -0.15 13 15.6 ±0.3 0.05 C 0...0.15 10.2 ±0.3 1) 8.6 ±0.3 17.5 ±0.3 6.6 0.5 ±0.1 7x 0.6 ±0.1 6x 1.27 3.3 ±0.3 P-TO220-6-3 9.2 ±0.2 6 0.25 2.4 M A B C 4.5 ±0.3 8.4 ±0.3 1) Shear and punch direction no burrs this surface. Back side, heatsink contour All metal surfaces tin plated, except area of cut. Figure 47 Dimensions in mm Datasheet Preliminary Data 24 August 2001 Total Quality Management Qualität hat für uns eine umfassende Bedeutung. Wir wollen allen Ihren Ansprüchen in der bestmöglichen Weise gerecht werden. Es geht uns also nicht nur um die Produktqualität – unsere Anstrengungen gelten gleichermaßen der Lieferqualität und Logistik, dem Service und Support sowie allen sonstigen Beratungs- und Betreuungsleistungen. Dazu gehört eine bestimmte Geisteshaltung unserer Mitarbeiter. Total Quality im Denken und Handeln gegenüber Kollegen, Lieferanten und Ihnen, unserem Kunden. Unsere Leitlinie ist jede Aufgabe mit „Null Fehlern“ zu lösen – in offener Sichtweise auch über den eigenen Arbeitsplatz hinaus – und uns ständig zu verbessern. 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