NUP1301ML3T1 Low Capacitance Diode Array for ESD Protection in a Single Data Line NUP1301ML3T1 is a MicroIntegration device designed to provide protection for sensitive components from possible harmful electrical transients; for example, ESD (electrostatic discharge). Features • • • • 3 CATHODE/ANODE Machine Model = Class C Human Body Model = Class 3B Protection for IEC61000−4−2 (Level 4) 8.0 kV (Contact) 15 kV (Air) Ensures Data Line Speed and Integrity Fewer Components and Less Board Space Direct the Transient to Either Positive Side or to the Ground Pb−Free Package is Available 3 1 2 SOT−23 CASE 318 STYLE 11 Applications • • • • • • • CATHODE 2 ANODE 1 • Low Capacitance (0.9 pF Maximum) • Single Package Integration Design • Provides ESD Protection for JEDEC Standards JESD22 • http://onsemi.com MARKING DIAGRAM T1/E1 Secondary IC Protection T3/E3 Secondary IC Protection HDSL, IDSL Secondary IC Protection Video Line Protection Microcontroller Input Protection Base Stations I2C Bus Protection 53 M 1 53 = Device Code M = Date Code MAXIMUM RATINGS (Each Diode) (TJ = 25°C unless otherwise noted) Symbol Value Unit Reverse Voltage VR 70 Vdc Forward Current IF 215 mAdc Rating Peak Forward Surge Current IFM(surge) 500 mAdc Repetitive Peak Reverse Voltage VRRM 70 V Average Rectified Forward Current (Note 1) (averaged over any 20 ms period) IF(AV) 715 mA Repetitive Peak Forward Current IFRM 450 mA Non−Repetitive Peak Forward Current t = 1.0 s t = 1.0 ms t = 1.0 S IFSM ORDERING INFORMATION Device NUP1301ML3T1 NUP1301ML3T1G Package Shipping† SOT−23 3000 / Tape & Reel SOT−23 3000 / Tape & Reel (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. A 2.0 1.0 0.5 Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. FR−5 = 1.0 0.75 0.062 in. Semiconductor Components Industries, LLC, 2005 January, 2005 − Rev. 4 1 Publication Order Number: NUP1301ML3T1/D NUP1301ML3T1 THERMAL CHARACTERISTICS Characteristic Symbol Max Unit RJA 625 °C/W Lead Solder Temperature Maximum 10 Seconds Duration TL 260 °C Junction Temperature TJ −65 to 150 °C Storage Temperature Tstg −65 to +150 °C Thermal Resistance Junction−to−Ambient ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) (Each Diode) Characteristic Symbol Min Typ Max Unit V(BR) 70 − − Vdc IR − − − − − − 2.5 30 50 Adc CD − − 0.9 pF VF − − − − − − − − 715 855 1000 1250 mVdc OFF CHARACTERISTICS Reverse Breakdown Voltage (I(BR) = 100 A) Reverse Voltage Leakage Current (VR = 70 Vdc) (VR = 25 Vdc, TJ = 150°C) (VR = 70 Vdc, TJ = 150°C) Diode Capacitance (between I/O and ground) (VR = 0, f = 1.0 MHz) Forward Voltage (IF = 1.0 mAdc) (IF = 10 mAdc) (IF = 50 mAdc) (IF = 150 mAdc) 2. FR−5 = 1.0 0.75 0.062 in. 3. Alumina = 0.4 0.3 0.024 in, 99.5% alumina. http://onsemi.com 2 NUP1301ML3T1 ESD Input Signal Figure 1. ESD Test Circuit APPLICATION NOTE Electrostatic Discharge surge to the supply rail or ground. This method has several advantages including low loading capacitance, fast response time, and inherent bidirectionality (within the reference voltages). See Figure 1 for the test circuit used to verify the ESD rating for this device. A common means of protecting high−speed data lines is to employ low−capacitance diode arrays in a rail−to−rail configuration. Two devices per line are connected between two fixed voltage references such as VCC and ground. When the transient voltage exceeds the forward voltage (VF) drop of the diode plus the reference voltage, the diodes direct the http://onsemi.com 3 NUP1301ML3T1 PACKAGE DIMENSIONS SOT−23 (TO−236) CASE 318−08 ISSUE AK NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. 318−01 THRU −07 AND −09 OBSOLETE, NEW STANDARD 318−08. A L 3 1 V B S 2 DIM A B C D G H J K L S V G C D H K J INCHES MIN MAX 0.1102 0.1197 0.0472 0.0551 0.0350 0.0440 0.0150 0.0200 0.0701 0.0807 0.0005 0.0040 0.0034 0.0070 0.0140 0.0285 0.0350 0.0401 0.0830 0.1039 0.0177 0.0236 MILLIMETERS MIN MAX 2.80 3.04 1.20 1.40 0.89 1.11 0.37 0.50 1.78 2.04 0.013 0.100 0.085 0.177 0.35 0.69 0.89 1.02 2.10 2.64 0.45 0.60 STYLE 11: PIN 1. ANODE 2. CATHODE 3. CATHODE−ANODE SOLDERING FOOTPRINT* 0.95 0.037 0.95 0.037 2.0 0.079 0.9 0.035 0.8 0.031 SCALE 10:1 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. MicroIntegration is a trademark of Semiconductor Components Industries, LLC (SCILLC). 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