MAX1720 Switched Capacitor Voltage Inverter The MAX1720 is a CMOS charge pump voltage inverter that is designed for operation over an input voltage range of 1.15 V to 5.5 V with an output current capability in excess of 50 mA. The operating current consumption is only 67 A, and a power saving shutdown input is provided to further reduce the current to a mere 0.4 A. The device contains a 12 kHz oscillator that drives four low resistance MOSFET switches, yielding a low output resistance of 26 and a voltage conversion efficiency of 99%. This device requires only two external 10F capacitors for a complete inverter making it an ideal solution for numerous battery powered and board level applications. The MAX1720 is available in the space saving TSOP–6 (SOT–23–6) package. http://onsemi.com MARKING DIAGRAM 6 TSOP–6 SN SUFFIX CASE 318G 6 EACYW 1 1 Features • • • • • • • EAC = Device Code Y = Year W = Work Week Operating Voltage Range of 1.15 V to 5.5 V Output Current Capability in Excess of 50 mA Low Current Consumption of 67 A Power Saving Shutdown Input for a Reduced Current of 0.4 A Operation at 12 kHz Low Output Resistance of 26 Space Saving TSOP–6 (SOT–23–6) Package PIN CONNECTIONS Typical Applications • • • • • • • • LCD Panel Bias Cellular Telephones Pagers Personal Digital Assistants Electronic Games Digital Cameras Camcorders Hand Held Instruments Vout 1 6 C+ Vin 2 5 SHDN C– 3 4 GND (Top View) ORDERING INFORMATION Device Package Shipping MAX1720EUT TSOP–6 3000 Tape & Reel –Vout Vin 1 6 2 5 3 4 This device contains 77 active transistors. Figure 1. Typical Application Semiconductor Components Industries, LLC, 2001 April, 2001 – Rev. 1 1 Publication Order Number: MAX1720/D MAX1720 MAXIMUM RATINGS* ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ Symbol Value Unit Input Voltage Range (Vin to GND) Rating Vin –0.3 to 6.0 V Output Voltage Range (Vout to GND) Vout –6.0 to 0.3 V Output Current (Note 1.) Iout 100 mA Output Short Circuit Duration (Vout to GND, Note 1.) tSC Indefinite sec Operating Junction Temperature TJ 150 °C Power Dissipation and Thermal Characteristics Thermal Resistance, Junction to Air Maximum Power Dissipation @ TA = 70°C RθJA PD 256 313 °C/W mW Storage Temperature Tstg –55 to 150 °C *ESD Ratings ESD Machine Model Protection up to 200 V, Class B ESD Human Body Model Protection up to 2000 V, Class 2 ELECTRICAL CHARACTERISTICS (Vin = 5.0 V, C1 = 10 µF, C2 = 10 µF, TA = –40°C to 85°C, typical values shown are for TA = 25°C unless otherwise noted. See Figure 14 for Test Setup.) Characteristic Symbol Min Typ Max Operating Supply Voltage Range (SHDN = Vin, RL = 10 k) Vin 1.5 to 5.5 1.15 to 6.0 – Supply Current Device Operating (SHDN = 5.0 V, RL = ) TA = 25°C TA = 85°C Iin Unit V µA – – 67 72 90 100 – – 0.4 1.6 – – 8.4 6.0 12 – 15.6 21 µA Supply Current Device Shutdown (SHDN = 0 V) TA = 25°C TA = 85°C ISHDN Oscillator Frequency TA = 25°C TA = –40°C to 85°C fOSC Output Resistance (Iout = 25 mA, Note 2.) Rout – 26 50 Ω Voltage Conversion Efficiency (RL = ) VEFF 99 99.9 – % Power Conversion Efficiency (RL = 1.0 k) PEFF – 96 – % – – 0.6 Vin 0.5 Vin – – Shutdown Input Threshold Voltage (Vin = 1.5 V to 5.5 V) High State, Device Operating Low State, Device Shutdown Vth(SHDN) Shutdown Input Bias Current High State, Device Operating, SHDN = 5.0 V TA = 25°C TA = 85°C Low State, Device Shutdown, SHDN = 0 V TA = 25°C TA = 85°C Wake–Up Time from Shutdown (RL = 1.0 k) kHz V pA IIH – – 5.0 100 – – – – 5.0 100 – – – 1.2 – IIL tWKUP ms 1. Maximum Package power dissipation limits must be observed to ensure that the maximum junction temperature is not exceeded. TJ TA (PD RJA) 2. Capacitors C1 and C2 contribution is approximately 20% of the total output resistance. http://onsemi.com 2 MAX1720 90 Figure 14 Test Setup TA = 25°C 90 Rout, OUTPUT RESISTANCE (Ω) Rout, OUTPUT RESISTANCE (Ω) 100 80 70 60 50 40 30 20 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 Figure 14 Test Setup 80 Vin = 1.5 V 70 Vin = 2.0 V 60 50 Vin = 3.3 V 40 30 Vin = 5.0 V 20 –50 5.5 Vin, SUPPLY VOLTAGE (V) Vout, OUTPUT VOLTAGE RIPPLE (mVp–p) Iout, OUTPUT CURRENT (mA) 30 Vin = 4.75 V Vout = –4.00 V 20 Vin = 3.15 V Vout = –2.50 V 10 Vin = 1.90 V Vout = –1.50 V 5 Figure 14 Test Setup TA = 25°C 0 10 0 20 30 Vin = 4.75 V Vout = –4.00 V 300 250 200 Vin = 3.15 V Vout = –2.50 V 150 Vin = 1.90 V Vout = –1.50 V 100 50 0 10 20 30 40 C1, C2, C3, CAPACITANCE (µF) C1, C2, C3, CAPACITANCE (µF) Figure 4. Output Current vs. Capacitance Figure 5. Output Voltage Ripple vs. Capacitance Figure 14 Test Setup RL = ∞ 70 TA = 85°C 60 TA = 25°C 50 TA = –40°C 40 2.0 2.5 3.0 3.5 4.0 100 Figure 14 Test Setup TA = 25°C 350 0 fOSC, OSCILLATOR FREQUENCY (kHz) Iin, SUPPLY CURRENT (µA) 75 400 50 40 80 30 1.5 50 25 Figure 3. Output Resistance vs. Ambient Temperature 35 15 0 TA, AMBIENT TEMPERATURE (°C) Figure 2. Output Resistance vs. Supply Voltage 25 –25 4.5 5.0 13.0 Figure 14 Test Setup 12.5 Vin = 5.0 V 12.0 11.5 11.0 Vin = 1.5 V 10.5 10.0 –50 Vin = 3.3 V –25 0 25 50 75 Vin, SUPPLY VOLTAGE (V) TA, AMBIENT TEMPERATURE (°C) Figure 6. Supply Current vs. Supply Voltage Figure 7. Oscillator Frequency vs. Ambient Temperature http://onsemi.com 3 50 100 , POWER CONVERSION EFFICIENCY (%) MAX1720 Vout, OUTPUT VOLTAGE (V) 0.0 100 Figure 14 Test Setup TA = 25°C Vin = 2.0 V –1.0 Vin = 3.3 V –2.0 –3.0 Vin = 5.0 V –4.0 –5.0 –6.0 10 20 30 40 50 90 80 70 Vin = 1.5 V 60 Vin = 2.0 V 50 40 0 10 20 30 40 Figure 8. Output Voltage vs. Output Current Figure 9. Power Conversion Efficiency vs. Output Current ISHDN, SHUTDOWN SUPPLY CURRENT (µA) Iout, OUTPUT CURRENT (mA) Figure 14 Test Setup Vin = 3.3 V Iout = 5.0 mA TA = 25°C 1.50 Vin = 5.0 V RL = 10 kΩ SHDN = GND Vin = 3.3 V 1.25 1.00 0.75 Vin = 1.5 V 0.50 0.25 –50 –25 0 25 50 75 TIME = 25 µs / Div. TA, AMBIENT TEMPERATURE (°C) Figure 10. Output Voltage Ripple and Noise Figure 11. Shutdown Supply Current vs. Ambient Temperature SHDN = 5.0V/Div. WAKEUP TIME FROM SHUTDOWN TA = 25°C 4.5 4.0 Low State, Device Shutdown 3.5 3.0 High State, Device Operating 2.5 2.0 1.5 0.5 1.0 1.5 2.0 2.5 Vin = 5.0 V RL = 1.0 k TA = 25°C Vout = 1.0 V/Div. 3.0 TIME = 500 µs / Div. Vth(SHND), SHUTDOWN INPUT VOLTAGE THRESHOLD (V) Figure 12. Supply Voltage vs. Shutdown Input Voltage Threshold Figure 13. Wakeup Time From Shutdown http://onsemi.com 4 50 1.75 5.0 Vin, SUPPLY VOLTAGE (V) Vin = 5.0 V Vin = 3.3 V Iout, OUTPUT CURRENT (mA) OUTPUT VOLTAGE RIPPLE AND NOISE = 10 mV / Div. AC COUPLED 0 Figure 14 Test Setup TA = 25°C 100 MAX1720 Charge Pump Efficiency –Vout C + 2 6 1 The overall power conversion efficiency of the charge pump is affected by four factors: 1. Losses from power consumed by the internal oscillator, switch drive, etc. (which vary with input voltage, temperature and oscillator frequency). 2. I2R losses due to the on–resistance of the MOSFET switches on–board the charge pump. 3. Charge pump capacitor losses due to Equivalent Series Resistance (ESR). 4. Losses that occur during charge transfer from the commutation capacitor to the output capacitor when a voltage difference between the two capacitors exists. Most of the conversion losses are due to factors 2, 3 and 4. These losses are given by Equation 1. RL OSC Vin + C3 2 5 3 4 + C1 C1 = C2 = C3 = 10 F Figure 14. Test Setup/Voltage Inverter DETAILED OPERATING DESCRIPTION The MAX1720 charge pump converter inverts the voltage applied to the Vin pin. Conversion consists of a two–phase operation (Figure 15). During the first phase, switches S2 and S4 are open and S1 and S3 are closed. During this time, C1 charges to the voltage on Vin and load current is supplied from C2. During the second phase, S2 and S4 are closed, and S1 and S3 are open. This action connects C1 across C2, restoring charge to C2. S1 P I out 2 R out I out 2 LOSS(2,3,4) 1 (f OSC )C1 8R SWITCH 4ESR C1 ESR C2 (eq. 1) The 1/(fOSC)(C1) term in Equation 1 is the effective output resistance of an ideal switched capacitor circuit (Figures 16 and 17). The losses due to charge transfer above are also shown in Equation 2. The output voltage ripple is given by Equation 3. S2 Vin C1 PLOSS [ 0.5C1 (Vin 2 Vout 2) 0.5C2 (VRIPPLE 2 2VoutVRIPPLE)] fOSC (eq. 2) C2 S3 S4 V –Vout RIPPLE I out (f OSC )(C 2) 2(I out)(ESR ) C2 (eq. 3) From Osc f Vin Vout Figure 15. Ideal Switched Capacitor Charge Pump C1 C2 RL APPLICATIONS INFORMATION Output Voltage Considerations The MAX1720 performs voltage conversion but does not provide regulation. The output voltage will drop in a linear manner with respect to load current. The value of this equivalent output resistance is approximately 26 Ω nominal at 25°C with Vin = 5.0 V. Vout is approximately –5.0 V at light loads, and drops according to the equation below: Figure 16. Ideal Switched Capacitor Model REQUIV Vin Vout R VDROP Iout Rout EQUIV 1 f C1 C2 RL Vout (Vin VDROP) Figure 17. Equivalent Output Resistance http://onsemi.com 5 MAX1720 Capacitor Selection switching internals in the device. If the device is loaded from Vout to GND, it is recommended that a large value capacitor (at least equal to C1) be connected from Vin to GND. If the device is loaded from Vin to Vout, a small (0.7 µF) capacitor between the pins is sufficient. In order to maintain the lowest output resistance and output ripple voltage, it is recommended that low ESR capacitors be used. Additionally, larger values of C1 will lower the output resistance and larger values of C2 will reduce output voltage ripple. (See Equation 3). Table 1 shows various values of C1, C2 and C3 with the corresponding output resistance values at 25°C. Table 2 shows the output voltage ripple for various values of C1, C2 and C3. The data in Tables 1 and 2 was measured not calculated. Voltage Inverter C1 = C2 = C3 (F) Rout () The most common application for a charge pump is the voltage inverter (Figure 14). This application uses two or three external capacitors. The C1 (pump capacitor) and C2 (output capacitor) are required. The input bypass capacitor, C3, may be necessary depending on the application. The output is equal to –Vin plus any voltage drops due to loading. Refer to Tables 1 and 2 for capacitor selection. The test setup used for the majority of the characterization is shown in Figure 14. 0.7 129.1 Layout Considerations 1.4 69.5 3.3 37.0 7.3 26.5 10 25.9 As with any switching power supply circuit, good layout practice is recommended. Mount components as close together as possible to minimize stray inductance and capacitance. Also, use a large ground plane to minimize noise leakage into other circuitry. 24 24.1 50 24 Table 1. Output Resistance vs. Capacitance (C1 = C2 = C3), Vin = 4.75 V and Vout = –4.0 V Capacitor Resources Selecting the proper type of capacitor can reduce switching loss. Low ESR capacitors are recommended. The MAX1720 was characterized using the capacitors listed in Table 3. This list identifies low ESR capacitors for the voltage inverter application. Table 2. Output Voltage Ripple vs. Capacitance (C1 = C2 = C3), Vin = 4.75 V and Vout = –4.0 V C1 = C2 = C3 (F) Output Voltage Ripple (mV) 0.7 382 Manufacturer/Contact 1.4 342 3.3 255 AVX 843–448–9411 www.avxcorp.com 7.3 164 10 132 24 59 50 38 Table 3. Capacitor Types Cornell Dubilier 508–996–8561 www.cornell–dubilier.com ll d bili Input Supply Bypassing The input voltage, Vin should be capacitively bypassed to reduce AC impedance and minimize noise effects due to the TPS ESRD Sanyo/Os–con 619–661–6835 www.sanyovideo.com/oscon.htm id / ht SN SVP Vishay 603–224–1961 www.vishay.com i h 593D 594 http://onsemi.com 6 Part Types/Series MAX1720 –Vout 6 1 OSC + Vin 2 + 5 + 3 4 Capacitors = 10 µF Figure 18. Voltage Inverter The MAX1720 primary function is a voltage inverter. The device will convert 5.0 V into –5.0 V with light loads. Two capacitors are required for the inverter to function. A third capacitor, the input bypass capacitor, may be required depending on the power source for the inverter. The performance for this device is illustrated below. 0 Vout, OUTPUT VOLTAGE (V) TA = 25°C –1.0 Vin = 3.3 V –2.0 –3.0 Vin = 5.0 V –4.0 –5.0 –6.0 0 10 20 30 40 Iout, OUTPUT CURRENT (mA) Figure 19. Inverter Load Regulation, Output Voltage vs. Output Current http://onsemi.com 7 50 MAX1720 Vin –Vout 6 1 + + OSC + 2 6 1 OSC 5 + 2 5 3 4 + 3 4 Capacitors = 10 µF Figure 20. Cascaded Devices for Increased Negative Output Voltage Two or more devices can be cascaded for increased output voltage. Under light load conditions, the output voltage is approximately equal to –Vin times the number of stages. The converter output resistance increases dramatically with each additional stage. This is due to a reduction of input voltage to each successive stage as the converter output is loaded. Note that the ground connection for each successive stage must connect to the negative output of the previous stage. The performance characteristics for a converter consisting of two cascaded devices are shown below. 0 Vout, OUTPUT VOLTAGE (V) TA = 25°C –2.0 B –4.0 A –6.0 –8.0 –10.0 0 10 20 30 40 Iout, OUTPUT CURRENT (mA) Figure 21. Cascade Load Regulation, Output Voltage vs. Output Current http://onsemi.com 8 Curve Vin (V) Rout (Ω) A 5.0 140 B 3.0 174 MAX1720 6 1 OSC Vin + 2 –Vout 5 + + 3 + + 4 Capacitors = 10 µF Figure 22. Negative Output Voltage Doubler A single device can be used to construct a negative voltage doubler. The output voltage is approximately equal to –2Vin minus the forward voltage drop of each external diode. The performance characteristics for the above converter are shown below. Note that curves A and C show the circuit performance with economical 1N4148 diodes, while curves B and D are with lower loss MBRA120E Schottky diodes. Vout, OUTPUT VOLTAGE (V) 0 TA = 25°C –2.0 A –4.0 B Curve Vin (V) All Diodes Rout () A 3.0 1N4148 124 B 3.0 MBRA120E 115 C 5.0 1N4148 96 D 5.0 MBRA120E 94 C –6.0 –8.0 D –10.0 0 10 20 30 40 Iout, OUTPUT CURRENT (mA) Figure 23. Doubler Load Regulation, Output Voltage vs. Output Current http://onsemi.com 9 MAX1720 6 1 OSC Vin 2 + –Vout 5 + + 3 + + + + 4 Capacitors = 10 µF Figure 24. Negative Output Voltage Tripler A single device can be used to construct a negative voltage tripler. The output voltage is approximately equal to –3Vin minus the forward voltage drop of each external diode. The performance characteristics for the above converter are shown below. Note that curves A and C show the circuit performance with economical 1N4148 diodes, while curves B and D are with lower loss MBRA120E Schottky diodes. 0 Vout, OUTPUT VOLTAGE –2.0 A B –4.0 –6.0 C –8.0 D –10.0 –12.0 –14.0 TA = 25°C –16.0 0 10 20 30 40 50 Iout, OUTPUT CURRENT Figure 25. Tripler Load Regulation, Output Voltage vs. Output Current http://onsemi.com 10 Curve Vin (V) All Diodes Rout () A 3.0 1N4148 267 B 3.0 MBRA120E 250 C 5.0 1N4148 205 D 5.0 MBRA120E 195 MAX1720 6 1 OSC + Vin + 2 5 3 4 + Vout Capacitors = 10 µF Figure 26. Positive Output Voltage Doubler A single device can be used to construct a positive voltage doubler. The output voltage is approximately equal to 2Vin minus the forward voltage drop of each external diode. The performance characteristics for the above converter are shown below. Note that curves A and C show the circuit performance with economical 1N4148 diodes, while curves B and D are with lower loss MBRA120E Schottky diodes. 10.0 Vout, OUTPUT VOLTAGE (V) D 8.0 C 6.0 Curve Vin (V) All Diodes Rout () A 3.0 1N4148 32 B 3.0 MBRA120E 26 C 5.0 1N4148 26 D 5.0 MBRA120E 21 B 4.0 A 2.0 TA = 25°C 0 0 10 20 30 40 Iout, OUTPUT CURRENT (mA) Figure 27. Doubler Load Regulation, Output Voltage vs. Output Current http://onsemi.com 11 MAX1720 6 1 OSC + Vin 2 + + Vout 5 + 3 + 4 Capacitors = 10 µF Figure 28. Positive Output Voltage Tripler A single device can be used to construct a positive voltage tripler. The output voltage is approximately equal to 3Vin minus the forward voltage drop of each external diode. The performance characteristics for the above converter are shown below. Note that curves A and C show the circuit performance with economical 1N4148 diodes, while curves B and D are with lower loss MBRA120E Schottky diodes. 14.0 Vout, OUTPUT VOLTAGE (V) D 12.0 10.0 C Curve Vin (V) All Diodes Rout () A 3.0 1N4148 111 B 3.0 MBRA120E 97 C 5.0 1N4148 85 D 5.0 MBRA120E 75 8.0 6.0 B 4.0 2.0 A TA = 25°C 0 0 10 20 30 40 Iout, OUTPUT CURRENT (mA) Figure 29. Tripler Load Regulation, Output Voltage vs. Output Current http://onsemi.com 12 MAX1720 –Vout + 6 1 OSC Vin 2 + 5 + 100 k 3 4 Capacitors = 10 µF Figure 30. Load Regulated Negative Output Voltage A zener diode can be used with the shutdown input to provide closed loop regulation performance. This significantly reduces the converter’s output resistance and dramatically enhances the load regulation. For closed loop operation, the desired regulated output voltage must be lower in magnitude than –Vin. The output will regulate at a level of –VZ + Vth(SHDN). Note that the shutdown input voltage threshold is typically 0.5 Vin and therefore, the regulated output voltage will change proportional to the converter’s input. This characteristic will not present a problem when used in applications with constant input voltage. In this case the zener breakdown was measured at 25 A. The performance characteristics for the above converter are shown below. Note that the dashed curve sections represent the converter’s open loop performance. Vout, OUTPUT VOLTAGE (V) –1.0 TA = 25°C –2.0 A –3.0 B –4.0 –5.0 0 10 20 30 40 50 60 Iout, OUTPUT CURRENT (mA) Figure 31. Load Regulation, Output Voltage vs. Output Current http://onsemi.com 13 Curve Vin (V) Vz (V) Vout (V) A 3.3 V 4.5 –2.8 B 5.0 V 6.5 –3.8 MAX1720 –Vout R1 6 1 + OSC Vin + 2 5 3 4 + R2 10 k Capacitors = 10 µF Figure 32. Line and Load Regulated Negative Output Voltage An adjustable shunt regulator can be used with the shutdown input to give excellent closed loop regulation performance. The shunt regulator acts as a comparator with a precise input offset voltage which significantly reduces the converter’s output resistance and dramatically enhances the line and load regulation. For closed loop operation, the desired regulated output voltage must be lower in magnitude than –Vin. The output will regulate at a level of –Vref (R2/R1 + 1). The adjustable shunt regulator can be from either the TLV431 or TL431 families. The comparator offset or reference voltage is 1.25 V or 2.5 V respectively. The performance characteristics for the converter are shown below. Note that the dashed curve sections represent the converter’s open loop performance. 0 Iout = 25 mA R1 = 10 k R2 = 20 k TA = 25°C Vout, OUTPUT VOLTAGE (V) Vout, OUTPUT VOLTAGE (V) –1.0 A –2.0 –3.0 B –4.0 –1.0 –2.0 –3.0 TA = 25°C –5.0 0 10 20 30 40 50 60 70 –4.0 1.0 2.0 3.0 4.0 5.0 6.0 Iout, OUTPUT CURRENT (mA) Vin, INPUT VOLTAGE (V) Figure 33. Load Regulation, Output Voltage vs. Output Current Figure 34. Line Regulation, Output Voltage vs. Input Current Curve Vin (V) R1 () R2 () Vout (V) A 3.0 10 k 5.0 k –1.8 B 5.0 10 k 20 k –3.6 http://onsemi.com 14 MAX1720 –Vout + 6 1 1 OSC Vin + 6 OSC 2 5 2 5 3 4 3 4 + + Capacitors = 10 µF Figure 35. Paralleling Devices for Increased Negative Output Current An increase in converter output current capability with a reduction in output resistance can be obtained by paralleling two or more devices. The output current capability is approximately equal to the number of devices paralleled. A single shared output capacitor is sufficient for proper operation but each device does require it’s own pump capacitor. Note that the output ripple frequency will be complex since the oscillators are not synchronized. The performance characteristics for a converter consisting of two paralleled devices is shown below. Vout, OUTPUT VOLTAGE (V) 0 TA = 25°C –1.0 B –2.0 –3.0 A –4.0 –5.0 0 10 20 30 40 50 60 70 80 90 100 Iout, OUTPUT CURRENT (mA) Figure 36. Parallel Load Regulation, Output Voltage vs. Output Current http://onsemi.com 15 Curve Vin (V) Rout (Ω) A 5.0 14.5 B 3.0 17 MAX1720 Q2 6 1 + –Vout + OSC Vin C1 Q1 2 5 3 4 C3 + C2 C1 = C2 = 470 µF C3 = 220 µF Q1 = PZT751 Q2 = PZT651 –Vout = Vin –VBE(Q1) – VBE(Q2) –2 VF Figure 37. External Switch for Increased Negative Output Current The output current capability of the MAX1720 can be extended beyond 600 mA with the addition of two external switch transistors and two Schottky diodes. The output voltage is approximately equal to –Vin minus the sum of the base emitter drops of both transistors and the forward voltage of both diodes. The performance characteristics for the converter are shown below. Note that the output resistance is reduced to 0.9 ohms. Vout, OUTPUT VOLTAGE (V) –2.2 –2.4 –2.6 –2.8 Vin = 5.0 V Rout = 0.9 Ω TA = 25°C –3.0 –3.2 0 0.1 0.2 0.3 0.4 0.5 Iout, OUTPUT CURRENT (mA) Figure 38. Current Boosted Load Regulation, Output Voltage vs. Output Current http://onsemi.com 16 0.6 MAX1720 10 k R2 Q2 R1 C1 –Vout 6 1 + OSC Vin + Q1 + 2 5 3 4 C3 C2 C1 = C2 = 470 µF C3 = 220 µF Q1 = PZT751 Q2 = PZT651 Figure 39. Line and Load Regulated Negative Output Voltage with High Current Capability This converter is a combination of Figures 37 and 32. It provides a line and load regulated output of –2.36 V at up to 450 mA with an input voltage of 5.0 V. The output will regulate at a level of –Vref (R2/R1 + 1). The performance characteristics are shown below. Note, the dashed line is the open loop and the solid line is the closed loop performance. –1.0 Vout, OUTPUT VOLTAGE (V) Vout, OUTPUT VOLTAGE (V) –2.2 –2.4 –2.6 –2.8 Vin = 5.0 V Rout = 0.9 Ω R1 = 10 kΩ R2 = 9.0 kΩ TA = 25°C –3.0 –3.2 0 0.1 0.2 0.3 0.4 0.5 0.6 Iout = 100 mA R1 = 10 k R2 = 9 kΩ TA = 25°C –1.2 –1.4 –1.6 –1.8 –2.0 –2.2 –2.4 3.0 3.5 4.0 4.5 5.0 5.5 Iout, OUTPUT CURRENT (A) Vin, INPUT VOLTAGE (V) Figure 40. Current Boosted Load Regulation, Output Voltage vs. Output Current Figure 41. Current Boosted Line Regulation, Output Voltage vs. Input Voltage http://onsemi.com 17 6.0 MAX1720 50 Q2 C1 Vout 6 1 + 50 OSC + Q1 Vin + 2 5 3 4 C2 C3 Capacitors = 220 µF Q1 = PZT751 Q2 = PZT651 Figure 42. Positive Output Voltage Doubler with High Current Capability The MAX1720 can be configured to produce a positive output voltage doubler with current capability in excess of 500 mA. This is accomplished with the addition of two external switch transistors and two Schottky diodes. The output voltage is approximately equal to 2Vin minus the sum of the base emitter drops of both transistors and the forward voltage of both diodes. The performance characteristics for the converter is shown below. Note that the output resistance is reduced to 1.9 ohms. Vout, OUTPUT VOLTAGE (V) 8.8 Vin = 5.0 V Rout = 1.9 Ω TA = 25°C 8.4 8.0 7.6 7.2 6.8 0 0.1 0.2 0.3 0.4 0.5 0.6 Iout, OUTPUT CURRENT (A) Figure 43. Positive Doubler with Current Boosted Load Regulation, Output Voltage vs. Output Current http://onsemi.com 18 MAX1720 R1 50 10 k Q2 6 1 50 OSC Q1 Vin + 2 5 3 4 R2 + C3 Vout + C1 C2 Capacitors = 220 µF Q1 = PZT751 Q2 = PZT651 Figure 44. Line and Load Regulated Positive Output Voltage Doubler with High Current Capability This converter is a combination of Figures 42 and the shunt regulator to close the loop. In this case the anode of the regulator is connected to ground. This convert provides a line and load regulated output of 7.6 V at up to 300 mA with an input voltage of 5.0 V. The output will regulate at a level of Vref (R2/R1 + 1). The open loop configuration is the dashed line and the closed loop is the solid line. The performance characteristics are shown below. 8.0 Vin = 5.0 V Rout = 1.9 Ω Open Loop Rout = 0.5 Ω Closed Loop R1 = 10 k R2 = 51.3 kΩ TA = 25°C 8.4 8.0 Vout, OUTPUT VOLTAGE (V) Vout, OUTPUT VOLTAGE (V) 8.8 7.6 7.2 6.8 0 0.1 0.2 0.3 0.4 0.5 0.6 7.0 6.0 5.0 4.0 Iout = 100 mA R1 = 10 k R2 = 51.3 kΩ TA = 25°C 3.0 2.0 1.0 1.0 2.0 3.0 4.0 5.0 Iout, OUTPUT CURRENT (A) Vin, INPUT VOLTGE (V) Figure 45. Current Boosted Close Loop Load Regulation, Output Voltage vs. Output Current Figure 46. Current Boosted Close Loop Line Regulation, Output Voltage vs. Input Voltage http://onsemi.com 19 6.0 MAX1720 Vin = –5.0 V + + OSC C C + 6 1 C 2 5 3 4 Vout = –2.5 V C + Capacitors = 10 µF Figure 47. Negative Input Voltage Splitter A single device can be used to split a negative input voltage. The output voltage is approximately equal to –Vin/2. The performance characteristics are shown below. Note that the converter has an output resistance of 10 ohms. Vout, OUTPUT VOLTAGE (V) –1.5 TA = 25°C Rout = 10 Ω –1.7 –1.9 –2.1 –2.3 –2.5 0 10 20 30 40 50 60 70 Iout, OUTPUT CURRENT (mA) Figure 48. Negative Voltage Splitter Load Regulation, Output Voltage vs. Output Current http://onsemi.com 20 80 MAX1720 –Vout + R1 R2 6 1 OSC Vin + 2 5 10 k 3 4 + + + +Vout Capacitors = 10 µF Figure 49. Combination of a Closed Loop Negative Inverter with a Positive Output Voltage Doubler All of the previously shown converter circuits have only single outputs. Applications requiring multiple outputs can be constructed by incorporating combinations of the former circuits. The converter shown above combines Figures 26 and 32 to form a regulated negative output inverter with a non–regulated positive output doubler. The magnitude of –Vout is controlled by the resistor values and follows the relationship –Vref (R2/R1 + 1). Since the positive output is not within the feedback loop, its output voltage will increase as the negative output load increases. This cross regulation characteristic is shown in the upper portion of Figure 50. The dashed line is the open loop and the solid line is the closed loop configuration for the load regulation. The load regulation for the positive doubler with a constant load on the –Vout is shown in Figure 51. 10.0 Vout, OUTPUT VOLTAGE (V) Vout, OUTPUT VOLTAGE (V) 9.0 Positive Doubler Iout = 15 mA 8.0 –3.0 Negative Inverter –4.0 Rout = 45 Ω – Open Loop Rout = 2 Ω – Closed Loop R1 = 10 k, R2 = 20 k TA = 25°C –5.0 0 10 20 9.0 8.0 Negative Inverter Iout = 15 mA R1 = 10 k R2 = 20 k TA = 25°C 7.0 30 0 10 20 30 40 50 Iout, NEGATIVE INVERTER OUTPUT CURRENT (mA) Iout, POSITIVE DOUBLER OUTPUT CURRENT (mA) Figure 50. Load Regulation, Output Voltage vs. Output Current Figure 51. Load Regulation, Output Voltage vs. Output Current http://onsemi.com 21 MAX1720 + IC1 C2 C1 Vin –Vout SHDN GND + C3 GND + 0.5″ Inverter Size = 0.5 in x 0.2 in Area = 0.10 in2, 64.5 mm2 Figure 52. Inverter Circuit Board Layout, Top View Copper Side TAPING FORM Component Taping Orientation for TSOP–6 Devices USER DIRECTION OF FEED DEVICE MARKING PIN 1 Standard Reel Component Orientation (Mark Right Side Up) Tape & Reel Specifications Table Package Tape Width (W) Pitch (P) Part Per Full Reel Diameter TSOP–6 8 mm 4 mm 3000 7 inches http://onsemi.com 22 MAX1720 PACKAGE DIMENSIONS TSOP–6 SN SUFFIX CASE 318G–02 ISSUE G A NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. L 6 S 1 5 4 2 3 B D G M J C 0.05 (0.002) H K http://onsemi.com 23 DIM A B C D G H J K L M S MILLIMETERS MIN MAX 2.90 3.10 1.30 1.70 0.90 1.10 0.25 0.50 0.85 1.05 0.013 0.100 0.10 0.26 0.20 0.60 1.25 1.55 0 10 2.50 3.00 INCHES MIN MAX 0.1142 0.1220 0.0512 0.0669 0.0354 0.0433 0.0098 0.0197 0.0335 0.0413 0.0005 0.0040 0.0040 0.0102 0.0079 0.0236 0.0493 0.0610 0 10 0.0985 0.1181 MAX1720 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. 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