MAXIM MAX8594AETG

19-3349; Rev 2; 4/05
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
Applications
PDAs
Organizers
Cellular and Cordless Phones
MP3 Players
Handheld Devices
Features
♦ Minimum External Components
♦ Efficient Step-Down DC-DC Powers CPU Core
♦ 1V/1.3V Selectable Core Voltage, 400mA
(MAX8594)
♦ 1.3V/1.8V Selectable Core Voltage, 400mA
(MAX8594A)
♦ Main LDO 3.3V, 500mA
♦ SD Card Output 3.3V, 500mA
♦ Second Core LDO 1.8V, 50mA
♦ High-Efficiency LCD Boost
♦ LCD 0V True Shutdown when Off
♦ 46µA Quiescent Current
Typical Operating Circuit
MAX8594
MAX8594A
VIN
MAIN
3.3V, 500mA
MAIN
SDIG
3.3V, 500mA
SD CARD SLOT
COR2
1.8V, 50mA
COR2
IN
LBI
DBI
MAIN
ON
OFF
ENM
SDIG
ON
OFF
ENSD
COR2 ON
OFF
ENC2
COR1 ON
OFF
ENC1
1.8V/1.3V
1.3V/1V
CV
LCD
ON
OFF
PV
LXC
PGND
TO IN
1.3V OR 1.8V (MAX8594A)
1V OR 1.3V (MAX8594)
400mA
COR1
COR1
SW
ENL
TO MAIN
LXL
RS
LCD
15V
LFB
TO MAIN
GND
Ordering Information
LBO
PART
TEMP RANGE PIN-PACKAGE
-40°C to +85°C
24 Thin QFN-EP* 4mm x 4mm
(T2444-4)
MAX8594AETG -40°C to +85°C
24 Thin QFN-EP* 4mm x 4mm
(T2444-4)
MAX8594ETG
*EP = Exposed pad.
TO MAIN
REF
DBO
Pin Configuration appears at end of the data sheet.
True Shutdown is a trademark of Maxim Integrated Products, Inc.
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1
MAX8594/MAX8594A
General Description
The MAX8594/MAX8594A complete power-management chips for low-cost personal digital assistants
(PDAs) operates from a 1-cell lithium-ion (Li+) or 3-cell
NiMH battery. They include all regulators, outputs, and
voltage monitors necessary for small portable devices
while requiring a bare minimum of external components. Featured are three linear regulators, a boost DCDC converter for LCD bias, an efficient 4MHz buck
DC-DC converter for core power, a microprocessor
(µP) reset output, and low-battery shutdown in a 0.8mm
high thin QFN package.
The COR1 buck DC-DC converter supplies a pin-selectable output at 400mA. All linear regulators feature
PMOS pass elements for efficient low-dropout operation. A MAIN LDO supplies 3.3V at 500mA. A securedigital (SD) card slot output supplies 3.3V at 500mA,
and a COR2 LDO supplies 1.8V at 50mA. Each output
has its own logic-controlled enable. For other output
voltage combinations, contact Maxim.
An LCD bias boost DC-DC converter features an onboard MOSFET and True Shutdown™ when off. This
means that during shutdown, input power is disconnected from the inductor so the boost output falls to 0V rather
than remaining one diode drop below the input voltage.
A µP reset output clears 20ms (typ) after the COR1 output achieves regulation to ensure an orderly start. In
addition, the COR1 regulator is not started until the 3.3V
main output is in regulation. Also included are a 1%
accurate reference and low-battery monitor. Thermal
shutdown protects the die from overheating.
The MAX8594/MAX8594A operate from a 3.1V to a 5.5V
supply voltage and consume 46µA no-load supply current. They are packaged in a tiny, 4mm x 4mm, 24-pin
thin QFN capable of dissipating 1.67W. The devices
are specified for operation from -40°C to +85°C.
MAX8594/MAX8594A
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
ABSOLUTE MAXIMUM RATINGS
IN, PV, ENSD, ENC1, ENC2, ENL, RS, SDIG,
LBI, DBI to GND ...................................................-0.3V to +6V
LXL to GND ............................................................-0.3V to +30V
MAIN, COR1, COR2, REF, LFB, CV, ENM, LBO, DBO,
LXC, SW to GND......................................-0.3V to (VIN + 0.3V)
PV to IN..................................................................-0.3V to +0.3V
PGND to GND .......................................................-0.3V to +0.3V
Current into LXL..........................................................300mARMS
Current out of SW .......................................................300mARMS
Current into LXC .........................................................400mARMS
Output Short-Circuit Duration.....................................Continuous
Continuous Power Dissipation (TA = +70°C)
24-Pin Thin QFN Package
(derate 20.8mW/°C above +70°C) .................................1.67W
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VIN = VPV = VENSD = VENC2 = VENL = VENM = VENC1 = VDBI = VLBI = VCV = 4.0V, TA = 0°C to +85°C, unless otherwise noted.
Typical values are at TA = +25°C.)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
5.5
V
GENERAL
IN, PV Voltage Range
3.1
VIN Complete Shutdown
Threshold
VDBI = VIN, VIN falling
2.950
3.0
3.050
VDBI = VIN, VIN rising
3.135
3.3
3.525
VDBI Complete Shutdown
Threshold
VDBI falling
1.234
1.25
1.263
VDBI rising
1.306
1.375
1.478
VLBI rising
1.234
1.25
1.263
VLBI falling
1.103
1.125
1.140
VLBI = VIN, VIN falling
3.262
3.33
3.366
VLBI = VIN, VIN rising
3.625
3.7
3.744
Preset mode, VIN = 2.9V
VIN 0.3
VLBI LBO Threshold
VIN LBO Threshold
DBI Input Dual Mode Threshold
V
V
V
V
VIN 1.2
ADJ mode, VIN = 2.9V
LBI Input Dual-Mode Threshold
with Respect to IN
V
Preset mode, VIN = 3.2V
VIN 0.3
V
VIN 1.2
ADJ mode, VIN = 3.2V
DBI Complete Shutdown Input
Program Range
VIN falling
3.0
5.5
V
DBI Input Bias Current
VDBI = 1.25V
-50
+50
nA
LBI Input Bias Current
VLBI = 1.25V
-50
+50
nA
IN, PV Operating Current
IN Operating Current
Shutdown (DBI remains on, REF off), VIN = VPV = VDBI =
VLBI = 2.7V
2
10
All off (REF on)
30
55
All on; LXL, LXC not switching
130
180
Main on, no load
46
75
Main on, no load, COR1 on, LXC not switching
80
110
All on except LCD, VENL = 0V, LXL and LXC not switching
115
160
Dual Mode is a trademark of Maxim Integrated Products, Inc.
2 _______________________________________________________________________________________
µA
µA
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
(VIN = VPV = VENSD = VENC2 = VENL = VENM = VENC1 = VDBI = VLBI = VCV = 4.0V, TA = 0°C to +85°C, unless otherwise noted.
Typical values are at TA = +25°C.)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
300
600
1200
µs
3.218
3.3
3.383
V
550
800
1200
mA
mV
LDOs
MAIN, SDIG Soft-Start Time
MAIN Output Voltage
ILOAD = 100µA to 300mA, VIN = 3.6V to 5.5V
MAIN Current Limit
ILOAD = 1mA
MAIN Dropout Voltage
SDIG Output Voltage
ILOAD = 300mA
210
330
ILOAD = 500mA
350
595
3.218
3.3
3.383
V
525
718
900
mA
mV
ILOAD = 100µA to 200mA, VIN = 3.6V to 5.5V
SDIG Current Limit
SDIG Dropout Voltage
1
ILOAD = 1mA
0.75
ILOAD = 200mA
170
300
ILOAD = 500mA
525
1010
7
15
1.755
1.8
1.845
V
65
98
150
mA
CV = high (MAX8594A)
1.743
1.8
1.855
CV = high (MAX8594) or CV = low (MAX8594A)
1.259
1.3
1.340
CV = low (MAX8594)
0.972
1
1.023
SDIG Reverse Leakage Current
VSDIG = 5.5V, VENSD = VIN = 0V
COR2 Output Voltage
ILOAD = 100µA to 50mA, VIN = 3.6V to 5.5V
COR2 Current Limit
µA
COR1 PWM BUCK
COR1 Output Voltage Accuracy
p-Channel On-Resistance
n-Channel On-Resistance
ILXC = -180mA
0.70
1.34
ILXC = -180mA, VPV = 3.1V
0.8
1.58
ILXC = 180mA
0.25
0.46
ILXC = 180mA, VPV = 3.1V
0.30
0.53
V
Ω
Ω
p-Channel Current-Limit
Threshold
-0.500
-0.75
-0.925
A
n-Channel Current-Limit
Threshold
-0.50
-0.72
-0.92
A
Minimum On- and Off-Times
LXC Leakage Current
tON(MIN)
0.1
tOFF(MIN)
0.1
VLXC = 0V, VENC1 = 0V
µs
-10
+0.1
+10
µA
1.236
1.25
1.264
V
0.1
3
mV
1
3
mV
REF AND RESET OUTPUT
REF Voltage Accuracy
IREF = 0.1µA
REF Line Regulation
3.1V < VIN < 5.5V, IREF = 0.1µA
REF Load Regulation
0.1µA < IREF < 10µA
RS Deassert Threshold for COR1
Rising (Note 1)
CV = low (MAX8594A),
CV = low or CV = high (MAX8594)
88.00
90
93.25
CV = high (MAX8594A)
67.0
69
72.7
%
_______________________________________________________________________________________
3
MAX8594/MAX8594A
ELECTRICAL CHARACTERISTICS (continued)
MAX8594/MAX8594A
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
ELECTRICAL CHARACTERISTICS (continued)
(VIN = VPV = VENSD = VENC2 = VENL = VENM = VENC1 = VDBI = VLBI = VCV = 4.0V, TA = 0°C to +85°C, unless otherwise noted.
Typical values are at TA = +25°C.)
PARAMETER
RS Assert Threshold
CONDITIONS
RS Deassert Delay
RS Assert Delay
MIN
CV = low or CV = high (MAX8594),
CV = low (MAX8594A)
CV = high (MAX8594A)
TYP
MAX
80
UNITS
%
62.5
10
50mV overdrive
20
30
5
ms
µs
LCD
LXL Voltage Range
LXL Current Limit
L1 = 10µH
195
LXL On-Resistance
LXL Leakage Current
V
275
mA
2
µA
µs
Ω
1.7
VLXL = 28V
Maximum LXL On-Time
Minimum LXL Off-Time
235
28
0.2
2
3
4
VLFB > 1.1V
0.8
1
1.2
VLFB < 0.8V (soft-start)
3.9
5
6.0
1.229
1.25
1.270
V
5
50
nA
0.01
1
µA
1
1.5
LFB Feedback Threshold
LFB Input Bias Current
VLFB = 1.3V
SW Off-Leakage Current
VSW = 0V, VPV = 5.5V, VENL = 0V
SW PMOS On-Resistance
µs
Ω
SW PMOS Peak Current Limit
700
mA
SW PMOS Average Current Limit
300
mA
0.13
ms
Soft-Start Time
CSW = 1µF
LOGIC
EN_, CV Input Low Level
VIN = 3.1V to 5.5V
EN_, CV Input High Level
VIN = 3.1V to 5.5V
EN_, CV Input Leakage Current
0.35
V
0.01
1
µA
1.4
V
RS, LBO, DBO Output Low Level
Sinking 1mA, VIN = 2.5V
0.02
0.1
V
DBO Output Low Level
Sinking 100µA, VIN = 1.0V
0.02
0.1
V
RS, LBO, DBO Output High
Leakage
VOUT = 5.5V, VIN = 5.5V
1
µA
THERMAL PROTECTION
Thermal-Shutdown Temperature
Thermal-Shutdown Hysteresis
4
Rising temperature
+160
°C
15
°C
_______________________________________________________________________________________
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
(VIN = VPV = VENSD = VENC2 = VENL = VENM = VENC1 = VDBI = VLBI = 4.0V, TA = -40°C to +85°C, unless otherwise noted.) (Note 2)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
5.5
V
GENERAL
IN, PV Voltage Range
3.1
VIN Complete Shutdown
Threshold
VDBI = VIN, VIN falling
2.93
3.06
VDBI = VIN, VIN rising
3.135
3.525
VDBI Complete Shutdown
Threshold
VDBI falling
1.228
1.264
VDBI rising
1.306
1.478
VLBI rising
1.228
1.264
VLBI falling
1.103
1.140
VLBI = VIN, VIN falling
3.248
3.366
VLBI = VIN, VIN rising
3.609
3.744
Preset mode, VIN = 2.9V
VIN 0.3
VLBI LBO Threshold
VIN LBO Threshold
DBI Input Dual-Mode Threshold
V
V
V
V
VIN 1.25
ADJ mode, VIN = 2.9V
LBI Input Dual-Mode Threshold
with Respect to IN
V
Preset mode, VIN = 3.2V
VIN 0.3
V
VIN 1.25
ADJ mode, VIN = 3.2V
DBI Complete Shutdown Input
Program Range
VIN falling
3.0
5.5
V
DBI Input Bias Current
VDBI = 1.25V
-50
+50
nA
LBI Input Bias Current
VLBI = 1.25V
-50
+50
nA
IN, PV Operating Current
IN Operating Current
Shutdown (DBI remains on, REF off), VIN = VPV = VDBI =
VLBI = 2.7V
10
All off (REF on)
55
All on, LXL, LXC not switching
180
Main on, no load
75
Main on, no load, COR1 on, LXC not switching
110
All on except LCD, VENL = 0V, LXL and LXC not
switching
160
µA
µA
LDOs
MAIN, SDIG Soft-Start Time
Ramp ILIM from 0% to 100%
MAIN Output Voltage
ILOAD = 100µA to 300mA, VIN = 3.6V to 5.5V
MAIN Current Limit
MAIN Dropout Voltage
300
1200
µs
3.209
3.383
V
550
1230
mA
ILOAD = 300mA
330
ILOAD = 500mA
595
mV
_______________________________________________________________________________________
5
MAX8594/MAX8594A
ELECTRICAL CHARACTERISTICS
MAX8594/MAX8594A
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
ELECTRICAL CHARACTERISTICS (continued)
(VIN = VPV = VENSD = VENC2 = VENL = VENM = VENC1 = VDBI = VLBI = 4.0V, TA = -40°C to +85°C, unless otherwise noted.) (Note 2)
PARAMETER
SDIG Output Voltage
CONDITIONS
ILOAD = 100µA to 200mA, VIN = 3.6V to 5.5V
SDIG Current Limit
SDIG Dropout Voltage
MIN
TYP
MAX
3.218
3.383
V
485
900
mA
ILOAD = 200mA
300
ILOAD = 500mA
1250
SDIG Reverse Leakage Current
VSDIG = 5.5V, VENSD = VIN = 0V
COR2 Output Voltage
ILOAD = 100µA to 50mA, VIN = 3.6V to 5.5V
UNITS
mV
15
µA
1.750
1.845
V
60
150
mA
CV = high (MAX8594A)
1.743
1.855
CV = high (MAX8594) or CV = low (MAX8594A)
1.255
1.340
CV = low (MAX8594)
0.969
1.023
COR2 Current Limit
COR1 PWM BUCK
COR1 Output Voltage Accuracy
p-Channel On-Resistance
n-Channel On-Resistance
ILXC = -180mA
1.34
ILXC = -180mA, VPV = 3.1V
1.58
ILXC = 180mA
0.46
ILXC = 180mA, VPV = 3.1V
0.53
V
Ω
Ω
p-Channel Current-Limit
Threshold
-0.460
-0.925
A
n-Channel Current-Limit
Threshold
-0.46
-0.92
A
-10
+10
µA
1.229
LXC Leakage Current
VPV = 5.5V, VLXC = 0V or VPV, VENC1 = 0V
REF AND RESET OUTPUT
REF Voltage Accuracy
IREF = 0.1µA
1.264
V
REF Line Regulation
3.1V < V < 5.5V, IREF = 0.1µA
3
mV
REF Load Regulation
0.1µA < IREF < 10µA
3
mV
RS Deassert Threshold for COR1
Rising (Note 1)
CV = low or CV = high (MAX8594),
CV = low (MAX8594A)
CV = high (MAX8594A)
RS Deassert Delay
88.00
93.25
67.0
72.7
10
30
28
V
180
mA
µA
µs
%
ms
LCD
LXL Voltage Range
LXL Current Limit
LXL Leakage Current
Maximum LXL On-Time
Minimum LXL Off-Time
L1 = 10µH
VLXL = 28V
VLFB > 1.1V
2
0.8
280
2
4
1.2
VLFB < 0.8V (soft-start)
3.9
6.0
1.223
LFB Feedback Threshold
µs
1.270
V
LFB Input Bias Current
VLFB = 1.3V
50
nA
SW Off-Leakage Current
VSW = 0V, VPV = 5.5V, VENL = 0V
1
µA
1.5
Ω
SW PMOS On-Resistance
6
_______________________________________________________________________________________
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
(VIN = VPV = VENSD = VENC2 = VENL = VENM = VENC1 = VDBI = VLBI = 4.0V, TA = -40°C to +85°C, unless otherwise noted.) (Note 2)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
0.35
V
1
µA
LOGIC
EN_, CV Input Low Level
VIN = 3.1V to 5.5V
EN_, CV Input High Level
VIN = 3.1V to 5.5V
1.4
EN_, CV Input Leakage Current
V
RS, LBO, DBO Output Low Level
Sinking 1mA, VIN = 2.5V
0.1
V
DBO Output Low Level
Sinking 100µA, VIN = 1.0V
0.1
V
RS, LBO, DBO Output High
Leakage
VOUT = 5.5V, VIN = 5.5V
1
µA
Note 1: The reset trip point tracks the COR1 voltage. For example, a minimum reset spec does not occur with a maximum COR1
spec, and a minimum COR1 spec does not occur with a maximum reset spec.
Note 2: Specifications to -40°C are guaranteed by design, not production tested.
Typical Operating Characteristics
(Circuit of Figure 2, VIN = 4V, TA = +25°C, unless otherwise noted.)
350
300
250
200
150
100
50
0
700
600
500
400
300
100
200
300
400
LOAD CURRENT (mA)
500
600
3.25
3.00
2.75
2.50
2.25
200
2.00
100
1.75
0
0
3.50
MAX8594/MAX8594A toc03
400
800
MAIN OUTPUT VOLTAGE
vs. LOAD CURRENT
MAX8594/MAX8594A toc02
DROPOUT VOLTAGE (mV)
450
DROPOUT VOLTAGE (mV)
MAX8594/MAX8594A toc01
500
SDIG DROPOUT VOLTAGE
vs. LOAD CURRENT
OUTPUT VOLTAGE (V)
MAIN DROPOUT VOLTAGE
vs. LOAD CURRENT
1.50
0
100
200
300
400
LOAD CURRENT (mA)
500
600
0
100 200 300 400 500 600 700 800 900
LOAD CURRENT (mA)
_______________________________________________________________________________________
7
MAX8594/MAX8594A
ELECTRICAL CHARACTERISTICS (continued)
Typical Operating Characteristics (continued)
(Circuit of Figure 2, VIN = 4V, TA = +25°C, unless otherwise noted.)
SDIG OUTPUT VOLTAGE
vs. LOAD CURRENT
COR1 OUTPUT VOLTAGE
vs. LOAD CURRENT
3.00
2.75
2.50
2.25
MAX8594/MAX8594A toc05
OUTPUT VOTLAGE (V)
3.25
1.9
1.8
1.7
OUTPUT VOLTAGE (V)
MAX8594/MAX8594A toc04
3.50
2.00
1.6
1.5
1.4
1.3
1.2
1.1
1.75
1.0
1.50
0.9
0
100
200
300
400
500
600
700
0
100
200
300
LOAD CURRENT (mA)
LOAD CURRENT (mA)
COR2 OUTPUT VOLTAGE
vs. LOAD CURRENT
LOAD-TRANSIENT MAIN
1.80
1.78
1.76
1.74
400
MAX8594/MAX8594A toc07
MAX8594/MAX8594A toc06
1.82
OUTPUT VOLTAGE (V)
50mV/div
AC-COUPLED
VMAIN
1.72
1.70
1.68
IOUT
1.66
100mA/div
1.64
0
1.62
1.60
0
20
40
60
80
100
100µs/div
LOAD CURRENT (mA)
INPUT CURRENT
vs. INPUT VOLTAGE
LOAD-TRANSIENT COR1
MAX8594/MAX8594A toc08
MAX8594/MAX8594A toc09
60
50
20mV/div
AC-COUPLED
VCOR1
IOUT
100mA/div
0
INPUT CURRENT (µA)
MAX8594/MAX8594A
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
VIN FALLING
40
30
VIN RISING
20
10
0
40µs/div
0
1
2
3
4
5
INPUT VOLTAGE (V)
8
_______________________________________________________________________________________
6
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
LCD EFFICIENCY vs. LOAD CURRENT
RS AND OUTPUT TIMING
MAX8594/MAX8594A toc10
MAX8594/MAX8594A toc11
90
85
5V/div
0
VMAIN
2V/div
VRS
0
5V/div
0
VCOR1
1V/div
80
EFFICIENCY (%)
VIN
75
VLCD = 15V
VLCD = 18V
70
65
60
55
50
0
45
40
0
20ms/div
1
2
3
4
5
LOAD CURRENT (mA)
LCD OUTPUT VOLTAGE
vs. INPUT VOLTAGE
LCD OUTPUT VOLTAGE
vs. LOAD CURRENT
17.8
17.6
17.4
17.2
MAX8594/MAX8594A toc13
OUTPUT VOLTAGE (V)
18.0
18.04
18.03
OUTPUT VOLTAGE (V)
MAX8594/MAX8594A toc12
18.2
18.02
18.01
18.00
17.99
17.98
17.0
17.97
17.96
16.8
0
2
4
6
8
10
3.5
12
4.0
4.5
5.0
LOAD CURRENT (mA)
INPUT VOLTAGE (V)
LCD SWITCHING WAVEFORMS
SDIG RESPONSE TO ENSD
MAX8594/MAX8594A toc14
VIN
MAX8594/MAX8594A toc15
20mV/div
AC-COUPLED
50mV/div
AC-COUPLED
VLCD
5.5
2V/div
VENSD
20V/div
VLX
1V/div
ILX
200mA/div
VSDIG
ILOAD = 100mA
4µs/div
200µs/div
_______________________________________________________________________________________
9
MAX8594/MAX8594A
Typical Operating Characteristics (continued)
(Circuit of Figure 2, VIN = 4V, TA = +25°C, unless otherwise noted.)
Typical Operating Characteristics (continued)
(Circuit of Figure 2, VIN = 4V, TA = +25°C, unless otherwise noted.)
LCD RESPONSE TO ENL
MAIN RESPONSE TO ENM
MAX8594/MAX8594A toc16
MAX8594/MAX8594A toc17
2V/div
VENL
2V/div
VENM
LCD BOOST
SOFT-START
SW
TURN-ON
5V/div
VLCD
1V/div
VMAIN
ILOAD = 100mA
400µs/div
200µs/div
RS AND COR1 RESPONSE TO ENC1
COR1 RESPONSE TO ENC1
MAX8594/MAX8594A toc19
MAX8594/MAX8594A toc18
RLOAD = 10Ω
RLOAD = 10Ω
VENC1
2V/div
VENC1
2V/div
VCOR1
1V/div
VRS
5V/div
ILXC
200mA/div
500mV/div
VCOR1
0
200mA/div
ILXC
10ms/div
40µs/div
FOR RS RESPONSE, SEE RS AND
COR1 RESPONSE TO ENC1
MAX8594/MAX8594A toc20
90
85
2V/div
VENC2
80
VIN = 5V
75
MAX8594/MAX8594A toc21
COR1 EFFICIENCY vs. LOAD CURRENT
WITH 1V OUTPUT
COR2 RESPONSE TO ENC2
EFFICIENCY (%)
MAX8594/MAX8594A
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
VIN = 4V
70
65
VIN = 3.6V
60
55
1V/div
VCOR2
50
45
MAX8594
40
200µs/div
0.1
1
10
100
LOAD CURRENT (mA)
10
______________________________________________________________________________________
1000
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
COR1 EFFICIENCY vs. LOAD CURRENT
WITH 1.3V OUTPUT
VIN = 4V
70
90
VIN = 3.6V
65
60
85
60
45
55
40
50
1000
100
VIN = 3.6V
70
50
10
VIN = 4V
75
65
1
VIN = 5V
80
55
0.1
MAX8594/MAX8594A toc22a
EFFICIENCY (%)
VIN = 5V
75
95
EFFICIENCY (%)
85
80
100
MAX8594/MAX8594A toc22
90
COR1 EFFICIENCY vs. LOAD CURRENT
WITH 1.8V OUTPUT
0.1
1
10
100
LOAD CURRENT (mA)
LOAD CURRENT (mA)
LIGHT-LOAD SWITCHING COR1
HEAVY-LOAD SWITCHING COR1
1000
MAX8594/MAX8594A toc23
MAX8594/MAX8594A toc24
ILOAD = 20mA
ILOAD = 200mA
5V/div
0
VLXC
50mV/div
AC-COUPLED
VCOR1
5V/div
0
VLXC
50mV/div
AC-COUPLED
VCOR1
200mA/div
ILXC
ILXC
200mA/div
200ns/div
1µs/div
COR1 RESPONSE TO CV
MAX8594/MAX8594A toc25
1.3V/1.8V
1V/1.3V
VCOR1
500mV/div
0
VCV
2V/div
40µs/div
______________________________________________________________________________________
11
MAX8594/MAX8594A
Typical Operating Characteristics (continued)
(Circuit of Figure 2, VIN = 4V, TA = +25°C, unless otherwise noted.)
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
MAX8594/MAX8594A
Pin Description
PIN
12
NAME
FUNCTION
1
SDIG
3.3V, 500mA LDO Output for Secure-Digital Card Slot. SDIG has reverse current protection so SDIG
can be biased when no power is present at IN. SDIG output turns off when VIN is below the DBI
threshold, ENSD goes low, or MAIN is out of regulation. When SDIG turns off, the output is discharged
at a rate depending on the load and the internal feedback resistors (typically 1.3MΩ).
2
IN
Input Voltage to the MAX8594/MAX8594A. Bypass IN to GND with a 1µF ceramic capacitor.
3
RS
Reset Output. RS is an active-low, open-drain output that goes high impedance 20ms (typ) after
COR1 is in regulation. COR1 does not turn on until MAIN is in regulation. If MAIN falls out of
regulation, COR1 turns off and RS goes low. If MAIN is still in regulation, then RS goes low when VIN
is below the DBI threshold. RS goes low when ENC1 is low.
4
LBO
Low-Battery Detector Open-Drain Output. LBO is an active-low, open-drain output that goes high
impedance when VIN is greater than both the DBI and LBI thresholds. LBO goes low when VIN falls
below the LBI threshold.
5
DBO
Dead-Battery Detector Open-Drain Output. When VIN is below the DBI threshold, both DBO and LBO
go low, all outputs shut down, and the MAX8594/MAX8594A enter the lowest possible quiescentcurrent state. Once this occurs, MAIN does not turn back on until both VIN exceeds the DBI threshold
and ENM = high. DBO is an active-low, open-drain output that goes high impedance when VIN
exceeds the DBI threshold.
6
DBI
Dead-Battery Detector. DBI remains active at all times. If DBI = IN, the DBI threshold is 3.0V when IN
is falling and 3.3V when rising. The DBI threshold can also be adjusted to other values by connecting
DBI to a resistor voltage-divider. Also see the DBO description.
7
LBI
Low-Battery Detector. If LBI = IN, the LBI threshold is 3.33V when IN is falling and 3.7V when rising.
The LBI threshold can also be adjusted to other values by connecting LBI to a resistor voltagedivider. Also see the LBO description.
8
CV
Selects 1V or 1.3V COR1 Output Voltage for MAX8594, and 1.3V or 1.8V COR1 for MAX8594A. Drive CV
high or connect to IN for a 1.3V COR1 output (1.8V COR1 for MAX8594A). Drive CV low or connect to GND
for a 1V COR1 output (1.3V COR1 for MAX8594A).
9
ENM
Enable Input for MAIN. No other outputs turn on until MAIN is in regulation. If MAIN is pulled out of
regulation, all other outputs turn off and RS goes low. MAIN cannot be activated when VIN is below
the DBI threshold.
10
GND
Ground
11
REF
1.25V 1% Reference. Bypass REF with a 0.1µF capacitor to GND. REF is enabled when VIN is greater
than the DBI threshold. REF is off when VIN is below the DBI threshold.
12
LFB
LCD Feedback Input. Connect LFB to a resistor-divider network between the LCD output and GND.
The feedback threshold is 1.25V. LCD turns off when VIN is below the DBI threshold, when ENL goes
low, or when MAIN is out of regulation. When off, the LCD output is discharged at a rate depending
on the load and the external feedback resistors (typically 2.4MΩ).
13
ENL
Enable Input for LCD (Boost Regulator). Drive ENL high to activate the LCD boost. Drive ENL low to
shut down the LCD output. The LCD converter cannot be activated when VIN is below the DBI
threshold or before MAIN is in regulation.
14
LXL
LCD Boost Switch. Connect LXL to a boost inductor and Schottky diode. See Figure 1.
______________________________________________________________________________________
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
PIN
NAME
FUNCTION
15
SW
LCD True-Shutdown Switch Output. SW is the power source for the LCD boost inductor. SW turns on
when ENL is high. For best efficiency, bypass SW with a 4.7µF capacitor to GND. SW is disconnected
from PV when LCD is shut down.
16
PV
Power Input for COR1 Buck Converter and LCD True-Shutdown Switch. Connect IN to PV.
17
PGND
18
LXC
19
ENC1
Enable Input for Primary Core Buck Converter (COR1). Drive ENC1 high to turn on COR1 and low to
turn off. COR1 cannot be activated if VIN is below the DBI threshold or before MAIN is in regulation.
20
ENSD
Enable Input for Secure Digital Card (SDIG). Drive ENSD low to turn off SDIG and high to turn on.
SDIG cannot be activated when VIN is below the DBI threshold or before MAIN is in regulation.
21
COR1
Feedback Sense Input for COR1 Output. COR1 turns off when VIN is below the DBI threshold, when
ENC1 goes low, or when MAIN is out of regulation. When off, the output is discharged by LXC through
an internal 1MΩ (typ) resistor.
22
ENC2
Enable Input for Secondary Core LDO (COR2). Drive ENC2 high to turn on COR2 and low to turn off.
COR2 cannot be activated when VIN is below the DBI threshold or before MAIN is in regulation. COR2
can be activated when VIN is greater than the DBI threshold and MAIN is in regulation.
23
COR2
1.8V, 50mA LDO Output for Secondary Core. COR2 turns off when VIN is below the DBI threshold,
when ENC2 goes low, or when MAIN is out of regulation. The COR2 output is discharged at a rate
depending on the load and the internal feedback resistors (typically 700kΩ).
24
MAIN
3.3V, 500mA LDO Output for Main Supply. MAIN output turns off when VIN is below the DBI threshold
or when ENM goes low. When off, the output is discharged at a rate depending on the load and the
internal feedback resistors (1.3MΩ typ).
—
EP
Power Ground
COR1 Switching Node. Connect LXC to the COR1 inductor. See Figure 1.
Exposed Pad. Connect to ground for enhanced power dissipation.
______________________________________________________________________________________
13
MAX8594/MAX8594A
Pin Description (continued)
MAX8594/MAX8594A
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
AC ADAPTER INPUT
4.15V TO 7V
1µF
DC
MAX8601
POWER
INPUT
BATT
1µF
C1
1µF
Li-ION
BATTERY
MAX8594
MAX8594A
MAIN
IN
3.3V, 500mA
MAIN
C2
4.7µF
LBI
SDIG
USB INPUT
4.15V TO 6V
1µF
DBI
USB
COR2
MAIN
ON
OFF
DIE
THERMAL
CONTROL
CHARGE
CONTROL
EN
500mA
100mA
C3
4.7µF
POK
USEL
LOGIC
GND
ISEL
C4
2.2µF
ENM
SDIG
ON
OFF
ENSD
COR2 ON
OFF
ENC2
COR1 ON
OFF
ENC1
1.8V/1.3V
1.3V/1V
LCD
ON
OFF
C5
0µF
LXC
1.3V OR 1.8V
C6
(MAX8594A)
2.2µF
1V OR 1.3V
(MAX8594)
400mA
COR1
L2
2.2µH
PGND
COR1
CV
SW
L1 10µH
MURATA
LQH32C
ENL
TO MAIN
R8
1MΩ
1.8V, 50mA
COR2
TO IN
PV
FLT
CHG
3.3V, 500mA
SD CARD SLOT
LXL
C9
47pF
R1
2.2MΩ
RS
LFB
TO MAIN
R7
1MΩ
GND
R2
200kΩ
LBO
REF
TO MAIN
C10
0.1µF
R6
1MΩ
DBO
Figure 1. Typical Application Circuit with Charger
14
C7
4.7µF
______________________________________________________________________________________
LCD
C8 15V
1µF
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
POWER
INPUT
IN
ENM
SDIG
C3
4.7µF
LDO
CONTROL
ON
OFF
ENSD
ON
OFF
ENC2
ON
OFF
ENC1
3.3V, 500mA
MAIN
C2
4.7µF
LDO
CONTROL
C1
1µF
ON
OFF
MAIN
COR2
1.8V/1.3V
1.3V/1V
C4
2.2µF
LDO
CONTROL
CV
PV
3.3V, 500mA
SD CARD SLOT
1.8V, 50mA
COR2
TO IN
C5
0µF
PWM
BUCK
MAX8594/MAX8594A
MAX8594
MAX8594A
C6
2.2µF
LXC
1.3V OR 1.8V (MAX8594A)
1V OR 1.3V (MAX8594)
400mA
COR1
L2
2.2µH
PGND
COR1
FB
TO PV
SW
MAINOK
LCD
ON
OFF
LCD OFF
SWITCH
L1 10µH
MURATA
LQH32C
ENL
C7
4.7µF
LXL
TO MAIN
R8
1MΩ
LFB
RS
20ms AFTER
COR1 OK
TO MAIN
C9
47pF
R1
2.2MΩ
LCD
BOOST
LCD
C8 15V
1µF
R2
200kΩ
GND
R7
1MΩ
LBO
REF
REF
IN
C10
0.1µF
TO MAIN
R6
1MΩ
DBO
LBI
DBI
TO IN
TO IN
Figure 2. Block Diagram
______________________________________________________________________________________
15
MAX8594/MAX8594A
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
Detailed Description
COR1 Step-Down DC-DC Converter
The COR1 regulator is a proprietary hysteretic PWM
control step-down converter that supplies up to 400mA.
The output voltage is set to either 1V or 1.3V by CV for
the MAX8594 and 1.3V or 1.8V for the MAX8594A.
Under moderate to heavy loading, COR1 operates in a
low-noise PWM mode with constant frequency and
modulated pulse width. Switching harmonics generated
by fixed-frequency operation are consistent and easily
filtered. With light loads (<30mA), COR1 operates in an
efficiency-enhanced Idle Mode™ during which the converter switches only as needed to service the load.
Linear Regulators
Power for main logic, a SD card slot, and CODEC are
provided by three LDOs:
• MAIN—Provides 3.3V at a guaranteed 500mA with a
typical current limit of 800mA.
• SDIG—Provides 3.3V at a guaranteed 500mA for SD
cards with a typical current limit of 718mA.
• COR2—Provides 1.8V at a guaranteed 50mA for a
CODEC core with a typical current limit of 98mA.
Note that it may not be possible to draw the full rated
current of MAIN and SDIG at all operating input voltages due to the dropout limitations of those regulators.
The typical dropout resistance of the MAIN regulator is
0.7Ω (350mV drop at 500mA), and the typical dropout
resistance of the SDIG regulator is 0.85Ω (525mV drop
at 500mA).
All voltage outputs have separate enable inputs (ENM,
ENL, ENSD, ENC1, and ENC2); however, no other output turns on until MAIN is in regulation. MAIN cannot be
activated until VIN exceeds the DBI threshold. When
SDIG is turned off, reverse current is blocked so the
SDIG output can be biased with an external source
when no power is present at IN. Leakage current is typically 3µA with 3.3V at SDIG.
function is ideal for applications that require the output
voltage to fall to 0V in shutdown (True Shutdown). If
True Shutdown is not required, the SW switch can be
bypassed by connecting the boost inductor directly to PV
and removing the bypass cap on SW (C7 in Figure 1).
System Sleep
All regulated outputs turn off when VDBI < 1.25V (or VIN
= 3.0V if DBI = IN, Figure 1). The MAX8594/MAX8594A
resume normal operation when VDBI >1.375V (or VIN =
3.3V if DBI = IN, Figure 1).
Reset Output (RS)
Reset RS asserts when COR1 falls 20% below its set
level (38% for 1.8V setting in the MAX8594A). RS is an
open-drain, active-low output. Connect a pullup resistor
from RS to the logic supply of the gate receiving the
reset signal. RS deasserts a minimum of 10ms after the
COR1 output is in regulation. Upon application of valid
input power, the MAIN output activates first (if ENM =
high) followed by other outputs (if EN_ = high). Power
and output sequencing are shown in Figure 3.
VIN
VIN = 3.7V
VIN = 3.3V
VIN = 3.33V
VIN = 3.0V
MAIN AT 90%
MAIN AT 86%
3.3V MAIN
COR1
COR1 AT 90%
RS
20ms RS
DEASSERT
DELAY
LBO
DBO
LCD DC-DC Boost
The MAX8594/MAX8594A include a low-current, highvoltage boost DC-DC converter for LCD bias. This circuit
can output up to 28V and is adjustable with either an analog or PWM control signal using external components.
Figure 3. Power Sequence for Rising and Falling Input Voltage.
Note that VIN thresholds are for LBI and DBI connected to VIN.
Other thresholds can be set with resistors.
SW provides an input-power disconnect for the LCD
when ENL is low (off). The input-power disconnect
Idle Mode is a trademark of Maxim Integrated Products, Inc.
16
______________________________________________________________________________________
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
2)
3)
4)
When VIN rises above the DBI threshold (3.3V if
DBI = IN), DBO goes high impedance immediately
and the part turns on. The MAIN LDO turns on if
ENM = HIGH.
When the MAIN output reaches 90% of its nominal
voltage, or 2.97V, all other regulators turn on if
they are enabled.
RS goes high impedance 20ms after COR1 reaches 90% of its nominal voltage (69% when 1.8V setting in the MAX8594A is used).
5)
When VIN rises above the LBI threshold (3.7V if
LBI = IN), LBO goes high impedance.
As IN decreases, sequencing is as follows:
1)
2)
3)
When VIN falls to the LBO threshold (3.33V if LBI =
IN), LBO is pulled to GND.
If VIN falls to the DBI threshold (3.0V if LBI = IN)
before the MAIN output falls to 2.838V, DBO and
RS go low, all regulators turn off, and the part is
shut down.
If the MAIN output falls below 86% of its nominal
voltage (2.838V) before IN reaches the DBI threshold (3.0V if DBI = IN), RS is pulled to GND and all
other outputs turn off, but MAIN remains on (in
dropout) and DBO remains high until IN falls to the
DBI threshold.
Applications Information
COR1 Buck Output
COR1 Inductor
A 2.2µH inductor with a saturation current of at least
500mA is recommended. For lower load currents, the
inductor current rating may be reduced. For maximum
efficiency, the inductor’s DC resistance should be as
low as possible. Note that core materials differ among
manufacturers and inductor types, resulting in variations in efficiency.
The COR1 output capacitor C6 (Figure 1) is required to
keep the output voltage ripple small; 2.2µF is recommended for most applications.
Due to the pulsating nature of input current in a buck
converter, a low-ESR input capacitor is required for
input voltage filtering and to minimize interference with
other circuits. The impedance of the input capacitor,
C5 (Figure 1), should be kept very low at the switching
frequency. A minimum value of 4.7µF is recommended
at PV for most applications. The input capacitor can be
increased to further improve input filtering.
LDO Output Capacitors
(MAIN, SDIG, COR2)
Capacitors are required at each LDO output of the
MAX8594/MAX8594A for stable operation over the full
load and temperature range. See Figure 1 for recommended capacitor values for each output. To reduce
noise and improve load-transient response, larger output capacitors up to 10µF can be used. Surface-mount
ceramic capacitors have very low ESR and are commonly available in values up to 10µF. X7R and X5R
dielectrics are recommended. Note that some ceramic
dielectrics, such as Z5U and Y5V, exhibit large capacitance and ESR variation with temperature and require
larger than the recommended values to maintain stability overtemperature.
Setting LBI and DBI
The DBI and LBI inputs monitor input voltage (usually a
battery) and trigger the DBO and LBO outputs. With
LBI and DBI connected to IN, the LBI and DBI thresholds are internally set. For a rising input voltage, DBO
goes high when VIN exceeds 3.3V and LBO goes high
when VIN exceeds 3.7V. For a falling input voltage, LBO
goes low when VIN falls below 3.3V and DBO goes low
when V IN falls below 3.0V (see also the Electrical
Characteristics table and Figure 3). Alternatively, the
LBI and DBI thresholds can be set with external resistors as shown in Figures 4 and 5.
COR1 Capacitors
Ceramic input and output capacitors are recommended. For best stability over a wide temperature range,
use capacitors with an X5R or X7R dielectric due to
their low ESR and low temperature coefficient.
______________________________________________________________________________________
17
MAX8594/MAX8594A
Power Sequencing
As VIN increases from 0V, sequencing is as follows:
1) The DBI comparator is always on. DBO, LBO, and
RS are pulled low at approximately VIN = 0.7V.
MAIN, SDIG, COR1, COR2, and LCD are off.
MAX8594/MAX8594A
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
IN
IN
R3
DBI
(1.25V FALLING,
1.375V RISING)
LBI
(1.125V FALLING,
1.25V RISING)
R6
R4
DBI
(1.25V FALLING,
1.375V RISING)
R5
LBI
(1.125V FALLING,
1.25V RISING)
MAX8594
MAX8594A
R8
R7
R9
MAX8594
MAX8594A
Figure 4. Setting the DBI and LBI Threshold with Three External
Resistors
Figure 5. Setting the DBI and LBI Thresholds with Four Resistors
In Figure 4, one three-resistor-divider can set both DBI
and LBI according to the following equations (shown for
setting falling thresholds). Choose the lower resistor of
the divider chain (R5 in Figure 4) to be between 100kΩ
and 250kΩ. The equations for the two upper resistordividers as a function of each (falling) threshold are:
Alternately, LBI and DBI can be set with separate resistor-dividers. The resistor calculation is simpler and the
two settings do not interact, but one more resistor is
needed and battery drain is slightly higher due to the
extra resistor load. Choose the lower resistor of each
divider chain (R7 and R9 in Figure 5) to be between
100kΩ and 250kΩ. The equations for upper resistordividers as a function of each (falling) threshold are:

V
1.25 
R 3 = R5 x LBFALL x 1 −
1.125
VDBFALL 

R4 = R5 x
1.25 x VLBFALL
−1
1.125 x VDBFALL
where VDBFALL and VLBFALL are the desired falling
thresholds to trigger the DBO and LBO outputs,
respectively. Once those thresholds are selected, the
rising DBI and LBI thresholds are:
VDBRISE = 1.375 x
R 3 + R4 + R5
R4 + R5
V

R6 = R7 x  DBFALL − 1
 1.25

V

R8 = R9 x  LBFALL − 1
 1.125

where VDBFALL and VLBFALL are the desired falling
thresholds to trigger the DBO and LBO outputs,
respectively. Once those thresholds are selected, the
rising DBI and LBI thresholds are:
VDBRISE = 1.375 x
VLBRISE = 1.25 x
R 3 + R4 + R5
R5
VLBRISE = 1.25 x
R6 + R7
R7
R8 + R9
R9
Note that the low-battery threshold should not be set
below the dead-battery threshold because both DBO
18
______________________________________________________________________________________
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
SIMPLIFIED DC-DC CONVERTER
I1
R1
AVDD
VDOUT
ERROR AMP
RD
DAC
ID
R2
I2
VREF
1.25V
CONTROL
VOUT
MAX8594
MAX8594A
Figure 6. Adjusting the Output Voltage with a DAC
and LBO are automatically driven low and the part is
shut down when the DBI threshold is crossed
(going low).
LCD Boost Output
LCD Inductor
The LCD boost is designed to operate with a wide
range of inductor values (4.7µH to 150µH). Smaller
inductance values typically offer smaller size for a
given series resistance or saturation current. Smaller
values cause LX to switch more frequently for a given
load and can reduce efficiency at low load currents.
Larger values reduce switching losses due to less frequent switching for a given load, but higher DC resistance can reduce efficiency. Note that for inductors
larger than 43µH, the peak inductor current does not
reach 250mA before the LXL maximum on-time (3µs)
expires. This reduces output current but may be beneficial for light-load efficiency. A 10µH inductor provides a
good balance and works well for most applications.
The inductor’s saturation current rating should be
greater than the peak switching current (250mA).
LCD Diode
Schottky diodes rated at 250mA or more, such as the
MBR0530 or Nihon EP05Q03L, are recommended. The
diode reverse-breakdown voltage rating must be
greater than the LCD output voltage.
LCD Capacitors
For most applications, use a ceramic 1µF output
capacitor. This typically provides a peak-to-peak output
ripple of 30mV. In addition, bypass IN with 1µF and SW
with 4.7µF ceramic capacitors. An LCD feed-forward
capacitor, connected from the output to LFB, improves
stability over a wide range of battery voltages. A 47pF
capacitor is sufficient for most applications; however,
the optimum value is affected by PC board layout.
Setting LCD Voltage
Adjust the output voltage by connecting a voltagedivider from the LCD output to LFB (see Figure 1).
Select R2 between 10kΩ and 200kΩ. Calculate R1 with
the following equation:
V

R1 = R2 x  OUT − 1
V
 LFB

where VLFB = 1.25V and VOUT can range from VIN to
28V. The input bias current of LFB is typically only 5nA,
allowing large-value resistors to be used. For less than
1% error, the current through R2 should be greater than
100 times the feedback input bias current (ILFB).
LCD Adjustment
The LCD boost output can be digitally adjusted by
either a DAC or PWM signal.
DAC Adjustment
Adding a DAC and a resistor, RD, to the divider circuit
(Figure 6) provides DAC adjustment of VOUT. Ensure that
VOUT(MAX) does not exceed the LCD panel rating. The
output voltage (VOUT) as a function of the DAC voltage
(VDOUT) is calculated using the following formula:
  R1   (1.25 − VDOUT ) xR1
VOUT = 1.25 x 1 +    +
RD
  R2  
______________________________________________________________________________________
19
MAX8594/MAX8594A
VIN
MAX5365
MAX8594/MAX8594A
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
Using PWM Signals
Many µPs have the ability to create PWM outputs.
These are digital outputs, based on either 16-bit or 8-bit
counters, with a programmable duty cycle. In many
applications, they are suitable for adjusting the output
of the MAX8594/MAX8594A as seen in Figure 7.
The circuit consists of the PWM source, capacitor C11,
and resistors RD and RW. To analyze the transfer function of the PWM circuit, it is easiest to first simplify it to
its Thevenin equivalent. The Thevenin voltage is calculated using the following formula:
VTHEV = (D x VOH ) + (1 − D) x VOL
where D is the duty cycle of the PWM signal, VOH is the
PWM output high level (often 3.3V), and V OL is the
PWM output low level (usually 0V). For CMOS logic, this
equation simplifies to:
VTHEV = D x VDD
where VDD is the logic-high output voltage of the PWM
output. The Thevenin impedance is the sum of resistors
RW and RD:
RTHEV = RD + RW
The output voltage (VOUT) as a function of the PWM
average voltage (VTHEV) is:
  R1   (1.25 − VTHEV ) xR1
VOUT = 1.25 x 1 +    +
R THEV
  R2  
When using the PWM adjustment method, RD isolates
the capacitor from the feedback loop of the
MAX8594/MAX8594A. The cutoff frequency of the lowpass filter is defined as:
fC =
1
2 x π xR THEV xC11
The cutoff frequency should be at least two decades
below the PWM frequency to minimize the induced AC
ripple at the output.
An important consideration is the turn-on transient created by the initial charge on filter capacitor C11. This
capacitor forms a time constant with RTHEV, causing
the output to initialize at a higher than intended voltage.
This overshoot is minimized by scaling RD as high as
possible compared to R1 and R2. Alternatively, the µP
can briefly keep the LCD disabled until the PWM voltage has had time to stabilize.
20
SW
C7
4.7µF
LCD
C8 15V
1µF
LXL
C9
47pF
R1
2.2MΩ
LFB
R2
200kΩ
CONNECTION FOR
PWM-CONTROLLED
LCD BIAS
RD
RW
C11
Figure 7. PWM-Controlled LCD Bias
PC Board Layout and Grounding
Careful PC board layout is important for minimizing
ground bounce and noise. Keep the MAX8594/
MAX8594A’s ground pin and the ground leads of the
input and output capacitors less than 0.2in (5mm)
apart. In addition, keep all connections to LFB, COR1,
LXC, and LXL as short as possible. In particular, external feedback resistors should be as close to LFB as
possible. To minimize output voltage ripple and to maximize output power and efficiency, use a ground plane
and solder PGND and exposed pad directly to the
ground plane. Refer to the MAX8594 evaluation kit for a
layout example.
Thermal Considerations
In most applications, the circuit is located on a multilayer board and full use of the four or more layers is recommended. For heat dissipation, connect the exposed
backside pad of the thin QFN package to a large
ground plane, preferably on a surface of the board that
receives good airflow. Typical applications use multiple
ground planes to minimize thermal resistance. Avoid
large AC currents through the ground plane.
______________________________________________________________________________________
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
LXC
PGND
PV
SW
LXL
ENL
TOP VIEW
18
17
16
15
14
13
ENC1
19
12
LFB
ENSD
20
11
REF
COR1
21
10
GND
9
ENM
MAX8594
MAX8594A
CV
MAIN
24
7
LBI
1
2
3
4
5
6
DBI
8
DBO
23
LBO
COR2
RS
22
IN
ENC2
SDIG
TRANSISTOR COUNT: 3436
PROCESS: BiCMOS
THIN QFN
______________________________________________________________________________________
21
MAX8594/MAX8594A
Pin Configuration
Chip Information
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
24L QFN THIN.EPS
MAX8594/MAX8594A
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
PACKAGE OUTLINE,
12, 16, 20, 24, 28L THIN QFN, 4x4x0.8mm
21-0139
D
1
2
PACKAGE OUTLINE,
12, 16, 20, 24, 28L THIN QFN, 4x4x0.8mm
21-0139
D
2
2
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
22 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2005 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products, Inc.