AD ADG804YRMZ

0.5 Ω CMOS 1.65 V TO 3.6 V
4-Channel Multiplexer
ADG804
Data Sheet
FEATURES
FUNCTIONAL BLOCK DIAGRAM
0.5 Ω typical on resistance
0.8 Ω maximum on resistance at 125°C
1.65 V to 3.6 V operation
Automotive temperature range: –40°C to +125°C
High current carrying capability: 300 mA continuous
Rail-to-rail switching operation
Fast switching times <25 ns
Typical power consumption (<0.1 μW)
ADG804
S1 2
S2 9
8 D
S3 4
1 OF 4
DECODER
GENERAL DESCRIPTION
The ADG804 is a low voltage 4-channel CMOS multiplexer
comprising four single channels. This device offers ultralow
on resistance of less than 0.8 Ω over the full temperature range.
The digital inputs can handle 1.8 V logic with a 2.7 V to 3.6 V
supply.
10
5
A1
EN
Figure 1.
APPLICATIONS
MP3 players
Power routing
Battery-powered systems
PCMCIA cards
Cellular phones
Modems
Audio and video signal routing
Communication systems
1
A0
04307-0-001
S4 7
PRODUCT HIGHLIGHTS
1.
<0.8 Ω over full temperature range of –40°C to +125°C.
2.
Single 1.65 V to 3.6 V operation.
3.
Operational with 1.8 V CMOS logic.
4.
High current handling capability (300 mA continuous
current at 3.3 V).
5.
Low THD + N (0.02% typ).
6.
Small 10-lead MSOP package.
The ADG804 switches one of four inputs to a common output,
D, as determined by the 3-bit binary address lines, A0, A1, and
EN. A Logic 0 on the EN pin disables the device. The ADG804
has break-before-make switching.
The ADG804 is fully specified for 3.3 V, 2.5 V, and 1.8 V supply
operation. It is available in a 10-lead MSOP package.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 © 2004–2011 Analog Devices, Inc. All rights reserved.
ADG804
Data Sheet
TABLE OF CONTENTS
Revision History ............................................................................... 2
Typical Performance Characteristics ..............................................8
Specifications..................................................................................... 3
Test Circuits..................................................................................... 11
Absolute Maximum Ratings ............................................................ 6
Outline Dimensions ....................................................................... 13
ESD Caution .................................................................................. 6
Ordering Guide .......................................................................... 13
Pin Configuration ............................................................................. 7
REVISION HISTORY
9/11—Rev. 0 to Rev. A
Changes to Maximum Leakage Currents Parameter and
Conditions, Table 1........................................................................... 3
Changes to Maximum Leakage Currents Parameter and
Conditions, Table 2........................................................................... 4
Changes to Maximum Leakage Currents Parameter and
Conditions, Table 3........................................................................... 5
Added Lead Temperature Parameter ............................................ 6
Updated Outline Dimensions ....................................................... 13
Changes to Ordering Guide .......................................................... 13
4/04—Revision 0: Initial Version
Rev. A | Page 2 of 16
Data Sheet
ADG804
SPECIFICATIONS
VDD = 2.7 V to 3.6 V, GND = 0 V, unless otherwise noted. 1
Table 1.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
On Resistance Match between
Channels (∆RON)
On Resistance Flatness (RFLAT(ON))
LEAKAGE CURRENTS
Source Off Leakage IS (OFF)
Drain Off Leakage ID (OFF)
Channel On Leakage ID, IS (ON)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current IINL or IINH
+25°C
−40°C to
+85°C
−40°C to
+125°C
0 V to VDD
0.5
0.65
0.04
0.75
0.8
0.075
0.08
0.15
0.16
0.1
±0.1
±2
±0.1
±2
±0.1
±2
2
0.8
0.005
tON ENABLE
tOFF ENABLE
Break-Before-Make Time Delay (tBBM)
4
24
30
23
29
5
6
20
32
35
30
31
7
8
5
Charge Injection
Off Isolation
Channel-to-Channel Crosstalk
Total Harmonic Distortion (THD+N)
Insertion Loss
−3 dB Bandwidth
CS (OFF)
CD (OFF)
CD, CS (ON)
POWER REQUIREMENTS
IDD
28
−67
−75
0.02
0.06
33
24
105
125
0.003
1.0
1
2
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
nA typ
nA max
nA typ
nA max
nA typ
nA max
±0.1
CIN, Digital Input Capacitance
DYNAMIC CHARACTERISTICS 2
tTRANSISTION
Unit
4
V min
V max
µA typ
µA max
pF typ
ns typ
ns max
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
%
dB typ
MHz typ
pF typ
pF typ
pF typ
µA typ
µA max
Temperature range, Y version: −40°C to +125°C.
Guaranteed by design, not subject to production test.
Rev. A | Page 3 of 16
Test Conditions/Comments
VDD = 2.7 V; VS = 0 V to VDD, IS = 10 mA; Figure 18
VDD = 2.7 V; VS = 0.65 V, IS = 10 mA
VDD = 2.7 V; VS = 0 V to VDD,
IS = 10 mA
VDD = 3.6 V
VS = 1 V/2.6 V; VD = 2.6 V/1 V; Figure 19
VS = 1 V/2.6 V; VD = 2.6 V/1 V; Figure 19
VS = VD = 1 V or 2.6 V; Figure 20
VIN = VINL or VINH
RL = 50 Ω, CL = 35 pF
VS = 1.5 V/0 V; Figure 21
RL = 50 Ω, CL = 35 pF
VS = 1.5 V/0 V; Figure 23
RL = 50 Ω, CL = 35 pF
VS = 1.5 V; Figure 23
RL = 50 Ω, CL = 35 pF
VS1 = VS2 = 1.5 V; Figure 22
VS = 1.5 V, RS = 0 Ω, CL = 1 nF; Figure 24
RL = 50 Ω, CL = 5 pF,f = 100 kHz; Figure 25
RL = 50 Ω, CL = 5 pF, f = 100 kHz; Figure 27
RL = 32 Ω, f = 20 Hz to 20 kHz, VS = 2 V p-p
RL = 50 Ω, CL = 5 pF, f = 100 kHz
RL = 50 Ω, CL = 5 pF; Figure 26
VDD = 3.6 V
Digital inputs = 0 V or 3.6 V
ADG804
Data Sheet
VDD = 2.5 V ± 0.2 V, GND = 0 V, unless otherwise noted.1
Table 2.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
On Resistance Match between
Channels (∆RON)
On Resistance Flatness (RFLAT(ON))
LEAKAGE CURRENTS
Source Off Leakage IS (OFF)
Drain Off Leakage ID (OFF)
Channel On Leakage ID, IS (ON)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current IINL or IINH
+25°C
−40°C to
+85°C
−40°C to
+125°C
0 V to VDD
0.65
0.77
0.4
0.8
0.88
0.08
0.085
0.23
0.24
0.16
±0.1
±2
±0.1
±2
±0.1
±2
1.7
0.7
0.005
tON ENABLE
tOFF ENABLE
Break-Before-Make Time Delay (tBBM)
4
25
31
25
30
5
7
20
33
35
32
34
8
9
5
Charge Injection
Off Isolation
Channel-to-Channel Crosstalk
Total Harmonic Distortion (THD + N)
Insertion Loss
–3 dB Bandwidth
CS (OFF)
CD (OFF)
CD, CS (ON)
POWER REQUIREMENTS
IDD
20
−67
−75
0.022
−0.06
33
25
110
128
0.003
1
4
__________________________________________________________________________
1
2
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
nA typ
nA max
nA typ
nA max
nA typ
nA max
±0.1
CIN, Digital Input Capacitance
DYNAMIC CHARACTERISTICS2
TTRANSISTION
Unit
Temperature range, Y version: −40°C to +125°C.
Guaranteed by design, not subject to production test.
Rev. A | Page 4 of 16
V min
V max
µA typ
µA max
pF typ
ns typ
ns max
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
%
dB typ
MHz typ
pF typ
pF typ
pF typ
µA typ
µA max
Test Conditions/Comments
VDD = 2.3 V; VS = 0 V to VDD, IS = 10 mA; Figure 18
VDD = 2.3 V; VS = 0.7 V; IS = 10 mA
VDD = 2.3 V; VS = 0 V to VDD; IS = 10 mA
VDD = 2.7 V
VS = 1 V/2 V, VD = 2 V/1 V; Figure 19
VS = 1/2 V, VD = 2/1 V; Figure 19
VS = VD = 1 V or 2 V; Figure 20
VIN = VINL or VINH
RL = 50 Ω, CL = 35 pF
VS = 1.5 V/0 V; Figure 21
RL = 50 Ω, CL = 35 pF
VS = 1.5 V/0 V; Figure 22
RL = 50 Ω, CL = 35 pF
VS = 1.5 V; Figure 22
RL = 50 Ω, CL = 35 pF
VS1 = VS2 = 1.5 V; Figure 22
VS = 1.25 V, RS = 0 Ω, CL = 1 nF; Figure 24
RL = 50 Ω, CL = 5 pF, f = 100 kHz; Figure 25
RL = 50 Ω, CL = 5 pF, f = 100 kHz; Figure 27
RL = 32 Ω, f = 20 Hz to 20 kHz, VS = 1.5 V p-p
RL = 50 Ω, CL = 5 pF, f = 100 kHz
RL = 50 Ω, CL = 5 pF; Figure 26
VDD = 2.7 V
Digital inputs = 0 V or 2.7 V
Data Sheet
ADG804
VDD = 1.65 V ± 1.95 V, GND = 0 V, unless otherwise noted.1
Table 3.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
On Resistance Match between Channels (∆RON)
LEAKAGE CURRENTS
Source Off Leakage IS (OFF)
Drain Off Leakage ID (OFF)
Channel On Leakage ID, IS (ON)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current IINL or IINH
+25°C
−40°C to +85°C −40°C to
+125°C
0 V to VDD
1
1.4
2.2
2.2
4
2.2
4
Ω typ
±0.1
±2
±0.1
±2
±0.1
±2
nA typ
nA max
nA typ
nA max
nA typ
nA max
0.65 VDD
0.35 VDD
0.005
4
Break-Before-Make Time Delay (tBBM)
Charge Injection
Off Isolation
12
−67
ns typ
ns max
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
Channel-to-Channel Crosstalk
−75
dB typ
Total Harmonic Distortion (THD + N))
0.14
%
0.08
30
26
115
130
dB typ
MHz typ
pF typ
pF typ
pF typ
0.003
µA typ
µA max
tOFF ENABLE
42
44
40
41
11
13
5
Insertion Loss
–3 dB Bandwidth
CS (OFF)
CD (OFF)
CD, CS (ON)
POWER REQUIREMENTS
IDD
1.0
4
_______________________________________________________________________________________
2
V min
V max
µA typ
µA max
pF typ
32
40
34
39
8
10
22
tON ENABLE
1
V
Ω typ
Ω max
Ω max
0.1
±0.1
CIN, Digital Input Capacitance
DYNAMIC CHARACTERISTICS2
tTRANSISTION
Unit
Temperature range, Y version: −40°C to +125°C.
Guaranteed by design, not subject to production test.
Rev. A | Page 5 of 16
Test Conditions/Comments
VDD = 1.8 V; VS = 0 V to VDD, IS = 10 mA
VDD = 1.65 V, VS = 0 V to VDD,
IS = 10 mA; Figure 18
VDD = 1.65 V, VS = 0.7 V, IS = 10 mA
VDD = 1.95 V
VS = 0.6 V/1.35 V, VD = 1.35 V/0.6 V;
Figure 19
VS = 0.6/1.35 V, VD = 1.35/0.6 V;
Figure 19
VS = VD = 0.6 V or 1.35 V; Figure 20
VIN = VINL or VINH
RL = 50 Ω, CL = 35 pF
VS = 1.5 V/0 V; Figure 21
RL = 50 Ω, CL = 35 pF
VS = 1.5 Ω/0 V; Figure 22
RL = 50 Ω, CL = 35 pF
VS = 1.5 V; Figure 22
RL = 50 Ω, CL = 35 pF
VS1 = VS2 = 1 V; Figure 22
VS = 1 V, RS = 0 V, CL = 1 nF; Figure 24
RL = 50 Ω, CL = 5 pF, f = 100 kHz;
Figure 25
RL = 50 Ω, CL = 5 pF, f = 100 kHz,
Figure 27
RL = 32 Ω, f = 20 Hz to 20 kHz,
VS = 1.2 V p-p
RL = 50 Ω, CL = 5 pF, f = 100 kHz
RL = 50 Ω, CL = 5 pF; Figure 26
VDD = 1.95 V
Digital inputs = 0 V or 1.95 V
ADG804
Data Sheet
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 4.
Parameter
VDD to GND
Analog Inputs1
Digital Inputs1
Peak Current, S or D
3.3 V Operation
2.5 V Operation
1.8 V Operation
Continuous Current, S or D
3.3 V Operation
2.5 V Operation
1.8 V Operation
Operating Temperature Range
Automotive (Y Version)
Storage Temperature Range
Junction Temperature
MSOP Package
θJA Thermal Impedance
θJC Thermal Impedance
Lead Temperature, Soldering
1
Rating
−0.3 V to +4.6 V
−0.3 V to VDD + 0.3 V
−0.3 V to +4.6 V or 10 mA,
whichever occurs first
(Pulsed at 1 ms, 10% Duty
Cycle Max)
500 mA
460 mA
420 mA
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability. Only one absolute maximum rating may be
applied at any one time.
Table 5. ADG804 Truth Table
300 mA
275 mA
250 mA
A1
x
0
0
1
1
−40°C to +125°C
−65°C to +150°C
150°C
206°C/W
44°C/W
As per JEDEC J-STD-020
A0
x
0
1
0
1
ESD CAUTION
Overvoltages at IN, S, or D are clamped by internal diodes. Current should be
limited to the maximum ratings given.
Rev. A | Page 6 of 16
EN
0
1
1
1
1
ON Switch
None
S1
S2
S3
S4
Data Sheet
ADG804
PIN CONFIGURATION
10 A1
A0 1
S1 2
ADG804
9
S2
GND 3
EN 5
6
VDD
NC = NO CONNECT
04307-0-002
8 D
TOP VIEW
S3 4 (Not to Scale) 7 S4
Figure 2. 10-Lead MSOP (RM-10)
Table 6. Terminology
VDD
IDD
GND
S
D
EN
A0, A1
VD, VS
RON
RFLAT (ON)
∆RON
IS (OFF)
ID (OFF)
ID, IS (ON)
VINL
VINH
IINL (IINH)
CS (OFF)
CD (OFF)
CD, CS (ON)
CIN
tON (EN)
tOFF (EN)
tTRANSITION
tBBM
Charge Injection
Off Isolation
Crosstalk
−3 dB Bandwidth
On Response
Insertion Loss
THD + N
Most positive power supply potential.
Positive supply current.
Ground (0 V) reference.
Source terminal. May be an input or an output.
Drain terminal. May be an input or an output.
Active high logic control input.
Logic control inputs. Used to select which source terminal, S1 to S4, is connected to the drain, D.
Analog voltage on terminals D, S.
Ohmic resistance between D and S.
Flatness is defined as the difference between the maximum and minimum value of on resistance as measured over the
specified analog signal range.
On resistance match between any two channels.
Source leakage current with the switch off.
Drain leakage current with the switch off.
Channel leakage current with the switch on.
Maximum input voltage for Logic 0.
Minimum input voltage for Logic 1.
Input current of the digital input.
Off switch source capacitance. Measured with reference to ground.
Off switch drain capacitance. Measured with reference to ground.
On switch capacitance. Measured with reference to ground.
Digital input capacitance.
Delay time between the 50% and the 90% points of the digital input and switch on condition.
Delay time between the 50% and the 90% points of the digital input and switch off condition.
Delay time between the 50% and the 90% points of the digital input and switch on condition when switching from one
address state to the other.
On or off time measured between the 80% points of both switches when switching from one to another.
A measure of the glitch impulse transferred from the digital input to the analog output during on-off switching.
A measure of unwanted signal coupling through an off switch.
A measure of unwanted signal which is coupled through from one channel to another as a result of parasitic capacitance.
The frequency at which the output is attenuated by 3 dB.
The frequency response of the on switch.
The loss due to the on resistance of the switch.
The ratio of the harmonic amplitudes plus noise of a signal to the fundamental.
Rev. A | Page 7 of 16
ADG804
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
0.60
1.2
TA = 25°C
VDD = 3.3V
0.55
1.0
VDD = 2.7V
VDD = 3V
ON RESISTANCE ()
ON RESISTANCE ()
0.50
0.45
0.40
VDD = 3.3V
VDD = 3.6V
0.35
0.8
+125°C
+85°C
0.6
0.4
+25°C
0.30
0
0.5
1.0
1.5
2.0
VD, VS (V)
2.5
0
0
3.5
3.0
04307-0-007
0.20
–40°C
0.3
04307-0-004
0.25
0.5
1.0
1.5
2.0
2.5
3.0
VD, VS (V)
Figure 3. On Resistance vs. VD (VS) VDD = 2.7 V to 3.6 V
Figure 6. On Resistance vs. VD (VS) for Different Temperature, VDD = 3.3 V
1.2
1.2
VDD = 2.5V
TA = 25°C
1.0
1.0
ON RESISTANCE ()
ON RESISTANCE ()
VDD = 2.3V
0.8
0.6
VDD = 2.5V
VDD = 2.7V
0.4
+125°C
0.8
+85°C
0.6
+25°C
0.4
–40°C
0.2
0
0.5
1.0
1.5
2.0
04307-0-008
0.2
04307-0-005
0.3
0
2.5
0
0.5
1.0
1.5
VD, VS (V)
Figure 4. On Resistance vs. VD (VS) VDD = 2.5 V ± 0.2 V
2.5
Figure 7. On Resistance vs. VD (VS) for Different Temperature, VDD = 2.5 V
1.8
1.4
TA = 25°C
VDD = 1.8V
1.6
1.2
VDD = 1.65V
1.4
ON RESISTANCE ()
+125°C
1.2
VDD = 1.8V
1.0
0.8
0.6
+25°C
–40°C
1.0
0.9
0.7
+85°C
0.5
0.4
0.2
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
0.2
0
1.8
0
VD, VS (V)
Figure 5. On Resistance vs. VD (VS) VDD = 1.8 ± 0.15 V
04307-0-009
VDD = 1.95V
04307-0-006
ON RESISTANCE ()
2.0
VD, VS (V)
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
VD, VS (V)
Figure 8. On Resistance vs. VD (VS) for Different Temperature, VDD = 1.8 V
Rev. A | Page 8 of 16
Data Sheet
ADG804
90
90
VDD = 3.3V
TA = 25°C
80
80
70
70
VDD = 3.6V
60
50
QINJ (pC)
ID, IS (ON)
40
50
40
VDD = 2.5V
30
ID (OFF)
20
30
VDD = 1.8V
20
10
04307-0-012
CURRENT (nA)
60
10
0
IS (OFF)
0
20
40
60
80
100
120
TEMPERATURE (°C)
0
04307-0-010
–10
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
VS (V)
Figure 12. Charge Injection vs. Source Voltage, VDD = 1.8 V
Figure 9. Leakage Current vs. Temperature, VDD = 3.3 V
35
100
VDD = 1.8V
tONENABLE
VDD = 2.5V
30
80
VDD = 2.5V
60
TIME (ns)
40
ID, IS (ON)
VDD = 3V
15
tOFFENABLE
IS (OFF)
20
20
VDD = 1.8V
10
0
VDD = 2.5V
04307-0-013
CURRENT (nA)
25
5
VDD = 3V
ID (OFF)
0
20
40
60
80
100
120
TEMPERATURE (°C)
0
–40
04307-0-011
–20
–20
Figure 10. Leakage Current vs. Temperature, VDD = 2.5 V
0
20
40
60
TEMPERATURE (°C)
80
100
120
Figure 13. tON/tOFF Times vs. Temperature
70
0
VDD = 1.8V
60
–2
–4
ATTENUATION (dB)
50
40
30
ID, IS (ON)
20
ID (OFF)
–6
–8
–10
–12
–14
10
–18
IS (OFF)
–0
0
20
40
60
80
100
120
TEMPERATURE (°C)
04307-0-014
–16
0
04307-0-017
CURRENT (nA)
TA = 25°C
VDD = 3.3V/2.5V/1.8V
Figure 11. Leakage Current vs. Temperature, VDD = 1.8 V
–20
0.03
0.1
1
10
FREQUENCY (MHz)
Figure 14. Bandwidth
Rev. A | Page 9 of 16
100
300
ADG804
Data Sheet
0.10
VDD = 2.5V
–10
TA = 25°C
–30
0.08
TA = 25°C
VDD = 3.3V/2.5V/1.8V
–40
THD + N (%)
ATTENUATION (dB)
–20
–50
–60
S1A – D1
32Ω LOAD
1.5V p-p
0.06
0.04
–70
0.1
1
10
100
0
20
300
FREQUENCY (MHz)
TA = 25°C
VDD = 3.3V/2.5V/1.8V
–40
–50
–60
–70
04307-0-016
ATTENUATION (dB)
–20
–80
0.1
1
10
100
200
500
1k
2k
5k
Figure 17. Total Harmonic Distortion + Noise
–10
–90
0.03
50
FREQUENCY (Hz)
Figure 15. Off Isolation vs. Frequency
–30
0430-0-028
–90
0.03
0.02
04307-0-015
–80
100
300
FREQUENCY (MHz)
Figure 16. Crosstalk vs. Frequency
Rev. A | Page 10 of 16
10k
20k
Data Sheet
ADG804
TEST CIRCUITS
IDS
V1
IS (OFF)
ID (OFF)
A
ID (ON)
VD
VS
Figure 18. On Resistance
D
S
NC
VD
Figure 19. Off Leakage
Figure 20. On Leakage
VDD
0.1µF
VS
+2.4V
ADDRESS
DRIVE (EN)
50%
S1
S2
S3
VS1
0V
S4
VS4
VOUT
D
EN
3V
50%
90%
90%
VOUT
RL
50Ω
GND
CL
35pF
tTRANSITION
tTRANSITION
04307-0-021
VDD
A1
A0
Figure 21. Switching Time of Multiplexer, tTRANSITION
VDD
0.1µF
VS
50Ω
S1
S2
S3
VS
50%
VOUT
S4
80%
+2.4V
D
EN
50%
0V
VIN
80%
VOUT
RL
50Ω
GND
CL
35pF
tBBM
04307-0-022
VDD
A1
A0
tBBM
Figure 22. Break-Before-Make Time Delay, tBBM
VDD
0.1µF
A1
A0
S1
S2
S3
ADDRESS
DRIVE (VIN)
VS
3V
50%
V0
S4
OUTPUT
D
EN
50Ω
GND
VOUT
RL
50Ω
0.9V0
0.9V0
0V
CL
35pF
Figure 23. Enable Delay, tON(EN), tOFF(EN)
Rev. A | Page 11 of 16
50%
0V
tON(EN)
tOFF(EN)
04307-0-023
VDD
A
04307-0-020
RON = V1/IDS
D
S
A
04307-0-019
VS
D
04307-0-018
S
ADG804
Data Sheet
VDD
VOUT
VOUT
VDD
QINJ = CL VOUT
R8
VOUT
CL
1nF
V8
DECODER
GND
VIN
A1 A2
SW OFF
SW OFF
CHARGE INJECTION = VOUT  CL
EN
04307-0-024
SW ON
Figure 24. Charge Injection
VDD
VDD
0.1F
0.1F
NETWORK
ANALYZER
NETWORK
ANALYZER
VDD
VDD
S1
50
50
OFF ISOLATION = 20 LOG
VS
50
CHANNEL-TO-CHANNEL CROSSTALK = 20 LOG
VDD
0.1F
NETWORK
ANALYZER
50
VS
D
OFF ISOLATION = 20 LOG
VOUT
VOUT WITH SWITCH
VOUT WITHOUT SWITCH
*UNUSED CHANNELS TERMINATED WITH 50 TO GROUND
04307-0-026
RL
50
GND
VOUT
VS
Figure 27. Channel-to-Channel Crosstalk
Figure 25. Off Isolation
Sx*
VOUT
GND
VOUT
VDD
D
RL
VOUT
04307-0-025
GND
S2
VS
D
RL
50
50
50
VS
Figure 26. Bandwidth
Rev. A | Page 12 of 16
04307-0-027
S
Data Sheet
ADG804
OUTLINE DIMENSIONS
3.10
3.00
2.90
10
3.10
3.00
2.90
5.15
4.90
4.65
6
1
5
PIN 1
IDENTIFIER
0.50 BSC
0.95
0.85
0.75
15° MAX
1.10 MAX
0.30
0.15
6°
0°
0.23
0.13
0.70
0.55
0.40
COMPLIANT TO JEDEC STANDARDS MO-187-BA
091709-A
0.15
0.05
COPLANARITY
0.10
Figure 28. 10-Lead Mini Small Outline Package [MSOP]
(RM-10)
Dimensions shown in millimeters
ORDERING GUIDE
Model1
ADG804YRM
ADG804YRMZ
ADG804YRMZ-REEL
ADG804YRMZ-REEL7
Temperature Range
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
Package Description
10-Lead Mini Small Outline Package (MSOP)
10-Lead Mini Small Outline Package (MSOP)
10-Lead Mini Small Outline Package (MSOP)
10-Lead Mini Small Outline Package (MSOP)
1
Z= RoHS compliant part.
Branding on this package is limited to three characters due to space constraints.
3
# denotes lead-free product may be top or bottom marked
2
Rev. A | Page 13 of 16
Package Option
RM-10
RM-10
RM-10
RM-10
Branding2, 3
S1A
S0N#
S0N#
S0N#
ADG804
Data Sheet
NOTES
Rev. A | Page 14 of 16
Data Sheet
ADG804
NOTES
Rev. A | Page 15 of 16
ADG804
Data Sheet
NOTES
© 2004–2011 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D04307–0–9/11(A)
Rev. A | Page 16 of 16