AD ADG836LYRM-REEL

0.5 Ω CMOS 1.65 V to 3.6 V
Dual SPDT/2:1 MUX
ADG836L
FEATURES
FUNCTIONAL BLOCK DIAGRAM
0.5 Ω typical on resistance
0.8 Ω maximum on resistance at 125°C
1.65 V to 3.6 V operation
Automotive temperature range: –40°C to +125°C
Guaranteed leakage specifications up to 125°C
High current carrying capability: 300 mA continuous
Rail-to-rail switching operation
Fast switching times <20 ns
Typical power consumption: <0.1 µW
ADG836L
S1A
D1
S1B
IN1
IN2
S2A
D2
APPLICATIONS
SWITCHES SHOWN FOR A LOGIC 1 INPUT
Cellular phones
PDAs
MP3 players
Power routing
Battery-powered systems
PCMCIA cards
Modems
Audio and video signal routing
Communication systems
04753-0-001
S2B
Figure 1.
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
The ADG836L is a low voltage CMOS device containing two
independently selectable single-pole, double-throw (SPDT)
switches. This device offers ultralow on resistance of less than
0.8 Ω over the full temperature range. The ADG836L is fully
specified for 3.3 V, 2.5 V, and 1.8 V supply operation.
1.
Less than 0.8 Ω over full temperature range of
−40°C to +125°C.
2.
Single 1.65 V to 3.6 V operation.
3.
Compatible with 1.8 V CMOS logic.
Each switch conducts equally well in both directions when on
and has an input signal range that extends to the supplies. The
ADG836L exhibits break-before-make switching action.
4.
High current handling capability (300 mA continuous
current at 3.3 V).
5.
Low THD + N (0.02% typ).
6.
Small 10-lead MSOP package.
The ADG836L is available in a 10-lead package.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703
© 2004 Analog Devices, Inc. All rights reserved.
ADG836L
TABLE OF CONTENTS
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 6
Truth Table ........................................................................................ 6
Pin Terminology ............................................................................... 7
Typical Performance Characteristics ............................................. 8
Test Circuits..................................................................................... 11
Outline Dimensions ....................................................................... 13
Ordering Guide........................................................................... 14
REVISION HISTORY
5/04—Data Sheet Changed from Rev. 0 to Rev. A
Updated Ordering Guide............................................................... 14
4/04—Revision 0: Initial Version
Rev. A | Page 2 of 16
ADG836L
SPECIFICATIONS
Table 1. VDD = 2.7 V to 3.6 V, GND = 0 V, unless otherwise noted.1
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
On Resistance Match between
Channels (∆RON)
On Resistance Flatness (RFLAT (ON))
LEAKAGE CURRENTS
Source Off Leakage IS (OFF)
Channel On Leakage ID, IS (ON)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IINL or IINH
+25°C
0.5
0.65
0.04
−40°C – +85°C
−40°C – +125°C
Unit
Test Conditions/Comments
0 V to VDD
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
VDD = 2.7 V
VDD = 2.7 V, VS = 0 V to VDD, IS = 10 mA
(Figure 18)
VDD = 2.7 V, VS = 0.65 V, IS = 10 mA
0.75
0.075
0.8
0.08
0.15
0.16
0.1
±0.2
±1
±0.2
±1
±10
±100
±15
±120
2
0.8
tOFF
Break-before-Make Time Delay
(tBBM)
VIN = VINL or VINH
ns typ
ns max
ns typ
ns max
ns typ
RL = 50 Ω, CL = 35 pF
VS = 1.5 V/0 V (Figure 21)
RL = 50 Ω, CL = 35 pF
VS = 1.5 V (Figure 21)
RL = 50 Ω, CL = 35 pF
40
−67
−90
ns min
pC typ
dB typ
dB typ
−67
dB typ
0.02
%
VS1 = VS2 = 1.5 V (Figure 22)
VS = 1.5 V, RS = 0 Ω, CL = 1 nF (Figure 23)
RL = 50 Ω, CL = 5 pF, f = 100 kHz (Figure 24)
S1A−S2A/S1B−S2B (Figure 27)
RL = 50 Ω, CL = 5 pF, f = 100 kHz
S1A−S1B/S2A−S2B (Figure 26)
RL = 50 Ω, CL = 5 pF, f = 100 kHz
RL = 32 Ω, f = 20 Hz to 20 kHz, VS = 2 V p-p
−0.05
57
25
75
dB typ
MHz typ
pF typ
pF typ
0.003
µA typ
µA max
0.005
4
21
26
4
7
17
28
29
8
9
5
Charge Injection
Off Isolation
Channel-to-Channel Crosstalk
Total Harmonic Distortion
(THD + N)
Insertion Loss
−3 dB Bandwidth
CS (OFF)
CD, CS (ON)
POWER REQUIREMENTS
IDD
1
1
2
VDD = 3.6 V
VS = 0.6 V/3.3 V, VD = 3.3 V/0.6 V
(Figure 19)
VS = VD = 0.6 V or 3.3 V (Figure 20)
V min
V max
µA typ
µA max
pF typ
±0.1
CIN, Digital Input Capacitance
DYNAMIC CHARACTERISTICS2
tON
nA typ
nA max
nA typ
nA max
VDD = 2.7 V, VS = 0 V to VDD, IS = 10 mA
4
Temperature range for Y version is −40°C to +125°C.
Guaranteed by design, not subject to production test.
Rev. A | Page 3 of 16
RL = 50 Ω, CL = 5 pF (Figure 25)
RL = 50 Ω, CL = 5 pF (Figure 25)
VDD = 3.6 V
Digital inputs = 0 V or 3.6 V
ADG836L
Table 2. VDD = 2.5 V ± 0.2 V, GND = 0 V, unless otherwise noted.1
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
On Resistance Match between
Channels (∆RON)
On Resistance Flatness (RFLAT (ON))
LEAKAGE CURRENTS
Source Off Leakage IS (OFF)
Channel On Leakage ID, IS (ON)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
CIN, Digital Input Capacitance
DYNAMIC CHARACTERISTICS2
tON
tOFF
Break-before-Make Time Delay
(tBBM)
+25°C
−40°C – +85°C −40°C – +125°C
0 V to VDD
0.65
0.72
0.04
0.8
0.88
0.08
0.085
0.23
0.24
0.16
±0.2
±0.4
±0.2
±0.6
Total Harmonic Distortion
(THD + N)
Insertion Loss
–3 dB Bandwidth
CS (OFF)
CD, CS (ON)
POWER REQUIREMENTS
IDD
2
VDD = 2.3 V, VS = 0 V to VDD, IS = 10 mA
(Figure 18)
VDD = 2.3 V, VS = 0.7 V, IS = 10 mA
VDD = 2.3 V, VS = 0 V to VDD, IS = 10 mA
VDD = 2.7 V
VS = 0.6 V/2.4 V, VD = 2.4 V/0.6 V
(Figure 19)
VS = VD = 0.6 V or 2.4 V (Figure 20)
±4
±45
±12
±90
1.7
0.7
V min
V max
µA typ
µA max
pF typ
VIN = VINL or VINH
±0.1
ns typ
ns max
ns typ
ns max
ns typ
RL = 50 Ω, CL = 35 pF
VS = 1.5 V/0 V (Figure 21)
RL = 50 Ω, CL = 35 pF
VS = 1.5 V (Figure 21)
RL = 50 Ω, CL = 35 pF
30
−67
−90
ns min
pC typ
dB typ
dB typ
−67
dB typ
0.022
%
VS1 = VS2 = 1.5 V (Figure 22)
VS = 1.25 V, RS = 0 Ω, CL = 1 nF (Figure 23)
RL = 50 Ω, CL = 5 pF, f = 100 kHz (Figure 24)
S1A−S2A/S1B−S2B;
RL = 50 V, CL = 5 pF, f = 100 kHz;Figure 27
S1A−S1B/S2A−S2B;
RL = 50 Ω, CL = 5 pF, f = 100 kHz Figure 25
RL = 32 Ω, f = 20 Hz to 20 kHz, VS = 1.5 V p-p
−0.06
57
25
75
dB typ
MHz typ
pF typ
pF typ
0.003
µA typ
µA max
0.005
4
23
29
5
7
17
30
31
8
9
1
1
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
Test Conditions/Comments
nA typ
nA max
nA typ
nA max
5
Charge Injection
Off Isolation
Channel-to-Channel Crosstalk
Unit
4
Temperature range for Y version is −40°C to +125°C.
Guaranteed by design, not subject to production test.
Rev. A | Page 4 of 16
RL = 50 Ω, CL = 5 pF (Figure 25)
RL = 50 Ω, CL = 5 pF (Figure 25)
VDD = 2.7 V
Digital inputs = 0 V or 2.7 V
ADG836L
Table 3. VDD = 1.65 V ± 1.95 V, GND = 0 V, unless otherwise noted.1
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
On Resistance Match between
Channels (∆RON)
LEAKAGE CURRENTS
Source Off Leakage IS (OFF)
Channel On Leakage ID, IS (ON)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
CIN, Digital Input Capacitance
DYNAMIC CHARACTERISTICS2
tON
tOFF
Break-before-Make Time Delay
(tBBM)
+25°C
1
1.4
2
0.1
±0.2
±0.4
±0.2
±0.6
−40°C – +85°C
2.2
4
−40°C – +125°C
Unit
Test Conditions/Comments
0 V to VDD
V
Ω typ
Ω max
Ω typ
Ω typ
VDD = 1.8 V, VS = 0 V to VDD, IS = 10 mA
(Figure 18)
VDD = 1.65 V, VS = 0 V to VDD, IS = 10 mA
VDD = 1.65 V, VS = 0.7 V, IS = 10 mA
2.2
4
±4
±25
±10
±75
0.65 VDD
0.35 VDD
V min
V max
µA typ
µA max
pF typ
VIN = VINL or VINH
±0.1
ns typ
ns max
ns typ
ns max
ns typ
RL = 50 Ω, CL = 35 pF
VS = 1.5 Ω/0 V (Figure 21)
RL = 50 Ω, CL = 35 pF
VS = 1.5 V (Figure 21)
RL = 50 Ω, CL = 35 pF
VS1 = VS2 = 1 V (Figure 22)
VS = 1 V, RS = 0 V, CL = 1 nF (Figure 23)
RL = 50 Ω, CL = 5 pF, f = 100 kHz,
(Figure 24)
S1A−S2A/S1B−S2B;
RL = 50 Ω, CL = 5 pF, f = 100 kHz
(Figure 27)
S1A−S1B/S2A−S2B;
RL = 50 Ω, CL = 5 pF, f = 100 kHz
(Figure 25)
RL = 32 Ω, f = 20 Hz to 20 kHz,
VS = 1.2 V p-p
RL = 50 Ω, CL = 5 pF (Figure 25)
RL = 50 Ω, CL = 5 pF (Figure 25)
0.005
4
28
37
7
9
21
38
39
10
11
Charge Injection
Off Isolation
20
−67
5
ns min
pC typ
dB typ
Channel-to-Channel Crosstalk
−90
dB typ
−67
dB typ
Total Harmonic Distortion
(THD + N)
0.14
%
Insertion Loss
–3 dB Bandwidth
CS (OFF)
CD, CS (ON)
POWER REQUIREMENTS
IDD
−0.08
57
25
75
dB typ
MHz typ
pF typ
pF typ
0.003
µA typ
µA max
1.0
1
2
VDD = 1.95 V
VS = 0.6 V/1.65 V, VD = 1.65 V/0.6 V
(Figure 19)
VS = VD = 0.6 V or 1.65 V Figure 20
nA typ
nA max
nA typ
nA max
4
Temperature range for Y version is −40°C to +125°C.
Guaranteed by design, not subject to production test.
Rev. A | Page 5 of 16
VDD = 1.95 V
Digital inputs = 0 V or 1.95 V
ADG836L
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability. Only one absolute maximum rating may be
applied at any one time.
Table 4.
Parameter
VDD to GND
Analog Inputs1
Digital Inputs1
Peak Current, S or D
3.3 V Operation
2.5 V Operation
1.8 V Operation
Continuous Current, S or D
3.3 V Operation
2.5 V Operation
1.8 V Operation
Operating Temperature Range
Automotive (Y Version)
Storage Temperature Range
Junction Temperature
MSOP Package
θJA Thermal Impedance
θJC Thermal Impedance
IR Reflow, Peak Temperature
<20 sec
1
Rating
−0.3 V to +4.6 V
−0.3 V to VDD + 0.3 V
−0.3 V to 4.6 V or 10 mA,
whichever occurs first
500 mA
460 mA
420 mA (pulsed at 1 ms, 10%
Duty Cycle Max)
TRUTH TABLE
Table 5.
300 mA
275 mA
250 mA
Logic
0
1
Switch A
Off
On
−40°C to +125°C
−65°C to +150°C
150°C
206°C/W
44°C/W
235°C
Overvoltages at IN, S, or D are clamped by internal diodes. Current should be
limited to the maximum ratings given.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. A | Page 6 of 6
Switch B
On
Off
ADG836L
PIN TERMINOLOGY
10 D1
IN1 1
ADG836L
S2A 4
IN2 5
7 S2B
6 D2
04753-0-002
9 S1B
TOP VIEW
GND 3 (Not to Scale) 8 VDD
S1A 2
Figure 2. 10-Lead MSOP (RM-10)
Table 6.
Mnemonic
VDD
IDD
GND
S
D
IN
VD (VS)
RON
RFLAT (ON)
∆RON
IS (OFF)
ID (OFF)
ID, IS (ON)
VINL
VINH
IINL (IINH)
CS (OFF)
CD (OFF)
CD, CS (ON)
CIN
tON
tOFF
tBBM
Charge Injection
Off Isolation
Crosstalk
−3 dB Bandwidth
On Response
Insertion Loss
THD + N
Description
Most positive power supply potential.
Positive supply current.
Ground (0 V) reference.
Source terminal. May be an input or output.
Drain terminal. May be an input or output.
Logic control input.
Analog voltage on terminals D and S.
Ohmic resistance between terminals D and S.
Flatness is defined as the difference between the maximum and minimum value of on resistance as measured
On resistance match between any two channels.
Source leakage current with the switch off.
Drain leakage current with the switch off.
Channel leakage current with the switch on.
Maximum input voltage for Logic 0.
Minimum input voltage for Logic 1.
Input current of the digital input.
Off switch source capacitance. Measured with reference to ground.
Off switch drain capacitance. Measured with reference to ground.
On switch capacitance. Measured with reference to ground.
Digital input capacitance.
Delay time between the 50% and the 90% points of the digital input and switch on condition.
Delay time between the 50% and the 90% points of the digital input and switch off condition.
On or off time measured between the 80% points of both switches when switching from one to another.
A measure of the glitch impulse transferred from the digital input to the analog output during on-off switching.
A measure of unwanted signal coupling through an off switch.
A measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance.
The frequency at which the output is attenuated by 3 dB.
The frequency response of the on switch.
The loss due to the on resistance of the switch.
The ratio of the harmonic amplitudes plus noise of a signal, to the fundamental.
Rev. A | Page 7 of 16
ADG836L
TYPICAL PERFORMANCE CHARACTERISTICS
0.60
1.2
TA = 25°C
VDD = 3.3V
0.55
VDD = 3V
1.0
VDD = 2.7V
ON RESISTANCE (Ω)
ON RESISTANCE (Ω)
0.50
0.45
0.40
VDD = 3.3V
VDD = 3.6V
0.35
0.8
+125°C
+85°C
0.6
0.4
+25°C
0.30
–40°C
0.20
0
0.5
1.0
1.5
2.0
VD, VS (V)
2.5
3.0
04449-0-007
0.2
04449-0-004
0.25
0
0
3.5
1.0
1.5
2.0
2.5
3.0
VD, VS (V)
Figure 3. On Resistance vs. VD (VS), VDD = 2.7 V to 3.6 V
Figure 6. On Resistance vs. VD (VS) for Different
Temperature, VDD = 3.3 V
0.8
1.2
TA = 25°C
VDD = 2.5V
0.7
1.0
VDD = 2.3V
ON RESISTANCE (Ω)
ON RESISTANCE (Ω)
0.5
0.6
0.5
VDD = 2.5V
VDD = 2.7V
0.4
+125°C
0.8
+85°C
0.6
+25°C
0.4
–40°C
0.2
0
1.0
0.5
1.5
2.0
04449-0-008
0.2
04449-0-005
0.3
0
2.5
0
0.5
1.0
VD, VS (V)
Figure 4. On Resistance vs. VD (VS), VDD = 2.5 V ± 0.2 V
1.4
TA = 25°C
2.5
–40°C
VDD = 1.8V
1.6
2.0
Figure 7. On Resistance vs. VD (VS) for Different
Temperature, VDD = 2.5 V
1.8
1.2
VDD = 1.65V
+25°C
+125°C
ON RESISTANCE (Ω)
1.4
1.2
VDD = 1.8V
1.0
0.8
0.6
1.0
0.8
0.7
+85°C
0.5
VDD = 1.95V
0.4
0.2
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
04449-0-009
0.2
04449-0-006
ON RESISTANCE (Ω)
1.5
VD, VS (V)
0
0
2.0
VD, VS (V)
0.2
0.4
0.6
0.8
1.0
1.2
1.4
VD, VS (V)
Figure 5. On Resistance vs. VD (VS), VDD = 1.8 V ± to 0.15 V
Figure 8. On Resistance vs. VD (VS) for Different
Temperature, VDD = 1.8 V
Rev. A | Page 8 of 16
1.6
1.8
ADG836L
90
80
VDD = 3.3V
ID, IS (ON)
70
40
60
QINJ (pC)
20
0
50
40
VCC = 3.3V
–20
VCC = 2.5V
30
IS (OFF)
–40
–80
0
20
40
60
80
100
VCC = 1.8V
04449-0-013
04449-0-010
20
–60
10
0
120
0
0.5
1.0
1.5
2.0
2.5
3.0
TEMPERATURE (°C)
VS (V)
Figure 9. Leakage Current vs. Temperature, VDD = 3.3 V
Figure 12. Charge Injection vs. Source Voltage
60
3.5
35
VDD = 2.5V
50
30
40
VDD = 2.5V
ID, IS (ON)
10
0
–10
04449-0-011
–40
20
40
60
80
100
15
VDD = 2.5V
VDD = 1.8V
tOFF
–30
0
VDD = 3V
10
IS (OFF)
–20
20
5
0
–40
120
04449-0-014
20
TIME (ns)
CURRENT (nA)
VDD = 1.8V
tON
25
30
VDD = 3V
Ð20
0
TEMPERATURE (°C)
20
40
60
80
100
120
TEMPERATURE (°C)
Figure 13. tON/tOFF Times vs. Temperature
Figure 10. Leakage Current vs. Temperature, VDD = 2.5 V
1
50
VDD = 1.8V
0
–1
40
–2
ATTENUATION (dB)
30
IS, ID (ON)
20
10
0
IS (OFF)
0
20
40
60
80
100
–4
–5
TA = 25°C
VCC = 3.3V/2.5V/1.8V
–6
–7
–8
–9
–11
04449-0-015
–10
–20
–3
–10
04449-0-012
CURRENT (nA)
CURRENT (nA)
TA = 25°C
80
60
–12
–13
0.01
120
TEMPERATURE (°C)
0.1
1
10
FREQUENCY (MHz)
Figure 11. Leakage Current vs. Temperature, VDD = 1.8 V
Figure 14. Bandwidth
Rev. A | Page 9 of 16
100
1000
ADG836L
0.10
0
–10
TA = 25°C
VCC = 3.3V/2.5V/1.8V
–30
THD + N (%)
ATTENUATION (dB)
–20
VDD = 2.5V
TA = 25°C
S1A–D1
32V LOAD
0.08
1.5V p-p
–40
–50
0.06
0.04
–60
–80
0.01
0.1
1
10
100
0
20
1000
–10
S1A–S1B
–20
ATTENUATION (dB)
TA = 25°C
VCC = 3.3V/2.5V/1.8V
–40
S1A–S2A
–50
–60
–70
04449-0-017
–80
–90
0.1
1
10
100
200
500
1k
2k
5k
Figure 17. Total Harmonic Distortion + Noise
Figure 15. Off Isolation vs. Frequency
–100
0.01
50
FREQUENCY (Hz)
FREQUENCY (MHz)
–30
04449-0-018
04449-0-016
0.02
–70
100
1000
FREQUENCY (MHz)
Figure 16. Crosstalk vs. Frequency
Rev. A | Page 10 of 16
10k
20k
ADG836L
TEST CIRCUITS
IDS
V1
D
A
VS
ID (ON)
VD
Figure 18. On Resistance
S
NC
D
VD
Figure 19. Off Leakage
Figure 20. On Leakage
VDD
0.1µF
VDD
S1B
S1A
VS
VOUT
D
RL
50Ω
IN
50%
VIN
CL
35pF
50%
90%
90%
GND
tON
tOFF
04449-0-022
VOUT
Figure 21. Switching Times, tON, tOFF
VDD
0.1µF
50%
VDD
S1B
S1A
VS
VIN
RL
IN
80%
CL
35pF
80%
tBBM
tBBM
04449-0-023
50Ω
50%
0V
VOUT
VOUT
D
GND
Figure 22. Break-before-Make Time Delay, tBBM
VDD
SW ON
SW OFF
VIN
S1B
NC
D
S1A
VOUT
1nF
IN
VOUT
∆VOUT
QINJ = CL × ∆VOUT
GND
Figure 23. Charge Injection
Rev. A | Page 11 of 16
04449-0-024
VS
A
04449-0-021
RON = V1/IDS
ID (OFF)
S
A
04449-0-019
VS
D
04449-0-020
IS (OFF)
S
ADG836L
VDD
VDD
0.1µF
0.1µF
NETWORK
ANALYZER
VDD
VDD
S1A
VOUT
S1A
50Ω
RL
50Ω
50Ω
D
S1B
VS
D
RL
50Ω
50Ω
VOUT
VOUT
GND
CHANNEL-TO-CHANNEL CROSSTALK = 20 LOG
VS
Figure 24. Off Isolation
04449-0-027
GND
OFF ISOLATION = 20 LOG
VS
04449-0-025
RL
50Ω
VOUT
VS
Figure 25. Channel-to-Channel Crosstalk (S1A–S1B)
VDD
0.1µF
NETWORK
ANALYZER
VDD
S1B
NETWORK
ANALYZER
VOUT
50Ω
50Ω
S1A
S2A
D2
NC
S2B
VS
D
GND
INSERTION LOSS = 20 LOG
VOUT
VOUT WITH SWITCH
50Ω
VS
S1A
S1B
CHANNEL-TO-CHANNEL CROSSTALK = 20 LOG
VOUT WITHOUT SWITCH
Figure 26. Bandwidth
D1
NC
VOUT
VS
Figure 27. Channel-to-Channel Crosstalk (S1A–S2A)
Rev. A | Page 12 of 16
50Ω
04449-0-028
RL
50Ω
04449-0-026
NC
S1B
ADG836L
OUTLINE DIMENSIONS
3.00 BSC
10
6
4.90 BSC
3.00 BSC
1
5
PIN 1
0.50 BSC
0.95
0.85
0.75
0.15
0.00
1.10 MAX
0.27
0.17
SEATING
PLANE
0.23
0.08
8°
0°
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-187BA
Figure 28. 10-Lead Mini Small Outline Package [MSOP]
(RM-10)
Dimensions shown in millimeters
Rev. A | Page 13 of 16
0.80
0.60
0.40
ADG836L
ORDERING GUIDE
Model
ADG836LYRM
ADG836LYRM-REEL
ADG836LYRM-REEL7
Temperature Range
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
Package Description
Mini Small Outline Package (MSOP)
Mini Small Outline Package (MSOP)
Mini Small Outline Package (MSOP)
Rev. A | Page 14 of 16
Package Option
RM-10
RM-10
RM-10
Branding
SQA
SQA
SQA
ADG836L
NOTES
Rev. A | Page 15 of 16
ADG836L
NOTES
© 2004 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D04753–0–5/04(A)
Rev. A | Page 16 of 16