PD -95054 SMPS MOSFET IRFP450APbF HEXFET® Power MOSFET Applications l Switch Mode Power Supply ( SMPS ) l Uninterruptable Power Supply l High speed power switching l Lead-Free Benefits l Low Gate Charge Qg results in Simple Drive Requirement l Improved Gate, Avalanche and Dynamic dv/dt Ruggedness l Fully Characterized Capacitance and Avalanche Voltage and Current l Effective Coss Specified ( See AN 1001) VDSS Rds(on) max ID 500V 0.40Ω 14A TO-247AC G DS Absolute Maximum Ratings ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C VGS dv/dt TJ TSTG Parameter Max. Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torqe, 6-32 or M3 screw 14 8.7 56 190 1.5 ± 30 4.1 -55 to + 150 Units A W W/°C V V/ns °C 300 (1.6mm from case ) 10 lbf•in (1.1N•m) Typical SMPS Topologies: l l l Two Transistor Forward Half Bridge, Full Bridge PFC Boost Notes through are on page 8 www.irf.com 1 2/26/04 IRFP450APbF Static @ TJ = 25°C (unless otherwise specified) Parameter Drain-to-Source Breakdown Voltage ∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) Gate Threshold Voltage V(BR)DSS IDSS Drain-to-Source Leakage Current IGSS Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Min. 500 ––– ––– 2.0 ––– ––– ––– ––– Typ. ––– 0.58 ––– ––– ––– ––– ––– ––– Max. Units Conditions ––– V VGS = 0V, ID = 250µA ––– V/°C Reference to 25°C, ID = 1mA 0.40 Ω VGS = 10V, ID = 8.4A 4.0 V VDS = VGS, ID = 250µA 25 VDS = 500V, VGS = 0V µA 250 VDS = 400V, VGS = 0V, TJ = 125°C 100 VGS = 30V nA -100 VGS = -30V Dynamic @ TJ = 25°C (unless otherwise specified) gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss Coss Coss eff. Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance Min. 7.8 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– Typ. ––– ––– ––– ––– 15 36 35 29 2038 307 10 2859 81 96 Max. Units Conditions ––– S VDS = 50V, ID = 8.4A 64 ID = 14A 16 nC VDS = 400V 26 VGS = 10V, See Fig. 6 and 13 ––– VDD = 250V ––– I D = 14A ns ––– RG = 6.2Ω ––– R D = 17Ω,See Fig. 10 ––– VGS = 0V ––– VDS = 25V ––– pF ƒ = 1.0MHz, See Fig. 5 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz ––– VGS = 0V, VDS = 400V, ƒ = 1.0MHz ––– VGS = 0V, VDS = 0V to 400V Avalanche Characteristics Parameter EAS IAR EAR Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Typ. Max. Units ––– ––– ––– 760 14 19 mJ A mJ Typ. Max. Units ––– 0.24 0.65 ––– 40 °C/W Thermal Resistance Parameter RθJC RθCS RθJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient Diode Characteristics IS I SM VSD trr Q rr ton 2 Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol 14 ––– ––– showing the A G integral reverse ––– ––– 56 S p-n junction diode. ––– ––– 1.4 V TJ = 25°C, IS = 14A, VGS = 0V ––– 487 731 ns TJ = 25°C, IF = 14A ––– 3.9 5.8 µC di/dt = 100A/µs Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) www.irf.com IRFP450APbF 100 100 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V I D, Drain-to-Source Current (A) I D , Drain-to-Source Current (A) 10 1 4.5V 0.1 20µs PULSE WIDTH TJ = 25 °C 0.01 0.1 1 10 10 4.5V 1 RDS(on) , Drain-to-Source On Resistance (Normalized) I D , Drain-to-Source Current (A) 3.0 TJ = 150 ° C 10 TJ = 25 ° C 1 V DS = 50V 20µs PULSE WIDTH 7.0 8.0 9.0 10.0 VGS , Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics www.irf.com 10 100 Fig 2. Typical Output Characteristics 100 6.0 1 VDS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics 5.0 20µs PULSE WIDTH TJ = 150 °C 0.1 0.1 100 VDS , Drain-to-Source Voltage (V) 0.1 4.0 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP TOP 14A ID = 13A 2.5 2.0 1.5 1.0 0.5 0.0 -60 -40 -20 VGS = 10V 0 20 40 60 80 100 120 140 160 TJ , Junction Temperature ( °C) Fig 4. Normalized On-Resistance Vs. Temperature 3 IRFP450APbF 100000 VGS , Gate-to-Source Voltage (V) 10000 C, Capacitance (pF) 20 V GS = 0V, f = 1MHz Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd Coss = Cds + C gd Ciss 1000 Coss 100 10 Crss 1 1 10 100 1000 ID = 14A 13A 16 VDS = 400V VDS = 250V VDS = 100V 12 8 4 A 0 FOR TEST CIRCUIT SEE FIGURE 13 0 15 30 45 60 75 QG , Total Gate Charge (nC) VDS , Drain-to-Source Voltage (V) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 100 100 ISD , Reverse Drain Current (A) OPERATION IN THIS AREA LIMITED BY RDS(on) 10us I D , Drain Current (A) TJ = 150 ° C 10 TJ = 25 ° C 1 0.1 0.2 V GS = 0 V 0.4 0.6 0.8 1.0 1.2 VSD ,Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 4 1.4 100us 10 1ms 1 TC = 25 °C TJ = 150 ° C Single Pulse 10 10ms 100 1000 VDS , Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area www.irf.com IRFP450APbF 14 RD VDS ID , Drain Current (A) 12 VGS 10 8 + -V DD 10V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 6 Fig 10a. Switching Time Test Circuit 4 VDS 2 0 D.U.T. RG 90% 25 50 75 100 125 150 TC , Case Temperature ( °C) Fig 9. Maximum Drain Current Vs. Case Temperature 10% VGS td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms Thermal Response (Z thJC ) 1 D = 0.50 0.20 0.1 0.10 0.05 0.02 0.01 0.01 PDM SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.001 0.00001 0.0001 0.001 0.01 0.1 1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRFP450APbF DRIVER L VDS + V - DD IAS 20V 0.01Ω tp TOP BOTTOM 1200 D.U.T RG EAS , Single Pulse Avalanche Energy (mJ) 1600 15V Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS tp A ID 6.3A 8.9A 14A 800 400 0 25 50 75 100 125 150 Starting TJ , Junction Temperature( ° C) I AS Fig 12c. Maximum Avalanche Energy Vs. Drain Current Fig 12b. Unclamped Inductive Waveforms QG QGS 640 QGD VG Charge Fig 13a. Basic Gate Charge Waveform Current Regulator Same Type as D.U.T. 50KΩ 12V .2µF .3µF D.U.T. V DSav , Avalanche Voltage (V) 10 V 620 600 580 560 + V - DS 540 0 VGS 4 6 8 10 12 14 I av , Avalanche Current (A) 3mA IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit 6 2 Fig 12d. Typical Drain-to-Source Voltage Vs. Avalanche Current www.irf.com A IRFP450APbF Peak Diode Recovery dv/dt Test Circuit + D.U.T Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer + - - + RG • • • • Driver Gate Drive P.W. + dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test Period D= - VDD P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Curent Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS www.irf.com 7 IRFP450APbF TO-247AC Package Outline -D- 3.65 (.143) 3.55 (.140) 15.90 (.626) 15.30 (.602) -B- 0.25 (.010) M D B M -A- 5.50 (.217) 20.30 (.800) 19.70 (.775) 2X 1 2 5.30 (.209) 4.70 (.185) 2.50 (.089) 1.50 (.059) 4 NOTES: 5.50 (.217) 4.50 (.177) 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION : INCH. 3 CONFORMS TO JEDEC OUTLINE TO-247-AC. 3 -C- 14.80 (.583) 14.20 (.559) 4.30 (.170) 3.70 (.145) 2.40 (.094) 2.00 (.079) 2X 5.45 (.215) 0.80 (.031) 3X 0.40 (.016) 1.40 (.056) 3X 1.00 (.039) 0.25 (.010) M 2.60 (.102) 2.20 (.087) C A S 3.40 (.133) 3.00 (.118) 2X LEAD ASSIGNMENTS IGBT Hexfet 1 - Gate 1 -LEAD GateASSIGNMENTS 1 - GATE2 - Collector 2 - Drain 2 - DRAIN 3 - Emitter 3 - Source 3 - SOURCE 4 - Drain 4 - DRAIN4 - Collector TO-247AC Part Marking InformaEXAMPLE: THIS IS AN IRFPE30 WIT H AS SEMBLY LOT CODE 5657 ASS EMBLED ON WW 35, 2000 IN T HE ASS EMBLY LINE "H" Note: "P" in assembly line position indicates "Lead-Free" INTERNATIONAL RECT IFIER LOGO AS S EMBLY LOT CODE PART NUMBER IRFPE30 56 035H 57 DAT E CODE YEAR 0 = 2000 WEEK 35 LINE H Notes: Repetitive rating; pulse width limited by Pulse width ≤ 300µs; duty cycle ≤ 2%. Starting TJ = 25°C, L =7.8mH Coss eff. is a fixed capacitance that gives the same charging time max. junction temperature. ( See fig. 11 ) RG = 25Ω, IAS = 14A. (See Figure 12) as Coss while VDS is rising from 0 to 80% VDSS ISD ≤ 14A, di/dt ≤ 130A/µs, VDD ≤ V(BR)DSS, TJ ≤ 150°C Data and specifications subject to change without notice. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.02/04 8 www.irf.com