IRF IRFBC30APBF

PD - 95700
SMPS MOSFET
IRFBC30APbF
HEXFET® Power MOSFET
Applications
Switch Mode Power Supply (SMPS)
l Uninterruptable Power Supply
l High speed power switching
l Lead-Free
l
Benefits
Low Gate Charge Qg results in Simple
Drive Requirement
l Improved Gate, Avalanche and dynamic
dv/dt Ruggedness
l Fully Characterized Capacitance and
Avalanche Voltage and Current
l Effective Coss specified (See AN 1001)
VDSS
Rds(on) max
ID
600V
2.2Ω
3.6A
l
TO-220AB
G DS
Absolute Maximum Ratings
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
dv/dt
TJ
TSTG
Parameter
Max.
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current 
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery dv/dt ƒ
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torqe, 6-32 or M3 screw
3.6
2.3
14
74
0.69
± 30
7.0
-55 to + 150
Units
A
W
W/°C
V
V/ns
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Typical SMPS Topology:
l
Single transistor Flyback
Notes 
through … are on page 8
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1
9/10/04
IRFBC30APbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
Gate Threshold Voltage
V(BR)DSS
IDSS
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Min.
600
–––
–––
2.0
–––
–––
–––
–––
Typ.
–––
0.67
–––
–––
–––
–––
–––
–––
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 1mA†
2.2
Ω
VGS = 10V, ID = 2.2A „
4.5
V
VDS = VGS, ID = 250µA
25
VDS = 600V, VGS = 0V
µA
250
VDS = 480V, VGS = 0V, TJ = 125°C
100
VGS = 30V
nA
-100
VGS = -30V
Dynamic @ TJ = 25°C (unless otherwise specified)
gfs
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
Min.
2.1
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
–––
–––
–––
9.8
13
19
12
510
70
3.5
730
19
31
Max. Units
Conditions
–––
S
VDS = 50V, ID = 2.2A
23
ID = 3.6A
5.4
nC VDS = 480V
11
VGS = 10V, See Fig. 6 and 13 „
–––
VDD = 300V
–––
ID = 3.6A
ns
–––
RG = 12Ω
–––
R D = 82Ω,See Fig. 10 „
–––
VGS = 0V
–––
VDS = 25V
–––
pF
ƒ = 1.0MHz, See Fig. 5
–––
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 480V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 0V to 480V …
Avalanche Characteristics
Parameter
EAS
IAR
EAR
Single Pulse Avalanche Energy‚
Avalanche Current
Repetitive Avalanche Energy
Typ.
Max.
Units
–––
–––
–––
290
3.6
7.4
mJ
A
mJ
Typ.
Max.
Units
–––
0.50
–––
1.7
–––
62
°C/W
Thermal Resistance
Parameter
RθJC
RθCS
RθJA
Junction-to-Case
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
Diode Characteristics
IS
ISM
V SD
t rr
Q rr
ton
2
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode) 
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– ––– 3.6
showing the
A
G
integral reverse
––– –––
14
S
p-n junction diode.
––– ––– 1.6
V
TJ = 25°C, IS = 3.6A, VGS = 0V „
––– 400 600
ns
TJ = 25°C, IF = 3.6A
––– 1.1 1.7
µC
di/dt = 100A/µs „
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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IRFBC30APbF
100
10
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
10
TOP
1
0.1
4.5V
20µs PULSE WIDTH
TJ = 25 °C
0.01
0.1
1
10
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
TOP
1
4.5V
0.1
0.1
100
3.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
100
10
TJ = 150 ° C
1
TJ = 25 ° C
0.1
V DS = 50V
20µs PULSE WIDTH
5.0
6.0
7.0
8.0
Fig 3. Typical Transfer Characteristics
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10
100
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
VGS , Gate-to-Source Voltage (V)
1
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
0.01
4.0
20µs PULSE WIDTH
TJ = 150 ° C
9.0
ID = 3.6A
2.5
2.0
1.5
1.0
0.5
0.0
-60 -40 -20
VGS = 10V
0
20
40
60
80 100 120 140 160
TJ , Junction Temperature ( °C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRFBC30APbF
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
C, Capacitance(pF)
1000
Ciss
100
Coss
10
Crss
20
VGS , Gate-to-Source Voltage (V)
10000
10
100
VDS = 480V
VDS = 300V
VDS = 120V
16
12
8
4
1
1
ID = 3.6A
0
1000
FOR TEST CIRCUIT
SEE FIGURE 13
0
4
16
20
24
100
100
OPERATION IN THIS AREA LIMITED
BY RDS(on)
ID , Drain Current (A)
ISD , Reverse Drain Current (A)
12
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
10
TJ = 150° C
TJ = 25 ° C
1
0.1
0.4
V GS = 0 V
0.6
0.8
1.0
VSD ,Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
8
QG , Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)
1.2
10us
10
100us
1
0.1
1ms
10ms
TC = 25 ° C
TJ = 150 ° C
Single Pulse
10
100
1000
10000
VDS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRFBC30APbF
4.0
RD
V DS
ID , Drain Current (A)
VGS
3.0
RG
2.0
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
D.U.T.
+
-VDD
10V
Fig 10a. Switching Time Test Circuit
1.0
VDS
90%
0.0
25
50
75
100
125
TC , Case Temperature ( ° C)
150
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
10
1 D = 0.50
0.20
0.10
0.1
PDM
0.05
0.02
0.01
0.01
0.00001
t1
t2
SINGLE PULSE
(THERMAL RESPONSE)
0.0001
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
15V
DRIVER
L
VDS
D.U.T
RG
+
V
- DD
IAS
20V
0.01Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
A
EAS , Single Pulse Avalanche Energy (mJ)
IRFBC30APbF
700
TOP
600
BOTTOM
ID
1.6A
2.3A
3.6A
500
400
300
200
100
0
25
50
75
100
125
150
Starting TJ , Junction Temperature( ° C)
I AS
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
QG
10 V
QGS
QGD
VG
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
12V
.2µF
.3µF
D.U.T.
+
V
- DS
VGS
V DSav , Avalanche Voltage ( V )
740
720
700
680
660
3mA
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
6
640
0.012d. Typical
1.0
2.0
3.0 Voltage
4.0
Fig
Drain-to-Source
IAVAvalanche
, Avalanche Current
( A)
Vs.
Current
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IRFBC30APbF
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
ƒ
+
‚
-
-
„
+

RG
•
•
•
•
Driver Gate Drive
P.W.
+
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Period
D=
-
VDD
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
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7
IRFBC30APbF
TO-220AB Package Outline
10.54 (.415)
10.29 (.405)
2.87 (.113)
2.62 (.103)
-B-
3.78 (.149)
3.54 (.139)
4.69 (.185)
4.20 (.165)
-A-
1.32 (.052)
1.22 (.048)
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
L E A D A S S IG N M E N T S
1.15 (.045)
MIN
1
2
4- D R A IN
14.09 (.555)
13.47 (.530)
4- C O LLEC TO R
4.06 (.160)
3.55 (.140)
3X
3X
LEAD ASSIGNMENTS
IG B T s, C oP A C K
1 - GATE
1 - G A T2E- DRAIN
1- G A TE
- SOURCE 2 - C O L L E C T O R
2 - D R A3I N
3 - S O U4R- CDRAIN
E
3 - E M IT T E R
HEXFET
3
1.40 (.055)
1.15 (.045)
0.93 (.037)
0.69 (.027)
0.36 (.014)
3X
M
B
A
M
0.55 (.022)
0.46 (.018)
2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
2 CONTROLLING DIMENSION : INCH
3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
TO-220AB Part Marking Information
E X AM P L E :
T H I S I S A N IR F 1 0 1 0
L OT COD E 1789
AS S E MB L E D O N W W 19, 1 997
I N T H E A S S E M B L Y L I N E "C "
N o te : " P " in a s s e m b ly lin e
p o s it io n in d ic a te s " L e a d -F re e "
IN T E R N A T I O N A L
R E C T IF IE R
LOGO
AS S E M B L Y
LOT CODE
P AR T N U MB E R
D AT E C O D E
YE AR 7 = 1997
W E E K 19
L IN E C
Notes:
 Repetitive rating; pulse width limited by
„ Pulse width ≤ 300µs; duty cycle ≤ 2%.
‚ Starting TJ = 25°C, L = 41mH
… Coss eff. is a fixed capacitance that gives the same charging time
max. junction temperature. ( See fig. 11 )
RG = 25Ω, IAS = 3.6A. (See Figure 12)
as Coss while VDS is rising from 0 to 80% VDSS
ƒ ISD ≤ 3.6A, di/dt ≤ 170A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 150°C
Data and specifications subject to change without notice.
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8
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