PD - 94821
SMPS MOSFET
IRFB9N60APbF
HEXFET® Power MOSFET
Applications
Switch Mode Power Supply ( SMPS )
Uninterruptable Power Supply
High speed power switching
Lead-Free
Benefits
Low Gate Charge Qg results in Simple
Drive Requirement
Improved Gate, Avalanche and dynamic
dv/dt Ruggedness
Fully Characterized Capacitance and
Avalanche Voltage and Current
VDSS
600V
Rds(on) max
ID
0.75Ω
9.2A
TO-220AB
GDS
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
dv/dt
TJ
TSTG
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery dv/dt Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torqe, 6-32 or M3 screw
Max.
9.2
5.8
37
170
1.3
± 30
5.0
-55 to + 150
Units
A
W
W/°C
V
V/ns
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Applicable Off Line SMPS Topologies:
Active Clamped Forward
Main Switch
Notes through www.irf.com
are on page 8
1
11/7/03
IRFB9N60APbF
Static @ TJ = 25°C (unless otherwise specified)
RDS(on)
VGS(th)
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
IDSS
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
V(BR)DSS
∆V(BR)DSS/∆TJ
Min.
600
–––
–––
2.0
–––
–––
–––
–––
Typ.
–––
0.66
–––
–––
–––
–––
–––
–––
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 1mA
0.75
Ω
VGS = 10V, ID = 5.5.A 4.0
V
VDS = VGS, ID = 250µA
25
VDS = 600V, VGS = 0V
µA
250
VDS = 480V, VGS = 0V, TJ = 125°C
100
VGS = 30V
nA
-100
VGS = -30V
Dynamic @ TJ = 25°C (unless otherwise specified)
gfs
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
Min.
5.5
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
–––
–––
–––
13
25
30
22
1400
180
7.1
1957
49
96
Max. Units
Conditions
–––
S
VDS = 50V, ID = 5.5A
49
ID = 9.2A
13
nC
VDS = 400V
20
VGS = 10V, See Fig. 6 and 13 –––
VDD = 300V
–––
ID = 9.2A
ns
–––
RG = 9.1Ω
–––
RD = 35.5Ω,See Fig. 10 –––
VGS = 0V
–––
VDS = 25V
–––
pF
ƒ = 1.0MHz, See Fig. 5
–––
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 480V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 0V to 480V Avalanche Characteristics
Parameter
EAS
IAR
EAR
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Typ.
Max.
Units
–––
–––
–––
290
9.2
17
mJ
A
mJ
Typ.
Max.
Units
–––
0.50
–––
0.75
–––
62
°C/W
Thermal Resistance
Parameter
RθJC
RθCS
RθJA
Junction-to-Case
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
Diode Characteristics
IS
ISM
VSD
trr
Qrr
ton
2
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode) Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– ––– 9.2
showing the
A
G
integral reverse
––– –––
37
S
p-n junction diode.
––– ––– 1.5
V
TJ = 25°C, IS = 9.2A, VGS = 0V ––– 530 800
ns
TJ = 25°C, IF = 9.2A
––– 3.0 4.4
µC di/dt = 100A/µs Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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IRFB9N60APbF
100
100
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.7V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.7V
10
TOP
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
TOP
1
4.7V
20µs PULSE WIDTH
TJ = 25 °C
0.1
0.1
1
10
10
4.7V
20µs PULSE WIDTH
TJ = 150 ° C
1
100
1
3.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
100
TJ = 150 ° C
TJ = 25 ° C
1
0.1
4.0
V DS = 50V
20µs PULSE WIDTH
5.0
6.0
7.0
8.0
9.0
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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100
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
10
10
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
10.0
ID = 9.2A
2.5
2.0
1.5
1.0
0.5
0.0
-60 -40 -20
VGS = 10V
0
20
40
60
80 100 120 140 160
TJ , Junction Temperature ( °C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRFB9N60APbF
1000
Ciss
C, Capacitance (pF)
10000
V GS = 0V,
f = 1MHz
Ciss = Cgs + Cgd , Cds SHORTED
Crss = Cgd
Coss = Cds + C gd
20
VGS , Gate-to-Source Voltage (V)
100000
Coss
100
10
Crss
1
1
10
100
1000
ID = 9.2A
400V
VDS = 480V
VDS = 300V
VDS = 120V
16
12
8
4
0
A
FOR TEST CIRCUIT
SEE FIGURE 13
0
10
40
50
1000
100
OPERATION IN THIS AREA LIMITED
BY RDS(on)
100
ID , Drain Current (A)
ISD , Reverse Drain Current (A)
30
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
10
TJ = 150 ° C
1
TJ = 25 ° C
0.1
0.2
V GS = 0 V
0.5
0.7
1.0
VSD ,Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
20
QG , Total Gate Charge (nC)
V DS , Drain-to-Source Voltage (V)
1.2
10us
10
100us
1ms
1
0.1
10ms
TC = 25 ° C
TJ = 150 ° C
Single Pulse
10
100
1000
10000
VDS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRFB9N60APbF
10.0
RD
VDS
VGS
ID , Drain Current (A)
8.0
D.U.T.
RG
6.0
+
-VDD
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
4.0
Fig 10a. Switching Time Test Circuit
2.0
VDS
90%
0.0
25
50
75
100
125
TC , Case Temperature ( ° C)
150
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
1
D = 0.50
0.20
0.1
0.10
PDM
0.05
t1
0.02
0.01
0.01
0.00001
t2
SINGLE PULSE
(THERMAL RESPONSE)
0.0001
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
15V
L
VDS
D.U.T
RG
IAS
20V
DRIVER
+
V
- DD
0.01Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
A
EAS , Single Pulse Avalanche Energy (mJ)
IRFB9N60APbF
600
TOP
500
BOTTOM
ID
4.1A
5.8A
9.2A
400
300
200
100
0
25
50
75
100
125
150
Starting TJ , Junction Temperature ( °C)
V(BR)DSS
tp
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I AS
Current Regulator
Same Type as D.U.T.
Fig 12b. Unclamped Inductive Waveforms
50KΩ
QG
10 V
QGS
.3µF
D.U.T.
QGD
+
V
- DS
VGS
VG
3mA
Charge
Fig 13a. Basic Gate Charge Waveform
6
12V
.2µF
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
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IRFB9N60APbF
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
-
-
+
RG
•
•
•
•
Driver Gate Drive
P.W.
+
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Period
D=
-
VDD
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
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7
IRFB9N60APbF
TO-220AB Package Outline
10.54 (.415)
10.29 (.405)
2.87 (.113)
2.62 (.103)
-B-
3.78 (.149)
3.54 (.139)
4.69 (.185)
4.20 (.165)
-A-
1.32 (.052)
1.22 (.048)
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
LEAD ASSIGNMENTS
1.15 (.045)
MIN
1
2
3
4- DRAIN
14.09 (.555)
13.47 (.530)
4- COLLECTOR
4.06 (.160)
3.55 (.140)
3X
3X
LEAD ASSIGNMENTS
IGBTs, CoPACK
1 - GATE
2 - DRAIN
1- GATE
1- GATE
3 - SOURCE 2- COLLECTOR
2- DRAIN
3- SOURCE
3- EMITTER
4 - DRAIN
HEXFET
1.40 (.055)
1.15 (.045)
0.93 (.037)
0.69 (.027)
0.36 (.014)
3X
M
B A M
0.55 (.022)
0.46 (.018)
2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
2 CONTROLLING DIMENSION : INCH
3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
TO-220AB Part Marking Information
EXAMPLE: THIS IS AN IRF1010
LOT CODE 1789
ASSEMBLED O N WW 19, 1997
IN THE ASSEMBLY LINE "C"
Note: "P" in assembly line
position indicates "Lead-Free"
INTERNATIO NAL
RECTIFIER
LO GO
ASSEMBLY
LOT CODE
PART NUMBER
DATE CODE
YEAR 7 = 1997
WEEK 19
LINE C
Notes:
Repetitive rating; pulse width limited by
Pulse width ≤ 300µs; duty cycle ≤ 2%.
Starting TJ = 25°C, L = 6.8mH
Coss eff. is a fixed capacitance that gives the same charging time
max. junction temperature. ( See fig. 11 )
RG = 25Ω, IAS = 9.2A. (See Figure 12)
as Coss while VDS is rising from 0 to 80% VDSS
ISD ≤ 9.2A, di/dt ≤ 50A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 150°C
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.11/03
8
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Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/