Revised March 2005
74AC245 • 74ACT245
Octal Bidirectional Transceiver with 3-STATE
Inputs/Outputs
General Description
Features
The AC/ACT245 contains eight non-inverting bidirectional
buffers with 3-STATE outputs and is intended for bus-oriented applications. Current sinking capability is 24 mA at
both the A and B ports. The Transmit/Receive (T/R) input
determines the direction of data flow through the bidirectional transceiver. Transmit (active-HIGH) enables data
from A ports to B ports; Receive (active-LOW) enables
data from B ports to A ports. The Output Enable input,
when HIGH, disables both A and B ports by placing them in
a HIGH Z condition.
■ ICC and IOZ reduced by 50%
■ Non-inverting buffers
■ Bidirectional data path
■ A and B outputs source/sink 24 mA
■ ACT245 has TTL-compatible inputs
Ordering Code:
Order Number
Package
Package Description
Number
74AC245SC
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74AC245SJ
M20D
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74AC245MTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74AC245PC
N20A
74ACT245SC
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74ACT245SCX_NL
(Note 1)
M20B
Pb-Free 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74ACT245SJ
74ACT245MSA
M20D
MSA20
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
74ACT245MTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74ACT245MTCX_NL
(Note 1)
MTC20
Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
74ACT245PC
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.
FACT¥ is a trademark of Fairchild Semiconductor Corporation.
© 2005 Fairchild Semiconductor Corporation
DS009944
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74AC245 • 74ACT245 Octal Bidirectional Transceiver with 3-STATE
November 1988
74AC245 • 74ACT245
Connection Diagram
Pin Descriptions
Pin
Description
Names
OE
Output Enable Input
T/R
Transmit/Receive Input
A0–A7
Side A 3-STATE Inputs or 3-STATE Outputs
B0–B7
Side B 3-STATE Inputs or 3-STATE Outputs
Truth Table
Inputs
Outputs
Logic Symbols
OE
L
L
L
H
Bus A Data to Bus B
H
X
HIGH-Z State
H HIGH Voltage Level
L LOW Voltage Level
X Immaterial
IEEE/IEC
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2
T/R
Bus B Data to Bus A
Recommended Operating
Conditions
0.5V to 7.0V
Supply Voltage (VCC)
DC Input Diode Current (IIK)
VI
VI
0.5V
VCC 0.5V
DC Input Voltage (VI)
Supply Voltage (VCC)
20 mA
20 mA
0.5V to VCC 0.5V
DC Output Diode Current (IOK)
VO
VO
0.5V
VCC 0.5V
DC Output Voltage (VO)
20 mA
20 mA
0.5V to VCC 0.5V
per Output Pin (ICC or IGND)
0V to VCC
Output Voltage (VO)
0V to VCC
40qC to 85qC
AC Devices
VIN from 30% to 70% of VCC
r50 mA
VCC @ 3.3V, 4.5V, 5.5V
125 mV/ns
Minimum Input Edge Rate ('V/'t)
r50 mA
65qC to 150qC
ACT Devices
VIN from 0.8V to 2.0V
Junction Temperature (TJ)
VCC @ 4.5V, 5.5V
140qC
PDIP
4.5V to 5.5V
Input Voltage (VI)
Operating Temperature (TA)
DC VCC or Ground Current
Storage Temperature (TSTG)
2.0V to 6.0V
ACT
Minimum Input Edge Rate ('V/'t)
DC Output Source
or Sink Current (IO)
AC
125 mV/ns
Note 2: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power
supply, temperature, and output/input loading variables. Fairchild does not
recommend operation of FACT¥ circuits outside databook specifications.
DC Electrical Characteristics for AC
Symbol
VIH
VIL
VOH
VOL
Parameter
VCC
TA
25qC
TA
40qC to 85qC
(V)
Typ
Guaranteed Limits
Minimum HIGH Level
3.0
1.5
2.1
2.1
Input Voltage
4.5
2.25
3.15
3.15
5.5
2.75
3.85
3.85
Maximum LOW Level
3.0
1.5
0.9
0.9
Input Voltage
4.5
2.25
1.35
1.35
5.5
2.75
1.65
1.65
Minimum HIGH Level
3.0
2.99
2.9
2.9
Output Voltage
4.5
4.49
4.4
4.4
5.5
5.49
5.4
5.4
3.0
2.56
2.46
4.5
3.86
3.76
5.5
4.86
4.76
Units
Conditions
VOUT
0.1V
V
or VCC 0.1V
V
or VCC 0.1V
V
IOUT
50 PA
VOUT
V
Maximum LOW Level
3.0
0.002
0.1
0.1
Output Voltage
4.5
0.001
0.1
0.1
5.5
0.001
0.1
0.1
3.0
0.36
0.44
4.5
0.36
0.44
5.5
0.36
0.44
5.5
r 0.1
r 1.0
PA
V
V
0.1V
VIN
VIL or VIH
IOH
12 mA
IOH
24 mA
IOH
24 mA (Note 3)
50 PA
IOUT
VIN
VIL or VIH
IOL
12 mA
IOL
24 mA
IOL
Maximum Input Leakage Current
IOLD
Dynamic Output
5.5
75
mA
VOLD
IOHD
Current Minimum (Note 4)
5.5
75
mA
VOHD
VIN
ICC (Note 5) Maximum Quiescent Supply Current
IOZT
5.5
4.0
40.0
PA
5.5
r 0.3
r 3.0
PA
Maximum I/O
Leakage Current
VI
24 mA (Note 3)
IIN (Note 5)
VCC, GND
1.65V Max
3.85V Min
VCC or GND
VI (OE)
VI
VO
VIL, VIH
VCC, GND
VCC, GND
Note 3: All outputs loaded; thresholds on input associated with output under test.
Note 4: Maximum test duration 2.0 ms, one output loaded at a time.
Note 5: IIN and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC.
3
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74AC245 • 74ACT245
Absolute Maximum Ratings(Note 2)
74AC245 • 74ACT245
DC Characteristics for ACT
Symbol
VIH
VIL
VOH
VOL
IIN
Parameter
VCC
TA
25qC
40qC to 85qC
TA
(V)
Typ
Guaranteed Limits
Minimum HIGH Level
4.5
1.5
2.0
2.0
Input Voltage
5.5
1.5
2.0
2.0
Maximum LOW Level
4.5
1.5
0.8
0.8
Input Voltage
5.5
1.5
0.8
0.8
Minimum HIGH Level
4.5
4.49
4.4
4.4
Output Voltage
5.5
5.49
5.4
5.4
4.5
3.86
3.76
5.5
4.86
4.76
Units
V
0.1V
or VCC 0.1V
VOUT
V
0.1V
or VCC 0.1V
V
V
Maximum LOW Level
4.5
0.001
0.1
0.1
Output Voltage
5.5
0.001
0.1
0.1
4.5
0.36
0.44
5.5
0.36
0.44
5.5
r0.1
r1.0
PA
1.5
mA
Maximum Input
Conditions
VOUT
IOUT
50 PA
VIN
VIL or VIH
IOH
24 mA
IOH
24 mA (Note 6)
50 PA
IOUT
V
V
VIN
VIL or VIH
IOL
24 mA
IOL
24 mA (Note 6)
VI
VCC, GND
VI
VCC 2.1V
Leakage Current
ICCT
Maximum
5.5
ICC/Input
0.6
IOLD
Dynamic Output
5.5
75
mA
VOLD
IOHD
Current Minimum (Note 7)
5.5
75
mA
VOHD
ICC
Maximum Quiescent
Supply Current
IOZT
5.5
4.0
40.0
PA
5.5
r0.3
r3.0
PA
Maximum I/O
1.65V Max
VIN
3.85V Min
VCC
or GND
VI (OE)
Leakage Current
VI
VO
V IL, VIH
VCC, GND
VCC, GND
Note 6: All outputs loaded; thresholds on input associated with output under test.
Note 7: Maximum test duration 2.0 ms, one output loaded at a time.
AC Electrical Characteristics for AC
Symbol
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
Parameter
VCC
TA
25qC
(V)
CL
50 pF
TA
40qC to 85qC
CL
50 pF
(Note 8)
Min
Typ
Max
Min
Propagation Delay
3.3
1.5
5.0
8.5
1.0
9.0
An to Bn or Bn to An
5.0
1.5
3.5
6.5
1.0
7.0
Propagation Delay
3.3
1.5
5.0
8.5
1.0
9.0
An to Bn or Bn to An
5.0
1.5
3.5
6.0
1.0
7.0
Output Enable Time
3.3
2.5
7.0
11.5
2.0
12.5
5.0
1.5
5.0
8.5
1.0
9.0
3.3
2.5
7.5
12.0
2.0
13.5
5.0
1.5
5.5
9.0
1.0
9.5
Output Enable Time
Output Disable Time
Output Disable Time
3.3
2.0
6.5
12.0
1.0
12.5
5.0
1.5
5.5
9.0
1.0
10.0
3.3
2.0
7.0
11.5
1.5
13.0
5.0
1.5
5.5
9.0
1.0
10.0
Note 8: Voltage Range 3.3 is 3.3V r 0.3V
Voltage Range 5.0 is 5.0V r 0.5V
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Units
Max
ns
ns
ns
ns
ns
ns
Symbol
tPLH
Parameter
Propagation Delay
VCC
TA
25qC
(V)
CL
50 pF
TA
40qC to 85qC
CL
50 pF
Units
(Note 9)
Min
Typ
Max
Min
Max
5.0
1.5
4.0
7.5
1.5
8.0
ns
5.0
1.5
4.0
8.0
1.0
9.0
ns
ns
An to Bn or Bn to An
tPHL
Propagation Delay
An to Bn or Bn to An
tPZH
Output Enable Time
5.0
1.5
5.0
10.0
1.5
11.0
tPZL
Output Enable Time
5.0
1.5
5.5
10.0
1.5
12.0
ns
tPHZ
Output Disable Time
5.0
1.5
5.5
10.0
1.0
11.0
ns
tPLZ
Output Disable Time
5.0
2.0
5.0
10.0
1.5
11.0
ns
Note 9: Voltage Range 5.0 is 5.0V r 0.5V
Capacitance
Symbol
Parameter
CIN
Input Capacitance
CI/O
Input/Output Capacitance
CPD
Power Dissipation Capacitance
Typ
Units
4.5
pF
VCC
OPEN
15.0
pF
VCC
5.0V
45.0
pF
VCC
5.0V
5
Conditions
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74AC245 • 74ACT245
AC Electrical Characteristics for ACT
74AC245 • 74ACT245
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Package Number M20B
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6
74AC245 • 74ACT245
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
7
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74AC245 • 74ACT245
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
Package Number MSA20
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8
74AC245 • 74ACT245
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC20
9
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74AC245 • 74ACT245 Octal Bidirectional Transceiver with 3-STATE
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Package Number N20A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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10