CYPRESS CY2CC810SC

COMLINK™ SERIES
CY2CC810
1:10 Clock Fanout Buffer
Features
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Description
Low-voltage operation
VDD range from 2.5V to 3.3V
1:10 fanout
Over voltage tolerant input hot swappable
Drives either a 50-Ohm or 75-Ohm transmission line
Low-input capacitance
Low-output skew
Low-propagation delay
Typical (tpd < 4 ns)
High-speed operation > 500 MHz
Industrial versions available
Available packages include: SOIC, SSOP
The Cypress series of network circuits are produced using
advanced 0.35-micron CMOS technology, achieving the
industries fastest logic and buffers.
The Cypress CY2CC810 fanout buffer features one input and
ten outputs. Designed for data communications clock
management applications, the large fanout from a single input
reduces loading on the input clock.
AVCMOS-type outputs dynamically adjust for variable
impedance matching and eliminate the need for series
damping resistors; they also reduce noise overall.
Block Diagram
Pin Configuration
Q1
GND
Q3
VD D
Q1
VDD
Q2
Q4
GND
Q5
IN
INPUT
Q6
Q3
VDD
Q4
Q7
GND
20
19
18
17
16
15
14
13
12
11
VDD
Q10
Q9
GND
Q8
VDD
Q7
GND
Q6
Q5
20 pin SOIC/SSOP
Q8
GND
1
2
3
4
5
6
7
8
9
10
CY2CC810
IN
Q2
Q9
Q 10
OUTPUT
(AVCMOS)
Pin Description
Pin Number
Pin Name
1
Description
IN
Input
LVCMOS
2, 6, 10, 13, 17
GND
Ground
Power
4, 8, 15, 20
VDD
Power Supply
Power
Q1... Q10
Output
AVCMOS
3, 5, 7, 9, 11, 12, 14, 16, 18, 19
Cypress Semiconductor Corporation
Document #: 38-07056 Rev. *C
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3901 North First Street
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San Jose
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CA 95134 • 408-943-2600
Revised December 14, 2002
COMLINK™ SERIES
CY2CC810
Maximum Ratings[1][2]
Storage Temperature: ................................–65°C to + 150°C
Supply Voltage to Ground Potential
Ambient Temperature:................................... –40°C to +85°C
(Outputs only) ........................................... –0.5V to VDD + 1V
Supply Voltage to Ground Potential
DC Output Voltage.................................... –0.5V to VDD + 1V
VCC .................................................................. –0.5V to 4.6V
Power Dissipation........................................................ 0.75W
Input ................................................................. –0.5V to 5.8V
DC Electrical Characteristics @ 3.3V (see Figure 5)
Parameter
VOH
VOL
VIH
VIL
IIH
IIL
II
VIK
IOK
OOFF
VH
Description
Conditions
Min.
Output High Voltage
VDD = Min., VIN = VIH or VIL
IOH = –12 mA
Output Low Voltage
VDD = Min., VIN = VIH or VIL
IOL = 12 mA
Input High Voltage
Guaranteed Logic High Level
Input Low Voltage
Guaranteed Logic Low Level
2.3
Typ.
Max.
Unit
0.5
V
3.3
0.2
2
V
5.8
V
0.8
V
Input High Current
VDD = Max.
VIN = 2.7V
1
uA
Input Low Current
VDD = Max.
VIN = 0.5V
–1
uA
Input High Current
VDD = Max., VIN = VDD(Max.)
Clamp Diode Voltage
VDD = Min., IIN = –18 mA
Continuous Clamp Current
Power-down Disable
Input Hysteresis
VDD = Min., VIN = VIH or VIL
20
uA
–1.2
V
VDD = Max., VOUT = GND
–50
mA
VDD = GND, VOUT = < 4.5V
100
uA
–0.7
80
mV
DC Electrical Characteristics @ 2.5V (see Figure 1)
Parameter
Description
Conditions
VOH
Output High Voltage
VDD = Min., VIN = VIH or VIL
VOL
VIH
VIL
IIH
IIL
II
VIK
IOK
OOFF
VH
Output Low Voltage
VDD = Min., VIN = VIH or VIL
Input High Voltage
Guaranteed Logic High Level
Input Low Voltage
Guaranteed Logic Low Level
Input High Current
VDD = Max.
Input Low Current
VDD = Max.
Input High Current
VDD = Max., VIN = VDD(Max.)
Clamp Diode Voltage
VDD = Min., IIN = –18 mA
Min.
IOH = –7 mA
1.8
IOH = 12 mA
1.6
Typ.
Max.
Unit
V
V
IOL = 12 mA
0.65
V
5.0
V
0.8
V
VIN = 2.4V
1
uA
VIN = 0.5V
–1
uA
1.6
–0.7
20
uA
–1.2
V
Continuous Clamp Current
VDD = Max., VOUT = GND
–50
mA
Power-down Disable
VDD = GND, VOUT = < 4.5V
100
uA
Input Hysteresis
80
mV
Capacitance
Parameter
Description
Test Conditions
Min.
Typ.
Max.
Unit
Cin
Input Capacitance
VIN = 0V
2.5
pF
Cout
Output Capacitance
VOUT = 0V
6.5
pF
Notes:
1. Stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. This is intended to be a stress rating only and
functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure
to absolute maximum rating conditions for extended periods may affect reliability.
2. Multiple Supplies: The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.
Document #: 38-07056 Rev. *C
Page 2 of 7
COMLINK™ SERIES
CY2CC810
Power Supply Characteristics (see Figure 5)
Parameter
Description
Test Conditions
Min.
∆ICC
Delta ICC Quiescent Power
Supply Current
ICCD
Dynamic Power Supply Current VDD = Max.
Input toggling 50% Duty Cycle, Outputs Open
IC
Total Power Supply Current
Typ.
(IDD @ VDD = Max. and VIN = VDD) – (IDD @ VDD
= Max. and VIN = VDD – 0.6V)
VDD = Max.
Input toggling 50% Duty Cycle, Outputs Open
fL = 40 MHZ
Max.
Unit
50
uA
0.63
mA/
MHz
25
mA
High-frequency Parametrics
Parameter
Description
Test Conditions
DJ
Jitter, Deterministic
50% duty cycle tW(50–50)
The “point to point load circuit”
Output Jitter – Input Jitter
Fmax
Maximum frequency
VDD = 3.3V
50% duty cycle tW(50–50)
Standard Load Circuit.
Min. Typ. Max.
See Figure 5
Unit
20
ps
160
MHz
50% duty cycle tW(50–50)
The “point to point load circuit”
See Figure 7
650
Fmax
2.5V
Maximum frequency
VDD = 2.5 V
The “point to point load circuit”
VIN = 2.4V/0.0V VOUT = 1.7V/0.7V
See Figure 7
200
MHz
Fmax(20)
Maximum frequency
VDD = 3.3 V
20% duty cycle tW(20-80)
The “point to point load circuit”
VIN = 3.0V/0.0V VOUT = 2.3V/0.4V
See Figure 7
250
MHz
Maximum frequency
VDD = 2.5 V
The “point to point load circuit”
VIN = 2.4V/0.0V VOUT = 1.7V/0.7V
See Figure 3
200
MHz
Minimum pulse
VDD = 3.3 V
The “point to point load circuit”
VIN = 3.0V/0.0V F = 100 MHz
VOUT = 2.0V/0.8V
See Figure 7
1
Minimum pulse
VDD = 2.5 V
The “point to point load circuit”
VIN = 2.4V/0.0V F = 100 MHz
VOUT = 1.7V/0.7V
See Figure 3
1
tW
ns
AC Switching Characteristics @ 3.3V VDD = 3.3V ±5%, Temperature = –40°C to +85°C
Parameter
Description
tPLH
Propagation Delay – Low to High
tPHL
Propagation Delay – High to Low
See Figure 4
Min.
Typ.
Max.
Unit
1.5
2.7
3.5
nS
1.5
2.7
3.5
nS
tR
Output Rise Time
0.8
V/nS
tF
Output Fall Time
0.8
V/nS
tSK(0)
Output Skew: Skew between outputs of the same package (in phase) See Figure 10
0.2
nS
tSK(p)
Pulse Skew: Skew between opposite transitions of the same output See Figure 9
(tPHL – tPLH).
0.2
nS
tSK(t)
Package Skew: Skew between outputs of different packages at the See Figure 11
same power supply voltage, temperature and package type.
0.4
nS
Document #: 38-07056 Rev. *C
Page 3 of 7
COMLINK™ SERIES
CY2CC810
AC Switching Characteristics @ 2.5V VDD = 2.5V ±5%, Temperature = –40°C to +85°C
Parameter
Description
tPLH
Propagation Delay – Low to High
tPHL
Propagation Delay – High to Low
Min. Typ. Max. Unit
See Figure 4
1.5
2.0
3.5
nS
1.5
2.0
3.5
nS
tR
Output Rise Time
0.8
V/nS
tF
Output Fall Time
0.8
V/nS
tSK(0)
Output Skew: Skew between outputs of the same package (in phase) See Figure 10
tSK(p)
Pulse Skew: Skew between opposite transitions of the same output
(tPHL – tPLH).
See Figure 9
tSK(t)
Package Skew: Skew between outputs of different packages at the
same power supply voltage, temperature and package type.
See Figure 11
CL = 50 pF
CL = 50 pF
500 ohm
nS
0.65
nS
tw(50-50)
tw(50-50)
2.0 V
1.25 V
500 ohm
Figure 5. Load Circuit [3,4,5]
Figure 1. Load Circuit [3,4,5]
Input
1.25 V
2.7V
1.5V
1.5V
0V
0V
tw(20-80)
Input
tw(20-80)
2.0 V
Input
1.25 V
Figure 2. Voltage Waveforms–Pulse
2.7V
1.5V
0V
0V
Duration[6]
Figure 6. Voltage Waveforms–Pulse Duration[6]
From Output
Under Test
From Output
Under Test
CL = 3 pF
CL = 3 pF
500 ohm
Figure 3. Point to Point Load Circuit[3,4,5]
1.0 V
Figure 7. Point to Point Load Circuit[3,4,5]
0V
VOH
1.25 V
VOL
Figure 4. Voltage Waveforms–
Propagation Delay Times[4]
1.5V
Input
tPHL
1.25 V
500 ohm
2.0 V
1.0 V
tPLH
Output
0.2
From Output
Under Test
From Output
Under Test
Input
nS
Parameter Measurement Information:
VDD @ 3.3V
Parameter Measurement Information:
VDD @ 2.5V
Input
0.2
tPLH
Output
2.7V
1.5V
0V
tPHL
1.5V
1.5V
VOH
VOL
Figure 8. Voltage Waveforms–
Propagation Delay Times[4]
Notes:
3. CL includes probe and jig capacitance.
4. All input pulses are supplied by generators having the following characteristics: PRR < 100 MHz, Z0 = 50W, tR < 2.5 nS, tF < 2.5 nS.
5. The outputs are measured one at a time with one transition per measurement.
6. TPLH and TPHL are the same as tpd.
Document #: 38-07056 Rev. *C
Page 4 of 7
COMLINK™ SERIES
CY2CC810
3V
1.5V
INPUT
0V
tPHL
tPLH
VOH
1.5V
OUTPUT
VOL
tsk (P) =
l tPHL - tPLH l
Figure 9. Pulse Skew–tsk(p)
3V
1 .5 V
IN P U T
0V
tP H L 1
tP L H 1
VOH
1 .5 V
OUTPUT 1
VOL
tsk (O )
ts k (O )
VOH
1 .5 V
OUTPUT 2
VOL
tP L H
ts k (P ) =
tP L H
2
2
l t P LH 2 - t P L H 1 l o r t P H L 2 - t P H L1 l
Figure 10. Output Skew–tsk(0)
3V
1.5V
INPUT
0V
tPHL1
tPLH1
VOH
1.5V
PACKAGE 1 OUTPUT
tsk (t)
tsk (t)
VOL
VOH
1.5V
PACKAGE 2 OUTPUT
VOL
tPLH 2
tsk (t) =
tPLH 2
l tPLH2 - tPLH1 l or tPHL2 - tPHL1 l
Figure 11. Package Skew–tsk(t)
Ordering Information
Part Number
CY2CC810SI
CY2CC810SIT
CY2CC810OI
CY2CC810OIT
CY2CC810SC
CY2CC810SCT
CY2CC810OC
CY2CC810OCT
Document #: 38-07056 Rev. *C
Package Type
20-pin SOIC
20-pin SOIC–Tape and Reel
20-pin SSOP
20-pin SSOP–Tape and Reel
20-pin SOIC
20-pin SOIC–Tape and Reel
20-pin SSOP
20-pin SSOP–Tape and Reel
Product Flow
Industrial, –40°C to 85°C
Industrial, –40°C to 85°C
Industrial, –40°C to 85°C
Industrial, –40°C to 85°C
Commercial, 0°C to 70°C
Commercial, 0°C to 70°C
Commercial, 0°C to 70°C
Commercial, 0°C to 70°C
Page 5 of 7
COMLINK™ SERIES
CY2CC810
Package Drawing and Dimensions
20-lead (300-mil) Molded SOIC S5
51-85024-A
20-lead (5.3-mm) Shrunk Small Outline Package O20
51-85077-*C
All product and company names mentioned in this document are the trademarks of their respective holders.
Document #: 38-07056 Rev. *C
Page 6 of 7
© Cypress Semiconductor Corporation, 2002. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.
COMLINK™ SERIES
CY2CC810
Document History Page
Document Title: CY2CC810 1:10 Clock Fanout Buffer
Document #: 38-07056
REV.
ECN NO.
Issue
Date
Orig. of
Change
Description of Change
**
107081
06/07/01
IKA
Convert from IMI to Cypress
*A
114315
05/09/02
TSM
∆ IDD Validation
*B
119117
10/07/02
RGL
Added 5.8 as the Max. value of VIH in the DC Electrical Characteristics
@3.3V table.
Changed the Max. value of VIH from 1.8 to 5.0 in the DC Electrical Characteristics @2.5V table.
*C
122743
12/14/02
RBI
Added power up requirements to maximum ratings information.
Document #: 38-07056 Rev. *C
Page 7 of 7